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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <alison.schofield@intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>,
	Dave Jiang <dave.jiang@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	Ira Weiny <ira.weiny@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH v2 3/4] cxl/region: Verify target positions using the ordered target list
Date: Fri, 7 Jun 2024 16:04:18 +0100	[thread overview]
Message-ID: <20240607160418.000033e5@Huawei.com> (raw)
In-Reply-To: <562c5e2097f32567bf7aa505d7952d9c068d830b.1715192606.git.alison.schofield@intel.com>

On Wed,  8 May 2024 11:47:52 -0700
alison.schofield@intel.com wrote:

> From: Alison Schofield <alison.schofield@intel.com>
> 
> When a root decoder is configured the interleave target list is read
> from the BIOS populated CFMWS structure. Per the CXL spec 3.1 Table
> 9-22 the target list is in interleave order. The CXL driver populates
> its decoder target list in the same order and stores it in 'struct
> cxl_switch_decoder' field "@target: active ordered target list in
> current decoder configuration"
> 
> Given the promise of an ordered list, the driver can stop duplicating
> the work of BIOS and simply check target positions against the ordered
> list during region configuration.
> 
> The simplified check against the ordered list is presented here.
> A follow-on patch will remove the unused code.
> 
> For Modulo arithmetic this is not a fix, only a simplification.
> For XOR arithmetic this is a fix for HB IW of 3,6,12.
> 
> Fixes: f9db85bfec0d ("cxl/acpi: Support CXL XOR Interleave Math (CXIMS)")
> Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

  reply	other threads:[~2024-06-07 15:04 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-08 18:47 [PATCH v2 0/4] XOR Math Fixups: translation & position alison.schofield
2024-05-08 18:47 ` [PATCH v2 1/4] cxl/core: Rename cxl_trace_hpa() to cxl_translate() alison.schofield
2024-05-30  3:45   ` Dan Williams
2024-06-07 14:40   ` Jonathan Cameron
2024-06-07 17:45     ` Alison Schofield
2024-06-07 17:55       ` Jonathan Cameron
2024-05-08 18:47 ` [PATCH v2 2/4] cxl/acpi: Restore XOR'd position bits during address translation alison.schofield
2024-05-30  3:55   ` Dan Williams
2024-05-30 22:29     ` Alison Schofield
2024-05-31  1:46       ` Dan Williams
2024-06-07 15:01   ` Jonathan Cameron
2024-06-07 18:20     ` Alison Schofield
2024-06-10 10:20       ` Jonathan Cameron
2024-05-08 18:47 ` [PATCH v2 3/4] cxl/region: Verify target positions using the ordered target list alison.schofield
2024-06-07 15:04   ` Jonathan Cameron [this message]
2024-06-11 21:50   ` Dan Williams
2024-05-08 18:47 ` [PATCH v2 4/4] cxl: Remove defunct code calculating host bridge target positions alison.schofield
2024-06-07 15:06   ` Jonathan Cameron

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