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From: Lee Jones <lee@kernel.org>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	Broadcom internal kernel review list
	<bcm-kernel-feedback-list@broadcom.com>,
	Stefan Wahren <wahrenst@gmx.net>,
	devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, Dave Ertman <david.m.ertman@intel.com>,
	Lizhi Hou <lizhi.hou@amd.com>,
	clement.leger@bootlin.com
Subject: Re: Raspberry Pi5 - RP1 driver - RFC
Date: Wed, 12 Jun 2024 15:02:08 +0100	[thread overview]
Message-ID: <20240612140208.GC1504919@google.com> (raw)
In-Reply-To: <ZmhvqwnOIdpi7EhA@apocalypse>

On Tue, 11 Jun 2024, Andrea della Porta wrote:

> Hi,
> I'm on the verge of reworking the RP1 driver from downstream in order for it to be
> in good shape for upstream inclusion.
> RP1 is an MFD chipset that acts as a south-bridge PCIe endpoint sporting a pletora
> of subdevices (i.e.  Ethernet, USB host controller, I2C, PWM, etc.) whose registers
> are all reachable starting from an offset from the BAR address.

It's less of an MFD and more of an SoC.

Please refrain from implemented entire SoCs in drivers/mfd.

Take a look in drivers/soc and drivers/platform.

-- 
Lee Jones [李琼斯]

      parent reply	other threads:[~2024-06-12 14:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-11 15:39 Raspberry Pi5 - RP1 driver - RFC Andrea della Porta
2024-06-11 15:39 ` Andrea della Porta
2024-06-11 19:05 ` Stefan Wahren
2024-06-11 20:12   ` Andrew Lunn
2024-06-12 16:10   ` Jeremy Linton
2024-06-12 14:02 ` Lee Jones [this message]

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