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From: Thippeswamy Havalige <thippesw@amd.com>
To: <bhelgaas@google.com>, <kw@linux.com>, <robh@kernel.org>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<lpieralisi@kernel.org>
Cc: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <michal.simek@amd.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<bharat.kumar.gogada@amd.com>,
	Thippeswamy Havalige <thippesw@amd.com>
Subject: [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge
Date: Mon, 24 Jun 2024 16:12:38 +0530	[thread overview]
Message-ID: <20240624104239.132159-2-thippesw@amd.com> (raw)
In-Reply-To: <20240624104239.132159-1-thippesw@amd.com>

Add YAML devicetree schemas for Xilinx QDMA Soft IP PCIe Root Port Bridge.

Signed-off-by: Thippeswamy Havalige <thippesw@amd.com>
---
 .../devicetree/bindings/pci/xlnx,xdma-host.yaml    | 41 ++++++++++++++++++++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
index 2f59b3a..b705e47 100644
--- a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
+++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml
@@ -14,10 +14,21 @@ allOf:
 
 properties:
   compatible:
-    const: xlnx,xdma-host-3.00
+    enum:
+      - xlnx,xdma-host-3.00
+      - xlnx,qdma-host-3.00
 
   reg:
-    maxItems: 1
+    items:
+      - description: configuration region and XDMA bridge register.
+      - description: QDMA bridge register.
+    minItems: 1
+
+  reg-names:
+    items:
+      - const: cfg
+      - const: breg
+    minItems: 1
 
   ranges:
     maxItems: 2
@@ -111,4 +122,30 @@ examples:
                 interrupt-controller;
             };
         };
+
+        axi-pcie@80000000 {
+            compatible = "xlnx,qdma-host-3.00";
+            reg = <0x0 0x80000000 0x0 0x10000000>, <0x0 0x90000000 0x0 0x10000000>;
+            reg-names = "cfg", "breg";
+            ranges = <0x2000000 0x0 0xa8000000 0x0 0xa8000000 0x0 0x8000000>,
+                     <0x43000000 0x4 0x80000000 0x4 0x80000000 0x0 0x40000000>;
+            #address-cells = <3>;
+            #interrupt-cells = <1>;
+            #size-cells = <2>;
+            device_type = "pci";
+            interrupt-parent = <&gic>;
+            interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                         <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+            interrupt-names = "misc", "msi0", "msi1";
+            interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+            interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
+                            <0 0 0 2 &pcie_intc_0 1>,
+                            <0 0 0 3 &pcie_intc_0 2>,
+                            <0 0 0 4 &pcie_intc_0 3>;
+            pcie_intc_1: interrupt-controller {
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                interrupt-controller;
+            };
+        };
     };
-- 
1.8.3.1


  reply	other threads:[~2024-06-24 10:43 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-24 10:42 [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Thippeswamy Havalige
2024-06-24 10:42 ` Thippeswamy Havalige [this message]
2024-06-24 11:24   ` [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge Rob Herring (Arm)
2024-06-24 10:42 ` [PATCH 2/2] PCI: xilinx-xdma: Add Xilinx QDMA Root Port driver Thippeswamy Havalige
2024-06-26 20:07   ` kernel test robot
  -- strict thread matches above, loose matches on Subject: below --
2024-06-24 11:07 [PATCH 0/2] Add support for Xilinx XDMA Soft IP as Root Port Thippeswamy Havalige
2024-06-24 11:07 ` [PATCH 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx QDMA PCIe Root Port Bridge Thippeswamy Havalige
2024-06-24 12:24   ` Rob Herring (Arm)

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