From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Shradha Todi <shradha.t@samsung.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<manivannan.sadhasivam@linaro.org>, <lpieralisi@kernel.org>,
<kw@linux.com>, <robh@kernel.org>, <bhelgaas@google.com>,
<jingoohan1@gmail.com>, <fancer.lancer@gmail.com>,
<yoshihiro.shimoda.uh@renesas.com>, <conor.dooley@microchip.com>,
<pankaj.dubey@samsung.com>, <gost.dev@samsung.com>
Subject: Re: [PATCH 3/3] PCI: dwc: Create debugfs files in DWC driver
Date: Mon, 1 Jul 2024 12:10:21 +0100 [thread overview]
Message-ID: <20240701121021.00004f0b@Huawei.com> (raw)
In-Reply-To: <20240625093813.112555-4-shradha.t@samsung.com>
On Tue, 25 Jun 2024 15:08:13 +0530
Shradha Todi <shradha.t@samsung.com> wrote:
> Add call to initialize debugfs from DWC driver and create the RASDES
> debugfs hierarchy for each platform driver. Since it can be used for
> both DW HOST controller as well as DW EP controller, add it in the
> common setup function.
>
> Signed-off-by: Shradha Todi <shradha.t@samsung.com>
Squash this with the previous patch given it's so trivial.
> ---
> drivers/pci/controller/dwc/pcie-designware-host.c | 2 ++
> drivers/pci/controller/dwc/pcie-designware.c | 4 ++++
> 2 files changed, 6 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index d15a5c2d5b48..c2e6f8484000 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -537,6 +537,8 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
> pci_stop_root_bus(pp->bridge->bus);
> pci_remove_root_bus(pp->bridge->bus);
>
> + dwc_pcie_rasdes_debugfs_deinit(pci);
> +
> dw_pcie_stop_link(pci);
>
> dw_pcie_edma_remove(pci);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index b74e4a97558e..ebb21ba75388 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -1084,4 +1084,8 @@ void dw_pcie_setup(struct dw_pcie *pci)
> dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);
>
> dw_pcie_link_set_max_link_width(pci, pci->num_lanes);
> +
> + val = dwc_pcie_rasdes_debugfs_init(pci);
> + if (val)
> + dev_err(pci->dev, "Couldn't create debugfs files\n");
> }
next prev parent reply other threads:[~2024-07-01 11:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20240625094434epcas5p2e48bda118809ccb841c983d737d4f09d@epcas5p2.samsung.com>
2024-06-25 9:38 ` [PATCH v3 0/3] Add support for RAS DES feature in PCIe DW Shradha Todi
2024-06-25 9:38 ` [PATCH 1/3] PCI: dwc: Add support for vendor specific capability search Shradha Todi
2024-07-01 10:55 ` Jonathan Cameron
2024-07-26 17:32 ` Bjorn Helgaas
2024-06-25 9:38 ` [PATCH 2/3] PCI: debugfs: Add support for RASDES framework in DWC Shradha Todi
2024-07-01 11:09 ` Jonathan Cameron
2024-07-19 12:12 ` Shradha Todi
2024-07-24 17:15 ` Manivannan Sadhasivam
2024-07-26 17:41 ` Bjorn Helgaas
2024-06-25 9:38 ` [PATCH 3/3] PCI: dwc: Create debugfs files in DWC driver Shradha Todi
2024-07-01 11:10 ` Jonathan Cameron [this message]
2024-07-01 11:15 ` [PATCH v3 0/3] Add support for RAS DES feature in PCIe DW Jonathan Cameron
2024-11-26 5:16 ` Krishna Chaitanya Chundru
2024-11-26 5:17 ` Krishna Chaitanya Chundru
2024-11-26 7:15 ` Nitesh Gupta
2024-11-26 10:15 ` Shradha Todi
[not found] <CGME20210518173826epcas5p32f6b141c9ab4b33e88638cf90a502ef1@epcas5p3.samsung.com>
2021-05-18 17:46 ` [PATCH 0/3] Add support for RAS DES feature in PCIe DW controller Shradha Todi
2021-05-18 17:46 ` [PATCH 3/3] PCI: dwc: Create debugfs files in DWC driver Shradha Todi
2021-05-21 20:04 ` Bjorn Helgaas
2021-05-27 11:53 ` Vidya Sagar
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