From: "Krzysztof Wilczyński" <kw@linux.com>
To: Niklas Cassel <cassel@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Damien Le Moal <dlemoal@kernel.org>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH] PCI: dwc: ep: Enforce DWC specific 64-bit BAR limitiation
Date: Tue, 2 Jul 2024 05:24:32 +0900 [thread overview]
Message-ID: <20240701202432.GE272504@rocinante> (raw)
In-Reply-To: <20240528134839.8817-2-cassel@kernel.org>
> From the DWC EP databook 5.96a, section "3.5.7.1.4 General Rules for BAR
> Setup (Fixed Mask or Programmable Mask Schemes Only)":
>
> "Any pair (for example BARs 0 and 1) can be configured as one 64-bit BAR,
> two 32-bit BARs, or one 32-bit BAR."
>
> "BAR pairs cannot overlap to form a 64-bit BAR. For example, you cannot
> combine BARs 1 and 2 to form a 64-bit BAR."
>
> While this limitation does exist in some other PCI endpoint controllers,
> e.g. cdns_pcie_ep_set_bar(), the limitation does not appear to be defined
> in the PCIe specification itself, thus add an explicit check for this in
> dw_pcie_ep_set_bar() (rather than pci_epc_set_bar()).
Applied to controller/dwc, thank you!
[1/1] PCI: dwc: ep: Enforce DWC specific 64-bit BAR limitation
https://git.kernel.org/pci/pci/c/a46de632131f
Krzysztof
prev parent reply other threads:[~2024-07-01 20:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-28 13:48 [PATCH] PCI: dwc: ep: Enforce DWC specific 64-bit BAR limitiation Niklas Cassel
2024-05-30 14:36 ` Manivannan Sadhasivam
2024-07-01 20:24 ` Krzysztof Wilczyński [this message]
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