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From: Minda Chen <minda.chen@starfivetech.com>
To: Marek Vasut <marex@denx.de>, Tom Rini <trini@konsulko.com>,
	Roger Quadros <rogerq@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Alexey Romanov <avromanov@salutedevices.com>,
	Sumit Garg <sumit.garg@linaro.org>,
	Mark Kettenis <kettenis@openbsd.org>, Nishanth Menon <nm@ti.com>,
	Rick Chen <rick@andestech.com>,
	Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: u-boot@lists.denx.de, Heinrich Schuchardt <xypron.glpk@gmx.de>,
	Simon Glass <sjg@chromium.org>, E Shattow <lucent@gmail.com>,
	Minda Chen <minda.chen@starfivetech.com>
Subject: [PATCH v2 0/7] Add Starfive JH7110 Cadence USB driver
Date: Thu,  4 Jul 2024 13:50:06 +0800	[thread overview]
Message-ID: <20240704055014.55117-1-minda.chen@starfivetech.com> (raw)

Add Starfive JH7110 Cadence USB driver and related PHY driver.
So the codes can be used in visionfive2 and star64 7110 board.

The driver is almost the same with kernel driver.

Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
The code can work.

- Star64 using USB 3.0 and USB 2.0 host must add below board dts setting.

1. usb pin setting
	usb_pins: usb0-0 {
		driver-vbus-pin {
			pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS,
					  GPOEN_ENABLE,
					  GPI_NONE)>;
			bias-disable;
			input-disable;
			input-schmitt-disable;
			slew-rate = <0>;
		};
	};

2. related dts node setting.
&pcie0 {
	status = "disabled";
};

&pciephy0 {
	starfive,sys-syscon = <&sys_syscon 0x18>;
	starfive,stg-syscon = <&stg_syscon 0x148 0x1f4>;
	status = "okay";
};

&usb0 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb_pins>;
	status = "okay";
};

&usb_cdns3 {
	phys = <&usbphy0>, <&pciephy0>;
	phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
	dr_mode = "host";
	status = "okay";
};

- previous version
  v1: https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.19600-1-minda.chen@starfivetech.com/

- patch description.

patch1: Add set phy mode function in cdns3 core driver
        which is used by Starfive JH7110.
patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
patch4: Cadence USB wrapper driver.
patch5: Add JH7110 USB default overcurrent pin.
patch6-8 dts, config and maintainers update.

- change:
	v2:
	- patch 1 Move the added code to cdns3_core_init_role(). Must
	  set PHY mode before calling cdns3 role start function.
	- patch 1-4 correct the code format.(follow Marek's comments.)
	- patch 2 Add set 125M clock in PHY init function.
	- Add new patch5. 

Minda Chen (8):
  usb: cdns3: Set USB PHY mode in cdns3_core_init_role()
  phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
  phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
  usb: cdns: starfive: Add cdns USB driver
  pinctrl: starfive: Setup USB default disable overcurrent pin
  configs: starfive: Add visionfive2 cadence USB configuration
  dts: starfive: Add JH7110 Cadence USB dts node
  MAINTAINERS: Update Starfive visionfive2 maintain files.

 .../dts/jh7110-starfive-visionfive-2.dtsi     |   5 +
 arch/riscv/dts/jh7110.dtsi                    |  52 +++++
 board/starfive/visionfive2/MAINTAINERS        |   2 +
 configs/starfive_visionfive2_defconfig        |   9 +
 drivers/phy/Kconfig                           |   1 +
 drivers/phy/Makefile                          |   1 +
 drivers/phy/starfive/Kconfig                  |  21 ++
 drivers/phy/starfive/Makefile                 |   7 +
 drivers/phy/starfive/phy-jh7110-pcie.c        | 202 ++++++++++++++++++
 drivers/phy/starfive/phy-jh7110-usb2.c        | 135 ++++++++++++
 drivers/pinctrl/starfive/pinctrl-jh7110-sys.c |  11 +-
 drivers/usb/cdns3/Kconfig                     |   7 +
 drivers/usb/cdns3/Makefile                    |   2 +
 drivers/usb/cdns3/cdns3-starfive.c            | 183 ++++++++++++++++
 drivers/usb/cdns3/core.c                      |  25 +++
 15 files changed, 661 insertions(+), 2 deletions(-)
 create mode 100644 drivers/phy/starfive/Kconfig
 create mode 100644 drivers/phy/starfive/Makefile
 create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
 create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
 create mode 100644 drivers/usb/cdns3/cdns3-starfive.c


base-commit: 8937bb265a7f2251c1bd999784a4ef10e9c6080d
-- 
2.17.1


             reply	other threads:[~2024-07-04  5:50 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-04  5:50 Minda Chen [this message]
2024-07-04  5:50 ` [PATCH v2 1/8] usb: cdns3: Set USB PHY mode in cdns3_core_init_role() Minda Chen
2024-07-04 13:30   ` Roger Quadros
2024-07-05  8:23     ` Minda Chen
2024-07-04  5:50 ` [PATCH v2 2/8] phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver Minda Chen
2024-07-04 13:34   ` Roger Quadros
2024-07-04  5:50 ` [PATCH v2 3/8] phy: starfive: Add Starfive JH7110 PCIe " Minda Chen
2024-07-04 14:06   ` Roger Quadros
2024-07-19  1:29     ` Minda Chen
2024-07-04 14:16   ` Roger Quadros
2024-07-04  5:50 ` [PATCH v2 4/8] usb: cdns: starfive: Add cdns USB driver Minda Chen
2024-07-04 14:17   ` Roger Quadros
2024-07-04  5:50 ` [PATCH v2 5/8] pinctrl: starfive: Setup USB default disable overcurrent pin Minda Chen
2024-07-04  5:50 ` [PATCH v2 6/8] configs: starfive: Add visionfive2 cadence USB configuration Minda Chen
2024-07-04  5:50 ` [PATCH v2 7/8] dts: starfive: Add JH7110 Cadence USB dts node Minda Chen
2024-07-04  5:50 ` [PATCH v2 8/8] MAINTAINERS: Update Starfive visionfive2 maintain files Minda Chen
2024-07-04 13:25 ` [PATCH v2 0/7] Add Starfive JH7110 Cadence USB driver Heinrich Schuchardt
2024-07-05  1:08   ` E Shattow
2024-07-05  5:33     ` 回复: " Minda Chen
2024-07-19  1:31   ` Minda Chen

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