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From: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
To: "Mário Kuka" <kuka@cesnet.cz>
Cc: dev@dpdk.org, orika@nvidia.com, bingz@nvidia.com, viktorin@cesnet.cz
Subject: Re: Hairpin Queues Throughput ConnectX-6
Date: Fri, 5 Jul 2024 00:03:15 +0300	[thread overview]
Message-ID: <20240705000315.710f2491@sovereign> (raw)
In-Reply-To: <95896e0b-648c-40ee-986e-2f4c6d0bb29a@cesnet.cz>

2024-07-04 13:08 (UTC+0200), Mário Kuka:
[...]
> So I can't achieve my goal: traffic from the hairpin queues is not 
> dropped if the CPU queue is overloaded.
> Any idea how to achieve this in example 4?
> What is the problem, full packet buffers/memory in the device that are 
> shared between the hairpin and CPU queues?
> 
> Any guidance or suggestions on how to achieve this would be greatly 
> appreciated.

So you want priority traffic to use a dedicated HW buffer pool.
Good news: QoS is the mechanism to do it.
Bad news: flow rules cannot be used to determine priority,
so you need to mark packets with VLAN PCP or IPv4 DSCP.

I've reproduced your results roughly with 60 Mpps @ PCP 0
(10 Mpps with MAC for hairpin, 50 Mpps with MAC for normal RxQ),
then switched to 10 Mpps @ PCP 0 + 50 Mpps @ PCP 1
and this solved the issue (and so does 10 Mpps @ PCP 1 + 50 Mpps @ PCP 0).

I expected the need to tune --buffer_size and --prio2buffer with mlnx_qos [1],
but it appears to be unnecessary.
No idea why this works and what buffer size is used for PCP 1.

[1]: https://enterprise-support.nvidia.com/s/article/mlnx-qos

      reply	other threads:[~2024-07-04 21:03 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <fbfd6dd8-2cfc-406e-be90-350dc2fea02e@cesnet.cz>
2024-06-19  6:45 ` Hairpin Queues Throughput ConnectX-6 Mário Kuka
2024-06-25  0:22   ` Dmitry Kozlyuk
2024-06-27 11:42     ` Mário Kuka
2024-07-04 11:08       ` Mário Kuka
2024-07-04 21:03         ` Dmitry Kozlyuk [this message]

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