From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
jason.chien@sifive.com, frank.chang@sifive.com,
ajones@ventanamicro.com, Tomasz Jeznach <tjeznach@rivosinc.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH for-9.2 v6 06/12] hw/riscv/virt.c: support for RISC-V IOMMU PCIDevice hotplug
Date: Thu, 1 Aug 2024 12:43:27 -0300 [thread overview]
Message-ID: <20240801154334.1009852-7-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20240801154334.1009852-1-dbarboza@ventanamicro.com>
From: Tomasz Jeznach <tjeznach@rivosinc.com>
Generate device tree entry for riscv-iommu PCI device, along with
mapping all PCI device identifiers to the single IOMMU device instance.
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 49e80a0900..56fe9c3252 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -32,6 +32,7 @@
#include "hw/core/sysbus-fdt.h"
#include "target/riscv/pmu.h"
#include "hw/riscv/riscv_hart.h"
+#include "hw/riscv/iommu.h"
#include "hw/riscv/virt.h"
#include "hw/riscv/boot.h"
#include "hw/riscv/numa.h"
@@ -1047,6 +1048,30 @@ static void create_fdt_virtio_iommu(RISCVVirtState *s, uint16_t bdf)
bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf);
}
+static void create_fdt_iommu(RISCVVirtState *s, uint16_t bdf)
+{
+ const char comp[] = "riscv,pci-iommu";
+ void *fdt = MACHINE(s)->fdt;
+ uint32_t iommu_phandle;
+ g_autofree char *iommu_node = NULL;
+ g_autofree char *pci_node = NULL;
+
+ pci_node = g_strdup_printf("/soc/pci@%lx",
+ (long) virt_memmap[VIRT_PCIE_ECAM].base);
+ iommu_node = g_strdup_printf("%s/iommu@%x", pci_node, bdf);
+ iommu_phandle = qemu_fdt_alloc_phandle(fdt);
+ qemu_fdt_add_subnode(fdt, iommu_node);
+
+ qemu_fdt_setprop(fdt, iommu_node, "compatible", comp, sizeof(comp));
+ qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1);
+ qemu_fdt_setprop_cell(fdt, iommu_node, "phandle", iommu_phandle);
+ qemu_fdt_setprop_cells(fdt, iommu_node, "reg",
+ bdf << 8, 0, 0, 0, 0);
+ qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map",
+ 0, iommu_phandle, 0, bdf,
+ bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf);
+}
+
static void finalize_fdt(RISCVVirtState *s)
{
uint32_t phandle = 1, irq_mmio_phandle = 1, msi_pcie_phandle = 1;
@@ -1767,9 +1792,11 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
MachineClass *mc = MACHINE_GET_CLASS(machine);
if (device_is_dynamic_sysbus(mc, dev) ||
- object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
+ object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) ||
+ object_dynamic_cast(OBJECT(dev), TYPE_RISCV_IOMMU_PCI)) {
return HOTPLUG_HANDLER(machine);
}
+
return NULL;
}
@@ -1790,6 +1817,10 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
create_fdt_virtio_iommu(s, pci_get_bdf(PCI_DEVICE(dev)));
}
+
+ if (object_dynamic_cast(OBJECT(dev), TYPE_RISCV_IOMMU_PCI)) {
+ create_fdt_iommu(s, pci_get_bdf(PCI_DEVICE(dev)));
+ }
}
static void virt_machine_class_init(ObjectClass *oc, void *data)
--
2.45.2
next prev parent reply other threads:[~2024-08-01 15:45 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-01 15:43 [PATCH for-9.2 v6 00/12] riscv: QEMU RISC-V IOMMU Support Daniel Henrique Barboza
2024-08-01 15:43 ` [PATCH for-9.2 v6 01/12] exec/memtxattr: add process identifier to the transaction attributes Daniel Henrique Barboza
2024-08-01 15:43 ` [PATCH for-9.2 v6 02/12] hw/riscv: add riscv-iommu-bits.h Daniel Henrique Barboza
2024-08-04 23:04 ` Alistair Francis
2024-08-05 18:25 ` Daniel Henrique Barboza
2024-08-05 23:46 ` Alistair Francis
2024-08-07 8:37 ` Jason Chien
2024-08-01 15:43 ` [PATCH for-9.2 v6 03/12] hw/riscv: add RISC-V IOMMU base emulation Daniel Henrique Barboza
2024-08-04 23:23 ` Alistair Francis
2024-08-17 11:34 ` Andrew Jones
2024-08-18 18:20 ` Daniel Henrique Barboza
2024-08-20 15:16 ` Jason Chien
2024-08-23 12:42 ` Daniel Henrique Barboza
2024-08-27 2:18 ` Tomasz Jeznach
2024-09-03 11:46 ` Daniel Henrique Barboza
2024-10-01 23:28 ` Tomasz Jeznach
2024-10-02 0:05 ` Daniel Henrique Barboza
2024-10-03 8:42 ` Andrew Jones
2024-08-01 15:43 ` [PATCH for-9.2 v6 04/12] pci-ids.rst: add Red Hat pci-id for RISC-V IOMMU device Daniel Henrique Barboza
2024-08-21 11:34 ` Gerd Hoffmann
2024-08-01 15:43 ` [PATCH for-9.2 v6 05/12] hw/riscv: add riscv-iommu-pci reference device Daniel Henrique Barboza
2024-08-01 15:43 ` Daniel Henrique Barboza [this message]
2024-08-01 15:43 ` [PATCH for-9.2 v6 07/12] test/qtest: add riscv-iommu-pci tests Daniel Henrique Barboza
2024-08-01 15:43 ` [PATCH for-9.2 v6 08/12] hw/riscv/riscv-iommu: add Address Translation Cache (IOATC) Daniel Henrique Barboza
2024-08-20 15:27 ` Jason Chien
2024-08-23 17:18 ` Daniel Henrique Barboza
2024-08-27 2:44 ` Tomasz Jeznach
2024-08-27 11:56 ` Daniel Henrique Barboza
2024-08-01 15:43 ` [PATCH for-9.2 v6 09/12] hw/riscv/riscv-iommu: add ATS support Daniel Henrique Barboza
2024-08-01 15:43 ` [PATCH for-9.2 v6 10/12] hw/riscv/riscv-iommu: add DBG support Daniel Henrique Barboza
2024-08-04 23:35 ` Alistair Francis
2024-08-01 15:43 ` [PATCH for-9.2 v6 11/12] qtest/riscv-iommu-test: add init queues test Daniel Henrique Barboza
2024-08-01 15:43 ` [PATCH for-9.2 v6 12/12] docs/specs: add riscv-iommu Daniel Henrique Barboza
2024-08-04 23:39 ` Alistair Francis
2024-09-03 12:56 ` Daniel Henrique Barboza
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