From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp4.osuosl.org (smtp4.osuosl.org [140.211.166.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF68AC3DA4A for ; Thu, 8 Aug 2024 14:21:12 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp4.osuosl.org (Postfix) with ESMTP id 9485840979; Thu, 8 Aug 2024 14:21:12 +0000 (UTC) X-Virus-Scanned: amavis at osuosl.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP id aASX67lsVpp8; Thu, 8 Aug 2024 14:21:11 +0000 (UTC) X-Comment: SPF check N/A for local connections - client-ip=140.211.166.34; helo=ash.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org; receiver= DKIM-Filter: OpenDKIM Filter v2.11.0 smtp4.osuosl.org B81CF40B43 DKIM-Signature: v=1; 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Thu, 8 Aug 2024 14:21:10 +0000 (UTC) X-Virus-Scanned: amavis at osuosl.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP id G3NCXJ2srlIc for ; Thu, 8 Aug 2024 14:21:04 +0000 (UTC) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=2604:1380:40e1:4800::1; helo=sin.source.kernel.org; envelope-from=kuba@kernel.org; receiver= DMARC-Filter: OpenDMARC Filter v1.4.2 smtp4.osuosl.org C372C40979 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp4.osuosl.org C372C40979 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by smtp4.osuosl.org (Postfix) with ESMTPS id C372C40979 for ; Thu, 8 Aug 2024 14:21:03 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id F179CCE17C2; Thu, 8 Aug 2024 14:21:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 82F8BC32782; Thu, 8 Aug 2024 14:20:59 +0000 (UTC) Date: Thu, 8 Aug 2024 07:20:58 -0700 From: Jakub Kicinski To: Alexander Lobakin Message-ID: <20240808072058.09215916@kernel.org> In-Reply-To: <52af8b88-8814-4861-aba0-4bc726c95740@intel.com> References: <20240725093932.54856-6-karol.kolacinski@intel.com> <20240725093932.54856-10-karol.kolacinski@intel.com> <52af8b88-8814-4861-aba0-4bc726c95740@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723126859; bh=FcGF36TBWHJtKexABNo42UKivkTYDrcajYqTkssd2os=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=tkH4tGtrgw5RaGeQkptrD91VOVZLp4ENUR1EtR7hoBkk9k6LFn9qI14ytWqc02Plf U1coNePPwvsfjtofN6lzev9kYTnefR5Va1UA2hlP0Absg0Qqdt4LRbgHtJoQRW3IDX BHhAdke8tuV1CGidbV/NEbOFcK94fmufe5VTJNUbibwa3McqMy07eUgDsR88flikst atso+vBkBUtirBiDyyEnmpKCe5p1xFNVG8z3ILP7JVo/NYnxjLAcuUPnib4/CraOjS v8oUb8kUbafIiVPjdNWKWmTswcFM/I5TsvoYtPzQrmEpD8qjZOGqzoQ9q6IZHyz1IG p4mSd/QyVDEPQ== X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dmarc=pass (p=none dis=none) header.from=kernel.org X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=tkH4tGtr Subject: Re: [Intel-wired-lan] [PATCH v3 iwl-next 4/4] ice: combine cross timestamp functions for E82x and E830 X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "netdev@vger.kernel.org" , "Kolacinski, Karol" , "intel-wired-lan@lists.osuosl.org" , "Kitszel, Przemyslaw" , "Keller, Jacob E" , "Nguyen, Anthony L" Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" On Thu, 8 Aug 2024 15:00:52 +0200 Alexander Lobakin wrote: > > Technically, neither ART nor TSC are directly related to the PTP cross > > timestamp. It's just the implementation on Intel NICs, where those > > NICs use x86 ART to crosstimestamp. > > > > For cross timestamp on ARM, it's also HW specific and depends on which > > timer the HW uses for timestamping. I'm not really sure what's the HW > > protocol in this case and if e.g. E830 can latch other timers than > > x86 ART in its ART_TIME registers. > > > > get_device_system_crosststamp() supports multiple clock sources defined > > in enum clocksource_ids. Maybe instead of checking ART flag, the driver > > could get clocksources and if CSID_X86_ART is available, it would assign > > the pointer to crosststamp function, but I'm not convinced. > > I mean, I'm fine with the arch-specific definitions in the driver as > long as the netdev maintainers are fine. Or maybe they could propose > some generic solution. I don't like it either, FWIW, but it seems like this is what everyone is doing. Please do CC tglx / the time maintainers on the next version and net-next submission. I get the feeling they will wake up in a year telling us we did it all wrong, but hey, all we can do now is CC them.. From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D83D148316 for ; Thu, 8 Aug 2024 14:21:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723126860; cv=none; b=Zwoi6u2TDr/LSHN0PGzQxSo6+kB0X1OtVmdUrudIHyMIuvusaf/SGcGby/DbSBPe+la9X1eyu+AASydK34YypAWL1/HpMbuzcc9Frhgf17I9FadWz7fZ0DQBKvSpgloFoy7hJC0zt+T6iybNE5w15WYu9rV88UBPdIIIEGr6Okg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723126860; c=relaxed/simple; bh=FcGF36TBWHJtKexABNo42UKivkTYDrcajYqTkssd2os=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=FFKMIAuLd//phXqu1thQ3JJxvlo7SHai3QwXLTMuUedIrq91SlxfVFf6smDk2PINJiEqQyQkBRAxC5/E6dwh9E3LTReV5GWZXpGtvqu5gcnlxXo3GOQmh3qV44RLHg+IuDuY6D7pk1c+7N77jCjCzJDLQlWUHpSv/wvUE2pVxw4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tkH4tGtr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tkH4tGtr" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 82F8BC32782; Thu, 8 Aug 2024 14:20:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723126859; bh=FcGF36TBWHJtKexABNo42UKivkTYDrcajYqTkssd2os=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=tkH4tGtrgw5RaGeQkptrD91VOVZLp4ENUR1EtR7hoBkk9k6LFn9qI14ytWqc02Plf U1coNePPwvsfjtofN6lzev9kYTnefR5Va1UA2hlP0Absg0Qqdt4LRbgHtJoQRW3IDX BHhAdke8tuV1CGidbV/NEbOFcK94fmufe5VTJNUbibwa3McqMy07eUgDsR88flikst atso+vBkBUtirBiDyyEnmpKCe5p1xFNVG8z3ILP7JVo/NYnxjLAcuUPnib4/CraOjS v8oUb8kUbafIiVPjdNWKWmTswcFM/I5TsvoYtPzQrmEpD8qjZOGqzoQ9q6IZHyz1IG p4mSd/QyVDEPQ== Date: Thu, 8 Aug 2024 07:20:58 -0700 From: Jakub Kicinski To: Alexander Lobakin Cc: "Kolacinski, Karol" , "intel-wired-lan@lists.osuosl.org" , "Keller, Jacob E" , "netdev@vger.kernel.org" , "Nguyen, Anthony L" , "Kitszel, Przemyslaw" Subject: Re: [Intel-wired-lan] [PATCH v3 iwl-next 4/4] ice: combine cross timestamp functions for E82x and E830 Message-ID: <20240808072058.09215916@kernel.org> In-Reply-To: <52af8b88-8814-4861-aba0-4bc726c95740@intel.com> References: <20240725093932.54856-6-karol.kolacinski@intel.com> <20240725093932.54856-10-karol.kolacinski@intel.com> <52af8b88-8814-4861-aba0-4bc726c95740@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 8 Aug 2024 15:00:52 +0200 Alexander Lobakin wrote: > > Technically, neither ART nor TSC are directly related to the PTP cross > > timestamp. It's just the implementation on Intel NICs, where those > > NICs use x86 ART to crosstimestamp. > > > > For cross timestamp on ARM, it's also HW specific and depends on which > > timer the HW uses for timestamping. I'm not really sure what's the HW > > protocol in this case and if e.g. E830 can latch other timers than > > x86 ART in its ART_TIME registers. > > > > get_device_system_crosststamp() supports multiple clock sources defined > > in enum clocksource_ids. Maybe instead of checking ART flag, the driver > > could get clocksources and if CSID_X86_ART is available, it would assign > > the pointer to crosststamp function, but I'm not convinced. > > I mean, I'm fine with the arch-specific definitions in the driver as > long as the netdev maintainers are fine. Or maybe they could propose > some generic solution. I don't like it either, FWIW, but it seems like this is what everyone is doing. Please do CC tglx / the time maintainers on the next version and net-next submission. I get the feeling they will wake up in a year telling us we did it all wrong, but hey, all we can do now is CC them..