From: "Michael S. Tsirkin" <mst@redhat.com>
To: "Duan, Zhenzhong" <zhenzhong.duan@intel.com>
Cc: "Liu, Yi L" <yi.l.liu@intel.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"Peng, Chao P" <chao.p.peng@intel.com>,
"Clément Mathieu--Drif" <clement.mathieu--drif@eviden.com>,
"Jason Wang" <jasowang@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Eduardo Habkost" <eduardo@habkost.net>
Subject: Re: [PATCH v3 2/2] intel_iommu: Make PASID-cache and PIOTLB type invalid in legacy mode
Date: Wed, 14 Aug 2024 03:02:18 -0400 [thread overview]
Message-ID: <20240814030202-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <SJ0PR11MB6744F3FD7B8B23AF47E2A09292872@SJ0PR11MB6744.namprd11.prod.outlook.com>
On Wed, Aug 14, 2024 at 03:05:33AM +0000, Duan, Zhenzhong wrote:
>
>
> >-----Original Message-----
> >From: Liu, Yi L <yi.l.liu@intel.com>
> >Subject: Re: [PATCH v3 2/2] intel_iommu: Make PASID-cache and PIOTLB
> >type invalid in legacy mode
> >
> >On 2024/8/14 10:26, Zhenzhong Duan wrote:
> >> In vtd_process_inv_desc(), VTD_INV_DESC_PC and VTD_INV_DESC_PIOTLB
> >are
> >> bypassed without scalable mode check. These two types are not valid
> >> in legacy mode and we should report error.
> >>
> >> Fixes: 4a4f219e8a1 ("intel_iommu: add scalable-mode option to make
> >scalable mode work")
> >
> >4a4f219e8a10 would be better. :)
>
> Ah, OK, Michael, let me know if you want me send a new version.
>
> Thanks
> Zhenzhong
Yes pls, also pls Cc me on the cover letter.
> >
> >> Suggested-by: Yi Liu <yi.l.liu@intel.com>
> >> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> >> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
> >> Reviewed-by: Yi Liu <yi.l.liu@intel.com>
> >> ---
> >> hw/i386/intel_iommu.c | 22 +++++++++++-----------
> >> 1 file changed, 11 insertions(+), 11 deletions(-)
> >>
> >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> >> index 68cb72a481..90cd4e5044 100644
> >> --- a/hw/i386/intel_iommu.c
> >> +++ b/hw/i386/intel_iommu.c
> >> @@ -2763,17 +2763,6 @@ static bool
> >vtd_process_inv_desc(IntelIOMMUState *s)
> >> }
> >> break;
> >>
> >> - /*
> >> - * TODO: the entity of below two cases will be implemented in future
> >series.
> >> - * To make guest (which integrates scalable mode support patch set in
> >> - * iommu driver) work, just return true is enough so far.
> >> - */
> >> - case VTD_INV_DESC_PC:
> >> - break;
> >> -
> >> - case VTD_INV_DESC_PIOTLB:
> >> - break;
> >> -
> >> case VTD_INV_DESC_WAIT:
> >> trace_vtd_inv_desc("wait", inv_desc.hi, inv_desc.lo);
> >> if (!vtd_process_wait_desc(s, &inv_desc)) {
> >> @@ -2795,6 +2784,17 @@ static bool
> >vtd_process_inv_desc(IntelIOMMUState *s)
> >> }
> >> break;
> >>
> >> + /*
> >> + * TODO: the entity of below two cases will be implemented in future
> >series.
> >> + * To make guest (which integrates scalable mode support patch set in
> >> + * iommu driver) work, just return true is enough so far.
> >> + */
> >> + case VTD_INV_DESC_PC:
> >> + case VTD_INV_DESC_PIOTLB:
> >> + if (s->scalable_mode) {
> >> + break;
> >> + }
> >> + /* fallthrough */
> >> default:
> >> error_report_once("%s: invalid inv desc: hi=%"PRIx64", lo=%"PRIx64
> >> " (unknown type)", __func__, inv_desc.hi,
> >
> >--
> >Regards,
> >Yi Liu
prev parent reply other threads:[~2024-08-14 7:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-14 2:26 [PATCH v3 0/2] intel_iommu minor fixes Zhenzhong Duan
2024-08-14 2:26 ` [PATCH v3 1/2] intel_iommu: Fix invalidation descriptor type field Zhenzhong Duan
2024-08-14 2:26 ` [PATCH v3 2/2] intel_iommu: Make PASID-cache and PIOTLB type invalid in legacy mode Zhenzhong Duan
2024-08-14 3:08 ` Yi Liu
2024-08-14 3:05 ` Duan, Zhenzhong
2024-08-14 7:02 ` Michael S. Tsirkin [this message]
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