From: Rob Herring <robh@kernel.org>
To: Benjamin Larsson <benjamin.larsson@genexis.eu>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
Lorenzo Bianconi <lorenzo@kernel.org>,
linux-gpio@vger.kernel.org, linus.walleij@linaro.org,
sean.wang@kernel.org, linux-mediatek@lists.infradead.org,
lorenzo.bianconi83@gmail.com, krzk+dt@kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
upstream@airoha.com, angelogioacchino.delregno@collabora.com,
conor+dt@kernel.org, ansuelsmth@gmail.com
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: airoha: Add EN7581 pinctrl controller
Date: Fri, 16 Aug 2024 16:52:57 -0600 [thread overview]
Message-ID: <20240816225257.GA2411475-robh@kernel.org> (raw)
In-Reply-To: <c8a74be4-be63-477d-9460-1d5ef5e3d84a@genexis.eu>
On Tue, Aug 13, 2024 at 10:06:41AM +0200, Benjamin Larsson wrote:
> On 2024-08-12 08:48, Krzysztof Kozlowski wrote:
> > > + pio: pinctrl@1fa20214 {
> > > + compatible = "airoha,en7581-pinctrl";
> > > + reg = <0x0 0x1fa20214 0x0 0x30>,
> > > + <0x0 0x1fa2027c 0x0 0x8>,
> > > + <0x0 0x1fbf0234 0x0 0x4>,
> > > + <0x0 0x1fbf0268 0x0 0x4>,
> > > + <0x0 0x1fa2001c 0x0 0x50>,
> > > + <0x0 0x1fa2018c 0x0 0x4>,
> > > + <0x0 0x1fbf0204 0x0 0x4>,
> > > + <0x0 0x1fbf0270 0x0 0x4>,
> > > + <0x0 0x1fbf0200 0x0 0x4>,
> > > + <0x0 0x1fbf0220 0x0 0x4>,
> > > + <0x0 0x1fbf0260 0x0 0x4>,
> > > + <0x0 0x1fbf0264 0x0 0x4>,
> > > + <0x0 0x1fbf0214 0x0 0x4>,
> > > + <0x0 0x1fbf0278 0x0 0x4>,
> > > + <0x0 0x1fbf0208 0x0 0x4>,
> > > + <0x0 0x1fbf027c 0x0 0x4>,
> > > + <0x0 0x1fbf0210 0x0 0x4>,
> > > + <0x0 0x1fbf028c 0x0 0x4>,
> > > + <0x0 0x1fbf0290 0x0 0x4>,
> > > + <0x0 0x1fbf0294 0x0 0x4>,
> > > + <0x0 0x1fbf020c 0x0 0x4>,
> > > + <0x0 0x1fbf0280 0x0 0x4>,
> > > + <0x0 0x1fbf0284 0x0 0x4>,
> > > + <0x0 0x1fbf0288 0x0 0x4>;
> > Why are you mapping individual registers? At least half of these are
> > continuous.
>
> Hi, this is by design because of the register placement in the gpio block
> and the fact that the pwm functionality is intermixed in there also. As
> example the following registers are all GPIOCTRL:
>
> <0x0 0x1fbf0200 0x0 0x4>,
> <0x0 0x1fbf0220 0x0 0x4>,
> <0x0 0x1fbf0260 0x0 0x4>,
> <0x0 0x1fbf0264 0x0 0x4>,
>
> To simplify the driver code logic the complexity is moved to the dts because
> of that.
DT to OS is an ABI. Don't put the complexity there. The driver is easy
to change.
Lot's of h/w blocks are just bit soup. This is not special. If a few
regions is helpful, then that would be fine.
Rob
next prev parent reply other threads:[~2024-08-16 22:52 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-11 16:12 [PATCH 0/2] Add pinctrl support to EN7581 SoC Lorenzo Bianconi
2024-08-11 16:12 ` [PATCH 1/2] dt-bindings: pinctrl: airoha: Add EN7581 pinctrl controller Lorenzo Bianconi
2024-08-12 6:48 ` Krzysztof Kozlowski
2024-08-13 8:06 ` Benjamin Larsson
2024-08-16 22:52 ` Rob Herring [this message]
2024-08-17 20:46 ` Benjamin Larsson
2024-08-17 21:39 ` Andrew Lunn
2024-08-18 12:48 ` Benjamin Larsson
2024-08-18 16:02 ` Andrew Lunn
2024-08-18 15:42 ` Christian Marangi
2024-08-18 16:15 ` Lorenzo Bianconi
2024-08-18 16:59 ` Benjamin Larsson
2024-08-18 17:35 ` Andrew Lunn
2024-08-18 14:22 ` Lorenzo Bianconi
2024-08-18 14:20 ` Lorenzo Bianconi
2024-08-11 16:12 ` [PATCH 2/2] pinctrl: airoha: Add support for EN7581 SoC Lorenzo Bianconi
2024-08-11 21:08 ` kernel test robot
2024-08-11 21:49 ` kernel test robot
2024-08-11 21:59 ` kernel test robot
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