Re: [net PATCH v2] octeontx2-af: Fix CPT AF register offset calculation

[Simon Horman <horms@kernel.org>]

On Tue, Aug 20, 2024 at 04:37:02PM +0530, Bharat Bhushan wrote:
> On Mon, Aug 19, 2024 at 8:57 PM Simon Horman <horms@kernel.org> wrote:
> >
> > On Mon, Aug 19, 2024 at 06:02:37PM +0530, Bharat Bhushan wrote:
> > > Some CPT AF registers are per LF and others are global.
> > > Translation of PF/VF local LF slot number to actual LF slot
> > > number is required only for accessing perf LF registers.
> > > CPT AF global registers access do not require any LF
> > > slot number.
> > >
> > > Also there is no reason CPT PF/VF to know actual lf's register
> > > offset.
> > >
> > > Fixes: bc35e28af789 ("octeontx2-af: replace cpt slot with lf id on reg write")
> > > Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
> > > ---
> >
> > Hi Bharat,
> >
> > It would be very nice to have links (to lore) to earlier version and
> > descriptions of what has changed between versions here.
> 
> Hi Simon,
> 
> Will add below in next version of this patch

Thanks, much appreciated.

> v3:
>   - Updated patch description about what's broken without this fix
>   - Added patch history
> 
> v2: https://lore.kernel.org/netdev/20240819152744.GA543198@kernel.org/T/
>   - Spelling fixes in patch description
> 
> v1: https://lore.kernel.org/lkml/CAAeCc_nJtR2ryzoaXop8-bbw_0RGciZsniiUqS+NVMg7dHahiQ@mail.gmail.com/T/
>   - Added "net" in patch subject prefix, missed in previous patch:
>     https://lore.kernel.org/lkml/20240806070239.1541623-1-bbhushan2@marvell.com/
> 
> 
> Thanks
> -Bharat
> 
> >
> > Using b4 to manage patch submissions will help with this.
> >
>