From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-188.mta0.migadu.com (out-188.mta0.migadu.com [91.218.175.188]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94EFF195 for ; Sat, 24 Aug 2024 00:14:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.188 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724458462; cv=none; b=Hel8msC+PvDJa4WnmPSrDjuGYcjnTipXZdrqU583YAxCxelMJj1wPhTj/9AbvlGCDCy64yRTGlVwfctD7B89/GgCc4tEdrodb/TBYu26xyxhQaXicQZ2PoMf8Gzzx/3AQXXvU36vj7O0s435sAeWw2q2YuAzZpPzeehZIO8AckI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724458462; c=relaxed/simple; bh=Bdf0cqqByKolHsNubvBhURw9m2He7zkwU600pTvbDDc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f3lEekubUtx6gQ8oHEvPe1k1cy6Y/g/DWQiJ62b8fHInWRrZKpwx8QpWAiudOw7aoDklwKp7K7NA2/OuIJNCaJkoQTvInn9TEUhn9YrcNBnL7C2pHYlhOL+6bNuj6FwELSfcEn2WxZLpk4K6jyd3h6GMtcUtsqMKWf7Xm5r5uR8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Axpq6WFq; arc=none smtp.client-ip=91.218.175.188 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Axpq6WFq" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1724458458; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cTun9Bst3z194Q3jXXl84HwAwRlrOfWN0mq1zVl+2yM=; b=Axpq6WFqH0f8Hu7r8XDHXskWjHwmuKWcVlVE6vtyyZaOFPz6Yp0ApVYTEKYZa+xx52Gjk6 eBBApmir60LK3b7ys8X6vBmMaG4n7ABu7rRuMNv/S6X+IFaD0MPBGPGL2V3KdJK4ylJHHm hy71m7oQdspuHPP4JsToE7oYLyGcWFw= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: Marc Zyngier , James Morse , Suzuki K Poulose , Zenghui Yu , Ganapatrao Kulkarni , Oliver Upton Subject: [PATCH 2/3] KVM: arm64: nv: Honor NSH filter when in hyp context Date: Sat, 24 Aug 2024 00:14:01 +0000 Message-ID: <20240824001402.3909504-3-oliver.upton@linux.dev> In-Reply-To: <20240824001402.3909504-1-oliver.upton@linux.dev> References: <20240824001402.3909504-1-oliver.upton@linux.dev> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT It hopefully comes as no surprise when I say that vEL2 actually runs at EL1. So, the guest hypervisor's EL2 event filter (NSH) needs to actually be applied to EL1 in the perf event. This isn't quite enough yet, as the backing perf events need to be reprogrammed upon nested ERET/exception entry to remap the effective filter onto ::exclude_kernel. Signed-off-by: Oliver Upton --- arch/arm64/kvm/pmu-emul.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index c564bd600326..edc543574c5e 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -612,6 +612,11 @@ static bool kvm_pmc_counts_at_el1(struct kvm_pmc *pmc) return p == nsk; } +static bool kvm_pmc_counts_at_el2(struct kvm_pmc *pmc) +{ + return kvm_pmc_read_evtreg(pmc) & ARMV8_PMU_INCLUDE_EL2; +} + /** * kvm_pmu_create_perf_event - create a perf event for a counter * @pmc: Counter context @@ -654,11 +659,19 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc) attr.pinned = 1; attr.disabled = !kvm_pmu_counter_is_enabled(pmc); attr.exclude_user = !kvm_pmc_counts_at_el0(pmc); - attr.exclude_kernel = !kvm_pmc_counts_at_el1(pmc); attr.exclude_hv = 1; /* Don't count EL2 events */ attr.exclude_host = 1; /* Don't count host events */ attr.config = eventsel; + /* + * Filter events at EL1 (i.e. vEL2) when in a hyp context based on the + * guest's EL2 filter. + */ + if (unlikely(is_hyp_ctxt(vcpu))) + attr.exclude_kernel = !kvm_pmc_counts_at_el2(pmc); + else + attr.exclude_kernel = !kvm_pmc_counts_at_el1(pmc); + /* * If counting with a 64bit counter, advertise it to the perf * code, carefully dealing with the initial sample period -- 2.46.0.295.g3b9ea8a38a-goog