From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Alexander Potapenko <glider@google.com>
Subject: [PATCH v2 08/11] KVM: arm64: Honor guest requested traps in GICv3 emulation
Date: Tue, 27 Aug 2024 16:25:14 +0100 [thread overview]
Message-ID: <20240827152517.3909653-9-maz@kernel.org> (raw)
In-Reply-To: <20240827152517.3909653-1-maz@kernel.org>
On platforms that require emulation of the CPU interface, we still
need to honor the traps requested by the guest (ICH_HCR_EL2 as well
as the FGTs for ICC_IGRPEN{0,1}_EL1.
Check for these bits early and lail out if any trap applies.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/hyp/vgic-v3-sr.c | 72 +++++++++++++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c
index c9ab76652c32..39f6363caa1f 100644
--- a/arch/arm64/kvm/hyp/vgic-v3-sr.c
+++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c
@@ -1042,6 +1042,75 @@ static void __vgic_v3_write_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
write_gicreg(vmcr, ICH_VMCR_EL2);
}
+static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,
+ u32 sysreg, bool is_read)
+{
+ u64 ich_hcr;
+
+ if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))
+ return false;
+
+ ich_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2);
+
+ switch (sysreg) {
+ case SYS_ICC_IGRPEN0_EL1:
+ if (is_read &&
+ (__vcpu_sys_reg(vcpu, HFGRTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1))
+ return true;
+
+ if (!is_read &&
+ (__vcpu_sys_reg(vcpu, HFGWTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1))
+ return true;
+
+ fallthrough;
+
+ case SYS_ICC_AP0Rn_EL1(0):
+ case SYS_ICC_AP0Rn_EL1(1):
+ case SYS_ICC_AP0Rn_EL1(2):
+ case SYS_ICC_AP0Rn_EL1(3):
+ case SYS_ICC_BPR0_EL1:
+ case SYS_ICC_EOIR0_EL1:
+ case SYS_ICC_HPPIR0_EL1:
+ case SYS_ICC_IAR0_EL1:
+ return ich_hcr & ICH_HCR_TALL0;
+
+ case SYS_ICC_IGRPEN1_EL1:
+ if (is_read &&
+ (__vcpu_sys_reg(vcpu, HFGRTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1))
+ return true;
+
+ if (!is_read &&
+ (__vcpu_sys_reg(vcpu, HFGWTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1))
+ return true;
+
+ fallthrough;
+
+ case SYS_ICC_AP1Rn_EL1(0):
+ case SYS_ICC_AP1Rn_EL1(1):
+ case SYS_ICC_AP1Rn_EL1(2):
+ case SYS_ICC_AP1Rn_EL1(3):
+ case SYS_ICC_BPR1_EL1:
+ case SYS_ICC_EOIR1_EL1:
+ case SYS_ICC_HPPIR1_EL1:
+ case SYS_ICC_IAR1_EL1:
+ return ich_hcr & ICH_HCR_TALL1;
+
+ case SYS_ICC_DIR_EL1:
+ if (ich_hcr & ICH_HCR_TDIR)
+ return true;
+
+ fallthrough;
+
+ case SYS_ICC_RPR_EL1:
+ case SYS_ICC_CTLR_EL1:
+ case SYS_ICC_PMR_EL1:
+ return ich_hcr & ICH_HCR_TC;
+
+ default:
+ return false;
+ }
+}
+
int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
{
int rt;
@@ -1065,6 +1134,9 @@ int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
is_read = (esr & ESR_ELx_SYS64_ISS_DIR_MASK) == ESR_ELx_SYS64_ISS_DIR_READ;
+ if (__vgic_v3_check_trap_forwarding(vcpu, sysreg, is_read))
+ return 0;
+
switch (sysreg) {
case SYS_ICC_IAR0_EL1:
case SYS_ICC_IAR1_EL1:
--
2.39.2
next prev parent reply other threads:[~2024-08-27 15:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 15:25 [PATCH v2 00/11] KVM: arm64: Handle the lack of GICv3 exposed to a guest Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 01/11] KVM: arm64: Move GICv3 trap configuration to kvm_calculate_traps() Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 02/11] KVM: arm64: Force SRE traps when SRE access is not enabled Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 03/11] KVM: arm64: Force GICv3 trap activation when no irqchip is configured on VHE Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 04/11] KVM: arm64: Add helper for last ditch idreg adjustments Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 05/11] KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest Marc Zyngier
2024-08-28 23:22 ` Mark Brown
2024-08-29 0:48 ` Oliver Upton
2024-08-27 15:25 ` [PATCH v2 06/11] KVM: arm64: Add ICH_HCR_EL2 to the vcpu state Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 07/11] KVM: arm64: Add trap routing information for ICH_HCR_EL2 Marc Zyngier
2024-08-27 15:25 ` Marc Zyngier [this message]
2024-08-27 15:25 ` [PATCH v2 09/11] KVM: arm64: Make most GICv3 accesses UNDEF if they trap Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 10/11] KVM: arm64: Unify UNDEF injection helpers Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 11/11] KVM: arm64: Add selftest checking how the absence of GICv3 is handled Marc Zyngier
2024-08-27 17:01 ` [PATCH v2 00/11] KVM: arm64: Handle the lack of GICv3 exposed to a guest Oliver Upton
2024-08-27 17:41 ` Marc Zyngier
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