Re: [PATCH v1 1/1] mmc: sdhci-of-dwcmshc: Add hw_reset() support for BlueField-3 SoC

[kernel test robot <lkp@intel.com>]

Hi Liming,

kernel test robot noticed the following build warnings:

[auto build test WARNING on linus/master]
[also build test WARNING on v6.11-rc5 next-20240827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Liming-Sun/mmc-sdhci-of-dwcmshc-Add-hw_reset-support-for-BlueField-3-SoC/20240827-052819
base:   linus/master
patch link:    https://lore.kernel.org/r/73703c853e36f3cd61114e4ac815926d94a1a802.1724695127.git.limings%40nvidia.com
patch subject: [PATCH v1 1/1] mmc: sdhci-of-dwcmshc: Add hw_reset() support for BlueField-3 SoC
config: loongarch-allmodconfig (https://download.01.org/0day-ci/archive/20240827/202408272252.lAVSmMBR-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 14.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240827/202408272252.lAVSmMBR-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408272252.lAVSmMBR-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:919:31: warning: 'sdhci_dwcmshc_bf3_ops' defined but not used [-Wunused-const-variable=]
     919 | static const struct sdhci_ops sdhci_dwcmshc_bf3_ops = {
         |                               ^~~~~~~~~~~~~~~~~~~~~


vim +/sdhci_dwcmshc_bf3_ops +919 drivers/mmc/host/sdhci-of-dwcmshc.c

   918	
 > 919	static const struct sdhci_ops sdhci_dwcmshc_bf3_ops = {
   920		.set_clock		= sdhci_set_clock,
   921		.set_bus_width		= sdhci_set_bus_width,
   922		.set_uhs_signaling	= dwcmshc_set_uhs_signaling,
   923		.get_max_clock		= dwcmshc_get_max_clock,
   924		.reset			= sdhci_reset,
   925		.adma_write_desc	= dwcmshc_adma_write_desc,
   926		.irq			= dwcmshc_cqe_irq_handler,
   927		.hw_reset		= dwcmshc_bf3_hw_reset,
   928	};
   929	#endif
   930	

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