From: Jason Gunthorpe <jgg@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: acpica-devel@lists.linux.dev, Hanjun Guo <guohanjun@huawei.com>,
iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
Kevin Tian <kevin.tian@intel.com>,
kvm@vger.kernel.org, Len Brown <lenb@kernel.org>,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Robert Moore <robert.moore@intel.com>,
Robin Murphy <robin.murphy@arm.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Will Deacon <will@kernel.org>,
Alex Williamson <alex.williamson@redhat.com>,
Eric Auger <eric.auger@redhat.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Moritz Fischer <mdf@kernel.org>,
Michael Shavit <mshavit@google.com>,
patches@lists.linux.dev,
Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
Mostafa Saleh <smostafa@google.com>
Subject: Re: [PATCH v2 8/8] iommu/arm-smmu-v3: Support IOMMU_DOMAIN_NESTED
Date: Wed, 28 Aug 2024 16:01:00 -0300 [thread overview]
Message-ID: <20240828190100.GA1373017@nvidia.com> (raw)
In-Reply-To: <Zs5Du208eSxU67wT@Asurada-Nvidia>
On Tue, Aug 27, 2024 at 02:23:07PM -0700, Nicolin Chen wrote:
> On Tue, Aug 27, 2024 at 12:51:38PM -0300, Jason Gunthorpe wrote:
> > For SMMUv3 a IOMMU_DOMAIN_NESTED is composed of a S2 iommu_domain acting
> > as the parent and a user provided STE fragment that defines the CD table
> > and related data with addresses translated by the S2 iommu_domain.
> >
> > The kernel only permits userspace to control certain allowed bits of the
> > STE that are safe for user/guest control.
> >
> > IOTLB maintenance is a bit subtle here, the S1 implicitly includes the S2
> > translation, but there is no way of knowing which S1 entries refer to a
> > range of S2.
> >
> > For the IOTLB we follow ARM's guidance and issue a CMDQ_OP_TLBI_NH_ALL to
> > flush all ASIDs from the VMID after flushing the S2 on any change to the
> > S2.
> >
> > Similarly we have to flush the entire ATC if the S2 is changed.
> >
> > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
>
> With some small nits:
>
> > @@ -2192,6 +2255,16 @@ static void arm_smmu_tlb_inv_range_domain(unsigned long iova, size_t size,
> > }
> > __arm_smmu_tlb_inv_range(&cmd, iova, size, granule, smmu_domain);
> >
> > + if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2 &&
> > + smmu_domain->nest_parent) {
>
> smmu_domain->nest_parent alone is enough?
Yes, I thought I did that when Robin noted it..
> [---]
> > +static int arm_smmu_attach_dev_nested(struct iommu_domain *domain,
> > + struct device *dev)
> > +{
> [..]
> > + if (arm_smmu_ssids_in_use(&master->cd_table) ||
>
> This feels more like a -EBUSY as it would be unlikely able to
> attach to a different nested domain?
Yeah, we did that in arm_smmu_attach_dev()
> > +static struct iommu_domain *
> > +arm_smmu_domain_alloc_nesting(struct device *dev, u32 flags,
> > + struct iommu_domain *parent,
> > + const struct iommu_user_data *user_data)
> > +{
> > + struct arm_smmu_master *master = dev_iommu_priv_get(dev);
> > + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
> > + struct arm_smmu_nested_domain *nested_domain;
> > + struct arm_smmu_domain *smmu_parent;
> > + struct iommu_hwpt_arm_smmuv3 arg;
> > + unsigned int eats;
> > + unsigned int cfg;
> > + int ret;
> > +
> > + if (!(master->smmu->features & ARM_SMMU_FEAT_NESTING))
> > + return ERR_PTR(-EOPNOTSUPP);
> > +
> > + /*
> > + * Must support some way to prevent the VM from bypassing the cache
> > + * because VFIO currently does not do any cache maintenance.
> > + */
> > + if (!(fwspec->flags & IOMMU_FWSPEC_PCI_RC_CANWBS) &&
> > + !(master->smmu->features & ARM_SMMU_FEAT_S2FWB))
> > + return ERR_PTR(-EOPNOTSUPP);
> > +
> > + ret = iommu_copy_struct_from_user(&arg, user_data,
> > + IOMMU_HWPT_DATA_ARM_SMMUV3, ste);
> > + if (ret)
> > + return ERR_PTR(ret);
> > +
> > + if (flags || !(master->smmu->features & ARM_SMMU_FEAT_TRANS_S1))
> > + return ERR_PTR(-EOPNOTSUPP);
>
> A bit redundant to the first sanity against ARM_SMMU_FEAT_NESTING,
> since ARM_SMMU_FEAT_NESTING includes ARM_SMMU_FEAT_TRANS_S1.
Yeah, I think this was ment to be up at the top
if (flags || !(master->smmu->features & ARM_SMMU_FEAT_NESTING))
return ERR_PTR(-EOPNOTSUPP);
> > +
> > + if (!(parent->type & __IOMMU_DOMAIN_PAGING))
> > + return ERR_PTR(-EINVAL);
> > +
> > + smmu_parent = to_smmu_domain(parent);
> > + if (smmu_parent->stage != ARM_SMMU_DOMAIN_S2 ||
>
> Maybe "!smmu_parent->nest_parent" instead.
Hmm, yes.. Actually we can delete it, and the paging test above.
The core code checks it.
Though I think we missed owner validation there??
@@ -225,7 +225,8 @@ iommufd_hwpt_nested_alloc(struct iommufd_ctx *ictx,
if ((flags & ~IOMMU_HWPT_FAULT_ID_VALID) ||
!user_data->len || !ops->domain_alloc_user)
return ERR_PTR(-EOPNOTSUPP);
- if (parent->auto_domain || !parent->nest_parent)
+ if (parent->auto_domain || !parent->nest_parent ||
+ parent->common.domain->owner != ops)
return ERR_PTR(-EINVAL);
Right??
> [---]
> > + smmu_parent->smmu != master->smmu)
> > + return ERR_PTR(-EINVAL);
>
> It'd be slightly nicer if we do all the non-arg validations prior
> to calling iommu_copy_struct_from_user(). Then, the following arg
> validations would be closer to the copy().
Sure
> > struct arm_smmu_entry_writer {
> > @@ -830,6 +849,7 @@ struct arm_smmu_master_domain {
> > struct list_head devices_elm;
> > struct arm_smmu_master *master;
> > ioasid_t ssid;
> > + u8 nest_parent;
>
> Would it be nicer to match with the one in struct arm_smmu_domain:
> + bool nest_parent : 1;
> ?
Ah, lets just use bool
> > + * struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 Context Descriptor Table info
> > + * (IOMMU_HWPT_DATA_ARM_SMMUV3)
> > + *
> > + * @ste: The first two double words of the user space Stream Table Entry for
> > + * a user stage-1 Context Descriptor Table. Must be little-endian.
> > + * Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW Spec)
> > + * - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax
> > + * - word-1: S1DSS, S1CIR, S1COR, S1CSH, S1STALLD
>
> It seems that word-1 is missing EATS.
Yes, this was missed
Jason
next prev parent reply other threads:[~2024-08-28 19:01 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 15:51 [PATCH v2 0/8] Initial support for SMMUv3 nested translation Jason Gunthorpe
2024-08-27 15:51 ` [PATCH v2 1/8] vfio: Remove VFIO_TYPE1_NESTING_IOMMU Jason Gunthorpe
2024-08-30 7:40 ` Tian, Kevin
2024-08-27 15:51 ` [PATCH v2 2/8] iommu/arm-smmu-v3: Use S2FWB when available Jason Gunthorpe
2024-08-27 19:48 ` Nicolin Chen
2024-08-28 18:30 ` Jason Gunthorpe
2024-08-28 19:47 ` Nicolin Chen
2024-08-28 19:50 ` Nicolin Chen
2024-08-30 7:44 ` Tian, Kevin
2024-08-30 7:56 ` Nicolin Chen
2024-08-30 8:01 ` Tian, Kevin
2024-08-30 15:12 ` Mostafa Saleh
2024-08-30 16:40 ` Jason Gunthorpe
2024-09-02 9:29 ` Mostafa Saleh
2024-09-03 0:05 ` Jason Gunthorpe
2024-09-03 7:57 ` Mostafa Saleh
2024-09-03 23:33 ` Jason Gunthorpe
2024-09-10 10:55 ` Mostafa Saleh
2024-09-10 20:22 ` Jason Gunthorpe
2024-09-17 9:48 ` Mostafa Saleh
2024-09-04 14:20 ` Shameerali Kolothum Thodi
2024-09-04 15:00 ` Jason Gunthorpe
2024-09-10 11:25 ` Shameerali Kolothum Thodi
2024-09-11 22:52 ` Jason Gunthorpe
2024-08-27 15:51 ` [PATCH v2 3/8] ACPICA: IORT: Update for revision E.f Jason Gunthorpe
2024-08-29 10:14 ` Rafael J. Wysocki
2024-08-27 15:51 ` [PATCH v2 4/8] ACPI/IORT: Support CANWBS memory access flag Jason Gunthorpe
2024-08-30 7:52 ` Tian, Kevin
2024-08-30 13:54 ` Jason Gunthorpe
2024-09-03 7:14 ` Tian, Kevin
2024-08-27 15:51 ` [PATCH v2 5/8] iommu/arm-smmu-v3: Report IOMMU_CAP_ENFORCE_CACHE_COHERENCY for CANWBS Jason Gunthorpe
2024-08-27 20:12 ` Nicolin Chen
2024-08-28 19:12 ` Jason Gunthorpe
2024-08-30 15:19 ` Mostafa Saleh
2024-08-30 17:10 ` Jason Gunthorpe
2024-08-27 15:51 ` [PATCH v2 6/8] iommu/arm-smmu-v3: Support IOMMU_GET_HW_INFO via struct arm_smmu_hw_info Jason Gunthorpe
2024-08-30 7:55 ` Tian, Kevin
2024-08-30 15:23 ` Mostafa Saleh
2024-08-30 17:16 ` Jason Gunthorpe
2024-09-02 10:11 ` Mostafa Saleh
2024-09-03 0:16 ` Jason Gunthorpe
2024-09-03 8:34 ` Mostafa Saleh
2024-09-03 23:40 ` Jason Gunthorpe
2024-09-04 7:11 ` Shameerali Kolothum Thodi
2024-09-04 12:01 ` Jason Gunthorpe
2024-09-06 11:19 ` Mostafa Saleh
2024-08-27 15:51 ` [PATCH v2 7/8] iommu/arm-smmu-v3: Implement IOMMU_HWPT_ALLOC_NEST_PARENT Jason Gunthorpe
2024-08-27 20:16 ` Nicolin Chen
2024-08-30 7:58 ` Tian, Kevin
2024-08-30 13:55 ` Jason Gunthorpe
2024-08-30 15:27 ` Mostafa Saleh
2024-08-30 17:18 ` Jason Gunthorpe
2024-09-02 8:57 ` Mostafa Saleh
2024-08-27 15:51 ` [PATCH v2 8/8] iommu/arm-smmu-v3: Support IOMMU_DOMAIN_NESTED Jason Gunthorpe
2024-08-27 21:23 ` Nicolin Chen
2024-08-28 19:01 ` Jason Gunthorpe [this message]
2024-08-28 19:27 ` Nicolin Chen
2024-08-30 8:16 ` Tian, Kevin
2024-08-30 14:13 ` Jason Gunthorpe
2024-08-30 14:39 ` Jason Gunthorpe
2024-08-30 16:09 ` Mostafa Saleh
2024-08-30 16:59 ` Nicolin Chen
2024-08-30 17:04 ` Jason Gunthorpe
2024-09-02 9:57 ` Mostafa Saleh
2024-09-03 0:30 ` Jason Gunthorpe
2024-09-03 1:13 ` Nicolin Chen
2024-09-03 9:00 ` Mostafa Saleh
2024-09-03 23:55 ` Jason Gunthorpe
2024-09-06 11:07 ` Mostafa Saleh
2024-09-06 13:34 ` Jason Gunthorpe
2024-09-10 11:12 ` Mostafa Saleh
2024-09-15 21:39 ` Jason Gunthorpe
2024-09-06 18:28 ` Jason Gunthorpe
2024-09-06 18:49 ` Nicolin Chen
2024-09-06 23:15 ` Jason Gunthorpe
2024-08-27 21:31 ` [PATCH v2 0/8] Initial support for SMMUv3 nested translation Nicolin Chen
2024-08-28 16:31 ` Shameerali Kolothum Thodi
2024-08-28 17:14 ` Nicolin Chen
2024-08-28 18:06 ` Shameerali Kolothum Thodi
2024-08-28 18:12 ` Nicolin Chen
2024-08-29 13:14 ` Shameerali Kolothum Thodi
2024-08-29 14:52 ` Shameerali Kolothum Thodi
2024-08-29 16:10 ` Nicolin Chen
2024-08-30 9:07 ` Shameerali Kolothum Thodi
2024-08-30 17:01 ` Nicolin Chen
2024-09-12 3:42 ` Zhangfei Gao
2024-09-12 4:05 ` Nicolin Chen
2024-09-12 4:25 ` Baolu Lu
2024-09-12 7:32 ` Zhangfei Gao
2024-10-15 3:21 ` Zhangfei Gao
2024-10-15 13:09 ` Jason Gunthorpe
2024-10-17 1:53 ` Zhangfei Gao
2024-10-17 11:57 ` Jason Gunthorpe
2024-10-16 2:23 ` Zhangfei Gao
2024-10-16 11:53 ` Jason Gunthorpe
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