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Sun, 1 Sep 2024 18:08:09 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 08CtC4mt1GaZXwAAD6G6ig (envelope-from ); Sun, 01 Sep 2024 18:08:09 +0000 Date: Sun, 1 Sep 2024 20:08:07 +0200 From: Andreas Herrmann To: Ricardo Neri Cc: x86@kernel.org, Andreas Herrmann , Catalin Marinas , Chen Yu , Len Brown , Radu Rendec , Pierre Gondois , Pu Wen , "Rafael J. Wysocki" , Sudeep Holla , Srinivas Pandruvada , Will Deacon , Zhang Rui , Nikolay Borisov , Huang Ying , Ricardo Neri , linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/4] cacheinfo: Allocate memory for memory if not done from the primary CPU Message-ID: <20240901180807.GB4089@alberich> References: <20240827051635.9114-1-ricardo.neri-calderon@linux.intel.com> <20240827051635.9114-3-ricardo.neri-calderon@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20240827051635.9114-3-ricardo.neri-calderon@linux.intel.com> X-Rspamd-Queue-Id: B64C621B0C X-Spam-Score: -6.01 X-Rspamd-Action: no action X-Spamd-Result: default: False [-6.01 / 50.00]; BAYES_HAM(-3.00)[99.99%]; DWL_DNSWL_MED(-2.00)[suse.de:dkim]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_RHS_NOT_FQDN(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FUZZY_BLOCKED(0.00)[rspamd.com]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; ARC_NA(0.00)[]; RCPT_COUNT_TWELVE(0.00)[18]; MIME_TRACE(0.00)[0:+]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; TO_DN_SOME(0.00)[]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; MISSING_XM_UA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; DKIM_TRACE(0.00)[suse.de:+]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo,suse.de:email,suse.de:dkim,intel.com:email,arm.com:email] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spam-Flag: NO X-Spam-Level: On Mon, Aug 26, 2024 at 10:16:33PM -0700, Ricardo Neri wrote: > Commit 5944ce092b97 ("arch_topology: Build cacheinfo from primary CPU") > adds functionality that architectures can use to optionally allocate and > build cacheinfo early during boot. Commit 6539cffa9495 ("cacheinfo: Add > arch specific early level initializer") lets secondary CPUs correct (and > reallocate memory) cacheinfo data if needed. > > If the early build functionality is not used and cacheinfo does not need > correction, memory for cacheinfo is never allocated. x86 does not use the > early build functionality. Consequently, during the cacheinfo CPU hotplug > callback, last_level_cache_is_valid() attempts to dereference a NULL > pointer: > > BUG: kernel NULL pointer dereference, address: 0000000000000100 > #PF: supervisor read access in kernel mode > #PF: error_code(0x0000) - not present page > PGD 0 P4D 0 > Oops: 0000 [#1] PREEPMT SMP NOPTI > CPU: 0 PID 19 Comm: cpuhp/0 Not tainted 6.4.0-rc2 #1 > RIP: 0010: last_level_cache_is_valid+0x95/0xe0a > > Allocate memory for cacheinfo during the cacheinfo CPU hotplug callback if > not done earlier. > > Reviewed-by: Radu Rendec > Reviewed-by: Sudeep Holla > Fixes: 6539cffa9495 ("cacheinfo: Add arch specific early level initializer") > Signed-off-by: Ricardo Neri Reviewed-by: Andreas Herrmann Tested-by: Andreas Herrmann Test was done with a system equipped with AMD Phenom II X6 1055T and test kernels based on v6.11-rc5-176-g20371ba12063. Thanks, Andreas