From: Trevor Woerner <twoerner@gmail.com>
To: yocto-patches@lists.yoctoproject.org
Subject: [meta-rockchip][PATCH] remove upstreamed rk3328 patch
Date: Tue, 10 Sep 2024 00:42:47 -0400 [thread overview]
Message-ID: <20240910044247.31838-1-twoerner@gmail.com> (raw)
oe-core recently bumped linux-yocto to v6.10.8 which already contains this
patch to fix the pinctrl driver for the rk3328-based Rockchip SoCs (which
enables SPI to work again).
oe-core: 48ac41fdc02c ("linux-yocto/6.10: update to v6.10.8")
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
---
...-correct-RK3328-iomux-width-flag-for.patch | 51 -------------------
recipes-kernel/linux/linux-yocto_%.bbappend | 1 -
2 files changed, 52 deletions(-)
delete mode 100644 recipes-kernel/linux/linux-yocto/rk3328/0001-pinctrl-rockchip-correct-RK3328-iomux-width-flag-for.patch
diff --git a/recipes-kernel/linux/linux-yocto/rk3328/0001-pinctrl-rockchip-correct-RK3328-iomux-width-flag-for.patch b/recipes-kernel/linux/linux-yocto/rk3328/0001-pinctrl-rockchip-correct-RK3328-iomux-width-flag-for.patch
deleted file mode 100644
index 08f218ec6c6a..000000000000
--- a/recipes-kernel/linux/linux-yocto/rk3328/0001-pinctrl-rockchip-correct-RK3328-iomux-width-flag-for.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From ed875ae5b8ca511c11d227c0d9c6d2d13a2e6c15 Mon Sep 17 00:00:00 2001
-From: Huang-Huang Bao <i@eh5.me>
-Date: Tue, 9 Jul 2024 18:54:28 +0800
-Subject: [PATCH] pinctrl: rockchip: correct RK3328 iomux width flag for
- GPIO2-B pins
-
-The base iomux offsets for each GPIO pin line are accumulatively
-calculated based off iomux width flag in rockchip_pinctrl_get_soc_data.
-If the iomux width flag is one of IOMUX_WIDTH_4BIT, IOMUX_WIDTH_3BIT or
-IOMUX_WIDTH_2BIT, the base offset for next pin line would increase by 8
-bytes, otherwise it would increase by 4 bytes.
-
-Despite most of GPIO2-B iomux have 2-bit data width, which can be fit
-into 4 bytes space with write mask, it actually take 8 bytes width for
-whole GPIO2-B line.
-
-Commit e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328
-GPIO2-B pins") wrongly set iomux width flag to 0, causing all base
-iomux offset for line after GPIO2-B to be calculated wrong. Fix the
-iomux width flag to IOMUX_WIDTH_2BIT so the offset after GPIO2-B is
-correctly increased by 8, matching the actual width of GPIO2-B iomux.
-
-Fixes: e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
-Cc: stable@vger.kernel.org
-Reported-by: Richard Kojedzinszky <richard@kojedz.in>
-Closes: https://lore.kernel.org/linux-rockchip/4f29b743202397d60edfb3c725537415@kojedz.in/
-Tested-By: Trevor Woerner <twoerner@gmail.com>
-Tested-by: Richard Kojedzinszky <richard@kojedz.in>
-Signed-off-by: Huang-Huang Bao <i@eh5.me>
-
-Upstream-Status: Submitted
----
- drivers/pinctrl/pinctrl-rockchip.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
-index 6a7461978630..7b7b8601d01a 100644
---- a/drivers/pinctrl/pinctrl-rockchip.c
-+++ b/drivers/pinctrl/pinctrl-rockchip.c
-@@ -3800,7 +3800,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
- PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
- PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
- PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
-- 0,
-+ IOMUX_WIDTH_2BIT,
- IOMUX_WIDTH_3BIT,
- 0),
- PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
---
-2.44.0.478.g7774cfed6261
-
diff --git a/recipes-kernel/linux/linux-yocto_%.bbappend b/recipes-kernel/linux/linux-yocto_%.bbappend
index 509138034082..5528bab0d17c 100644
--- a/recipes-kernel/linux/linux-yocto_%.bbappend
+++ b/recipes-kernel/linux/linux-yocto_%.bbappend
@@ -25,4 +25,3 @@ COMPATIBLE_MACHINE:rock-5b = "rock-5b"
SRC_URI:append = " file://rockchip-kmeta;type=kmeta;name=rockchip-kmeta;destsuffix=rockchip-kmeta"
SRC_URI:append:nanopi-r4s = " file://nanopi-r4s.scc"
-SRC_URI:append:rk3328 = " file://0001-pinctrl-rockchip-correct-RK3328-iomux-width-flag-for.patch"
--
2.44.0.501.g19981daefd7c
reply other threads:[~2024-09-10 4:42 UTC|newest]
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