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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
	<dan.j.williams@intel.com>, <martin.habets@xilinx.com>,
	<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
	<pabeni@redhat.com>, <edumazet@google.com>,
	Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH v3 06/20] cxl: add functions for resource request/release by a driver
Date: Fri, 13 Sep 2024 18:35:20 +0100	[thread overview]
Message-ID: <20240913183520.000002be@Huawei.com> (raw)
In-Reply-To: <20240907081836.5801-7-alejandro.lucero-palau@amd.com>

On Sat, 7 Sep 2024 09:18:22 +0100
alejandro.lucero-palau@amd.com wrote:

> From: Alejandro Lucero <alucerop@amd.com>
> 
> Create accessors for an accel driver requesting and
> releaseing a resource.
> 
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> ---
>  drivers/cxl/core/memdev.c          | 40 ++++++++++++++++++++++++++++++
>  drivers/net/ethernet/sfc/efx_cxl.c |  7 ++++++
>  include/linux/cxl/cxl.h            |  2 ++
>  3 files changed, 49 insertions(+)
> 
> diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c
> index 10c0a6990f9a..a7d8daf4a59b 100644
> --- a/drivers/cxl/core/memdev.c
> +++ b/drivers/cxl/core/memdev.c
> @@ -744,6 +744,46 @@ int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res,
>  }
>  EXPORT_SYMBOL_NS_GPL(cxl_set_resource, CXL);
>  
> +int cxl_request_resource(struct cxl_dev_state *cxlds, enum cxl_resource type)
> +{
> +	int rc;
> +
> +	switch (type) {
> +	case CXL_ACCEL_RES_RAM:
> +		rc = request_resource(&cxlds->dpa_res, &cxlds->ram_res);
> +		break;
> +	case CXL_ACCEL_RES_PMEM:
> +		rc = request_resource(&cxlds->dpa_res, &cxlds->pmem_res);
> +		break;

return request_resource()

> +	default:
> +		dev_err(cxlds->dev, "unknown resource type (%u)\n", type);

No unknown. We know exactly what it is (DPA) but we don't have it.
Unexpected maybe?

> +		return -EINVAL;
> +	}
> +
> +	return rc;
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_request_resource, CXL);
> +
> +int cxl_release_resource(struct cxl_dev_state *cxlds, enum cxl_resource type)
> +{
> +	int rc;
> +
> +	switch (type) {
> +	case CXL_ACCEL_RES_RAM:
> +		rc = release_resource(&cxlds->ram_res);
> +		break;
> +	case CXL_ACCEL_RES_PMEM:
> +		rc = release_resource(&cxlds->pmem_res);
return ..

> +		break;
> +	default:
> +		dev_err(cxlds->dev, "unknown resource type (%u)\n", type);

As above. Probably know what we got, it it unexpected not unknown.

> +		return -EINVAL;
> +	}
> +
> +	return rc;
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_release_resource, CXL);
> +
>  static int cxl_memdev_release_file(struct inode *inode, struct file *file)
>  {
>  	struct cxl_memdev *cxlmd =
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> index fee143e94c1f..80259c8317fd 100644
> --- a/drivers/net/ethernet/sfc/efx_cxl.c
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -72,6 +72,12 @@ int efx_cxl_init(struct efx_nic *efx)
>  		goto err;
>  	}
>  
> +	rc = cxl_request_resource(cxl->cxlds, CXL_ACCEL_RES_RAM);
> +	if (rc) {
> +		pci_err(pci_dev, "CXL request resource failed");
> +		goto err;
> +	}
> +
>  	return 0;
>  err:
>  	kfree(cxl->cxlds);
> @@ -84,6 +90,7 @@ int efx_cxl_init(struct efx_nic *efx)
>  void efx_cxl_exit(struct efx_nic *efx)
>  {
>  	if (efx->cxl) {
> +		cxl_release_resource(efx->cxl->cxlds, CXL_ACCEL_RES_RAM);
>  		kfree(efx->cxl->cxlds);
>  		kfree(efx->cxl);
>  	}
> diff --git a/include/linux/cxl/cxl.h b/include/linux/cxl/cxl.h
> index f2dcba6cdc22..22912b2d9bb2 100644
> --- a/include/linux/cxl/cxl.h
> +++ b/include/linux/cxl/cxl.h
> @@ -52,4 +52,6 @@ int cxl_set_resource(struct cxl_dev_state *cxlds, struct resource res,
>  bool cxl_pci_check_caps(struct cxl_dev_state *cxlds, u32 expected_caps,
>  			u32 *current_caps);
>  int cxl_pci_accel_setup_regs(struct pci_dev *pdev, struct cxl_dev_state *cxlds);
> +int cxl_request_resource(struct cxl_dev_state *cxlds, enum cxl_resource type);
> +int cxl_release_resource(struct cxl_dev_state *cxlds, enum cxl_resource type);
>  #endif


  parent reply	other threads:[~2024-09-13 17:35 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-07  8:18 [PATCH v3 00/20] cxl: add Type2 device support alejandro.lucero-palau
2024-09-07  8:18 ` [PATCH v3 01/20] cxl: add type2 device basic support alejandro.lucero-palau
2024-09-07 20:26   ` kernel test robot
2024-09-10  6:12   ` Li, Ming4
2024-09-10  7:25     ` Alejandro Lucero Palau
2024-09-12  8:57   ` Zhi Wang
2024-09-16  9:52     ` Alejandro Lucero Palau
2024-09-12  9:35   ` Zhi Wang
2024-09-16 10:03     ` Alejandro Lucero Palau
2024-09-13 16:41   ` Jonathan Cameron
2024-09-16 12:03     ` Alejandro Lucero Palau
2024-09-16 12:24       ` Jonathan Cameron
2024-09-07  8:18 ` [PATCH v3 02/20] cxl: add capabilities field to cxl_dev_state and cxl_port alejandro.lucero-palau
2024-09-07 18:08   ` kernel test robot
2024-09-11 22:17   ` Dave Jiang
2024-09-16  8:36     ` Alejandro Lucero Palau
2024-09-16 16:07       ` Dave Jiang
2024-09-13 17:25   ` Jonathan Cameron
2024-09-16 12:13     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 03/20] cxl/pci: add check for validating capabilities alejandro.lucero-palau
2024-09-10  3:26   ` Li, Ming4
2024-09-10  6:24     ` Li, Ming4
2024-09-10  7:31       ` Alejandro Lucero Palau
2024-09-11 23:06   ` Dave Jiang
2024-09-16  8:56     ` Alejandro Lucero Palau
2024-09-16 16:11       ` Dave Jiang
2024-09-13 17:28   ` Jonathan Cameron
2024-09-16 12:17     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 04/20] cxl: move pci generic code alejandro.lucero-palau
2024-09-11 23:55   ` Dave Jiang
2024-09-16  9:46     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 05/20] cxl: add function for type2 cxl regs setup alejandro.lucero-palau
2024-09-10  6:00   ` Li, Ming4
2024-09-10  7:24     ` Alejandro Lucero Palau
2024-09-12  9:08       ` Zhi Wang
2024-09-13 17:32   ` Jonathan Cameron
2024-09-16 12:23     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 06/20] cxl: add functions for resource request/release by a driver alejandro.lucero-palau
2024-09-10  6:15   ` Li, Ming4
2024-09-16  8:15     ` Alejandro Lucero Palau
2024-09-13 17:35   ` Jonathan Cameron [this message]
2024-09-16 12:33     ` Alejandro Lucero Palau
2024-09-16 13:21       ` Jonathan Cameron
2024-09-07  8:18 ` [PATCH v3 07/20] cxl: harden resource_contains checks to handle zero size resources alejandro.lucero-palau
2024-09-13 17:36   ` Jonathan Cameron
2024-09-16 12:36     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 08/20] cxl: add function for setting media ready by a driver alejandro.lucero-palau
2024-09-07  8:18 ` [PATCH v3 09/20] cxl: support type2 memdev creation alejandro.lucero-palau
2024-09-12 18:19   ` Dave Jiang
2024-09-16 12:38     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 10/20] cxl: indicate probe deferral alejandro.lucero-palau
2024-09-10  6:37   ` Li, Ming4
2024-09-16  8:24     ` Alejandro Lucero Palau
2024-09-17  3:31       ` Li, Ming4
2024-09-17  9:16         ` Alejandro Lucero Palau
2024-09-12  9:19   ` Zhi Wang
2024-09-16 10:08     ` Alejandro Lucero Palau
2024-09-13 17:43   ` Jonathan Cameron
2024-09-16 13:24     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 11/20] cxl: define a driver interface for HPA free space enumaration alejandro.lucero-palau
2024-09-13 17:52   ` Jonathan Cameron
2024-09-16 14:09     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 12/20] efx: use acquire_endpoint when looking for free HPA alejandro.lucero-palau
2024-09-07 19:33   ` kernel test robot
2024-09-12 23:09   ` Dave Jiang
2024-09-16 10:29     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 13/20] cxl: define a driver interface for DPA allocation alejandro.lucero-palau
2024-09-13 17:59   ` Jonathan Cameron
2024-09-16 14:26     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 14/20] cxl: make region type based on endpoint type alejandro.lucero-palau
2024-09-07  8:18 ` [PATCH v3 15/20] cxl/region: factor out interleave ways setup alejandro.lucero-palau
2024-09-07  8:18 ` [PATCH v3 16/20] cxl/region: factor out interleave granularity setup alejandro.lucero-palau
2024-09-07  8:18 ` [PATCH v3 17/20] cxl: allow region creation by type2 drivers alejandro.lucero-palau
2024-09-13 18:08   ` Jonathan Cameron
2024-09-16 16:31     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 18/20] cxl: preclude device memory to be used for dax alejandro.lucero-palau
2024-09-13 17:26   ` Dave Jiang
2024-09-16 14:32     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 19/20] cxl: add function for obtaining params from a region alejandro.lucero-palau
2024-09-13 17:48   ` Dave Jiang
2024-09-16 16:22     ` Alejandro Lucero Palau
2024-09-07  8:18 ` [PATCH v3 20/20] efx: support pio mapping based on cxl alejandro.lucero-palau
2024-09-13 17:45   ` Edward Cree
2024-09-16 16:12     ` Alejandro Lucero Palau
2024-09-13 17:52   ` Dave Jiang
2024-09-16 16:23     ` Alejandro Lucero Palau
2024-09-13 18:10   ` Jonathan Cameron
2024-09-16 16:23     ` Alejandro Lucero Palau

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