From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A4F5FA374A for ; Fri, 13 Sep 2024 12:42:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zGAAEaRYQ5xLgov22MAV/Zo9rdcE1lRLgf9uE43Qh/4=; b=5GI9Uw8cYapnNv iHtXT3/8f+ef3vSExVXxvxyjQe1y1BqiDNcUnHcsDxpc9I1CsH+t+t8JXM8osRYJdG+fdgN+hXQkK Bvgig9qoWvM91YyUx2EAsUV5dqoL86I/vmCUnUCkV8lbIeGivSvvSko7oWwmTrXfWFbu5488PdOqn Ozy2uMGiR20wKi9TOE64A6dANLp5AvU6dulW5bRjdn5AYLfjV6BiFLNtvR8z1iqi8rowGYc7czhZz w/ELt/CU6AlqAAWZWaOIlxgqQfAnu1lEXJ/GJpERjvlutUvlISqTy21+vYOmpVQT9rKTyzawKDgYs QamXQoaNEI56/oXFhFgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sp5cu-0000000FwLz-1hLO; Fri, 13 Sep 2024 12:42:16 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sp5cr-0000000FwLh-482U for linux-riscv@lists.infradead.org; Fri, 13 Sep 2024 12:42:15 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id D3BBA5C055E; Fri, 13 Sep 2024 12:42:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 903E7C4CEC0; Fri, 13 Sep 2024 12:42:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1726231333; bh=Z458e25P5sMZPiUvcMK90HVD/MY6/klAorNSKi5ld6s=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=H2+N+/osF+w+n9MBkQvfOimEr9WFWLtVerEqIJhlgpssLVWlplAJf0TOGfCZcbUZb D35Tffti/f+NY4akk0mTKqJQTzMD6IL7FmSjfdQEI4UuLXQjwCYEF20f8lyeq7Gu19 e4h/+fFpgBHweao1PWY5GckFncMwGoyYlSHxhFa4= Date: Fri, 13 Sep 2024 14:42:10 +0200 From: Greg KH To: WangYuli Cc: stable@vger.kernel.org, sashal@kernel.org, william.qiu@starfivetech.com, emil.renner.berthing@canonical.com, conor.dooley@microchip.com, xingyu.wu@starfivetech.com, walker.chen@starfivetech.com, robh@kernel.org, hal.feng@starfivetech.com, kernel@esmil.dk, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, richardcochran@gmail.com, netdev@vger.kernel.org Subject: Re: [PATCH 6.6 v2 1/4] riscv: dts: starfive: add assigned-clock* to limit frquency Message-ID: <2024091350-lapdog-tarot-0130@gregkh> References: <3A31C289BC240955+20240912025539.1928223-1-wangyuli@uniontech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <3A31C289BC240955+20240912025539.1928223-1-wangyuli@uniontech.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240913_054214_084456_0E09923B X-CRM114-Status: UNSURE ( 9.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Sep 12, 2024 at 10:55:05AM +0800, WangYuli wrote: > From: William Qiu > > [ Upstream commit af571133f7ae028ec9b5fdab78f483af13bf28d3 ] > > In JH7110 SoC, we need to go by-pass mode, so we need add the > assigned-clock* properties to limit clock frquency. > > Signed-off-by: William Qiu > Reviewed-by: Emil Renner Berthing > Signed-off-by: Conor Dooley > Signed-off-by: WangYuli > --- > .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) Please rework this series and send only what is needed here. thanks, greg k-h _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C16F1D6DA0; Fri, 13 Sep 2024 12:42:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726231333; cv=none; b=biLo8qrcsWQGxpFhBcWWDetmutZgo8ncQDjT/vTHW8Y+Owry75a4hFsl5YVcIcxLd4Es01E55Lgu5G1FAV8JxRQy/38cb955t4mp5jhZuDYPzu8o4LDOtIB4VRl5QwgIgxMwnJ/93lJ/uzOxoUJnN5OiofmnMN/wOKFHxFPUoKE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726231333; c=relaxed/simple; bh=Z458e25P5sMZPiUvcMK90HVD/MY6/klAorNSKi5ld6s=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=F6uOQWgYDliFD9xmKxxfRcDqt4pFXCdTJiWfRvzhSrTbYc337vxRk/CL16Z3Lz3XhxoDVPX2BRX5N7OQjScVi8F04HvlE9uwiPg+vVJKn6TFtv2GJgFjvNdAvCFuZi6n+Fz+QJZZrmUNQC4sqbsUeedjXqMaxoRPEMyzAkJbCyQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=H2+N+/os; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="H2+N+/os" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 903E7C4CEC0; Fri, 13 Sep 2024 12:42:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1726231333; bh=Z458e25P5sMZPiUvcMK90HVD/MY6/klAorNSKi5ld6s=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=H2+N+/osF+w+n9MBkQvfOimEr9WFWLtVerEqIJhlgpssLVWlplAJf0TOGfCZcbUZb D35Tffti/f+NY4akk0mTKqJQTzMD6IL7FmSjfdQEI4UuLXQjwCYEF20f8lyeq7Gu19 e4h/+fFpgBHweao1PWY5GckFncMwGoyYlSHxhFa4= Date: Fri, 13 Sep 2024 14:42:10 +0200 From: Greg KH To: WangYuli Cc: stable@vger.kernel.org, sashal@kernel.org, william.qiu@starfivetech.com, emil.renner.berthing@canonical.com, conor.dooley@microchip.com, xingyu.wu@starfivetech.com, walker.chen@starfivetech.com, robh@kernel.org, hal.feng@starfivetech.com, kernel@esmil.dk, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, richardcochran@gmail.com, netdev@vger.kernel.org Subject: Re: [PATCH 6.6 v2 1/4] riscv: dts: starfive: add assigned-clock* to limit frquency Message-ID: <2024091350-lapdog-tarot-0130@gregkh> References: <3A31C289BC240955+20240912025539.1928223-1-wangyuli@uniontech.com> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3A31C289BC240955+20240912025539.1928223-1-wangyuli@uniontech.com> On Thu, Sep 12, 2024 at 10:55:05AM +0800, WangYuli wrote: > From: William Qiu > > [ Upstream commit af571133f7ae028ec9b5fdab78f483af13bf28d3 ] > > In JH7110 SoC, we need to go by-pass mode, so we need add the > assigned-clock* properties to limit clock frquency. > > Signed-off-by: William Qiu > Reviewed-by: Emil Renner Berthing > Signed-off-by: Conor Dooley > Signed-off-by: WangYuli > --- > .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) Please rework this series and send only what is needed here. thanks, greg k-h