From: Simon Horman <horms@kernel.org>
To: Wei Huang <wei.huang2@amd.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, netdev@vger.kernel.org,
Jonathan.Cameron@huawei.com, helgaas@kernel.org, corbet@lwn.net,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, alex.williamson@redhat.com,
gospo@broadcom.com, michael.chan@broadcom.com,
ajit.khaparde@broadcom.com, somnath.kotur@broadcom.com,
andrew.gospodarek@broadcom.com, manoj.panicker2@amd.com,
Eric.VanTassell@amd.com, vadim.fedorenko@linux.dev,
bagasdotme@gmail.com, bhelgaas@google.com, lukas@wunner.de,
paul.e.luse@intel.com, jing2.liu@intel.com
Subject: Re: [PATCH V5 2/5] PCI/TPH: Add Steering Tag support
Date: Tue, 17 Sep 2024 17:14:10 +0100 [thread overview]
Message-ID: <20240917161410.GP167971@kernel.org> (raw)
In-Reply-To: <6efc219d-29e1-4169-8393-c7e4610347cc@amd.com>
On Tue, Sep 17, 2024 at 09:31:00AM -0500, Wei Huang wrote:
>
>
> On 9/17/24 02:32, Simon Horman wrote:
> > On Mon, Sep 16, 2024 at 03:51:00PM -0500, Wei Huang wrote:
> ...
> >> + val = readl(vec_ctrl);
> >> + mask = PCI_MSIX_ENTRY_CTRL_ST_LOWER | PCI_MSIX_ENTRY_CTRL_ST_UPPER;
> >> + val &= ~mask;
> >> + val |= FIELD_PREP(mask, (u32)tag);
> >
> > Hi Wei Huang,
> >
> > Unfortunately clang-18 (x86_64, allmodconfig, W=1, when applied to net-next)
> > complains about this. I think it is because it expects FIELD_PREP to be
> > used with a mask that is a built-in constant.
>
> I thought I fixed it, but apparently not enough for clang-18. I will
> address this problem, along with other comments from you and Bjorn (if any).
>
> BTW there is another code in drivers/gpu/drm/ using a similar approach.
Thanks,
I will run some checks over drivers/gpu/drm/ and let you know if they find
anything.
next prev parent reply other threads:[~2024-09-17 16:14 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-16 20:50 [PATCH V5 0/5] PCIe TPH and cache direct injection support Wei Huang
2024-09-16 20:50 ` [PATCH V5 1/5] PCI: Add TLP Processing Hints (TPH) support Wei Huang
2024-09-17 7:38 ` Simon Horman
2024-09-23 7:43 ` Lukas Wunner
2024-09-24 16:34 ` Wei Huang
2024-09-23 12:07 ` Alejandro Lucero Palau
2024-09-23 20:27 ` Wei Huang
2024-09-24 14:33 ` Alejandro Lucero Palau
2024-09-16 20:51 ` [PATCH V5 2/5] PCI/TPH: Add Steering Tag support Wei Huang
2024-09-17 7:32 ` Simon Horman
2024-09-17 14:31 ` Wei Huang
2024-09-17 16:14 ` Simon Horman [this message]
2024-09-17 16:24 ` Simon Horman
2024-09-20 10:38 ` kernel test robot
2024-09-16 20:51 ` [PATCH V5 3/5] PCI/TPH: Add TPH documentation Wei Huang
2024-09-16 20:51 ` [PATCH V5 4/5] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-09-16 21:25 ` Wei Huang
2024-09-23 7:25 ` Lukas Wunner
2024-09-23 20:16 ` Wei Huang
2024-09-17 7:35 ` Simon Horman
2024-09-20 10:38 ` kernel test robot
2024-09-16 20:51 ` [PATCH V5 5/5] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
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