From: kernel test robot <lkp@intel.com>
To: oe-kbuild@lists.linux.dev
Cc: lkp@intel.com
Subject: [wsa:renesas/genmai-upstreaming 9/17] arch/arm/boot/dts/renesas/r8a7792.dtsi:87.12-92.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
Date: Fri, 27 Sep 2024 14:00:38 +0800 [thread overview]
Message-ID: <202409271356.2EmUQASq-lkp@intel.com> (raw)
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
TO: Wolfram Sang <wsa-dev@sang-engineering.com>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/genmai-upstreaming
head: 083783626e28ad2ed5e51144b4b0d06ac2594a4e
commit: f559e35ddd01776ad08feaef14b1b14d5e5f8b5c [9/17] ARM: dts: renesas: add proper node names to (L)BSC devices
:::::: branch date: 19 hours ago
:::::: commit date: 19 hours ago
config: arm-randconfig-001-20240927 (https://download.01.org/0day-ci/archive/20240927/202409271356.2EmUQASq-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 7773243d9916f98ba0ffce0c3a960e4aa9f03e81)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240927/202409271356.2EmUQASq-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202409271356.2EmUQASq-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
>> arch/arm/boot/dts/renesas/r8a7792.dtsi:87.12-92.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
--
>> arch/arm/boot/dts/renesas/r8a7792.dtsi:87.12-92.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
--
>> arch/arm/boot/dts/renesas/r7s72100.dtsi:39.11-44.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/renesas/r7s72100.dtsi:403.26-408.5: Warning (unique_unit_address_if_enabled): /soc/watchdog@fcfe0000: duplicate unit-address (also used in node /soc/cpg_clocks@fcfe0000)
--
>> arch/arm/boot/dts/renesas/r8a7778.dtsi:43.11-48.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
--
>> arch/arm/boot/dts/renesas/r7s72100.dtsi:39.11-44.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts:32.17-72.4: Warning (avoid_unnecessary_addr_size): /flash@18000000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
arch/arm/boot/dts/renesas/r7s72100.dtsi:403.26-408.5: Warning (unique_unit_address_if_enabled): /soc/watchdog@fcfe0000: duplicate unit-address (also used in node /soc/cpg_clocks@fcfe0000)
--
>> arch/arm/boot/dts/renesas/r7s72100.dtsi:39.11-44.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/renesas/r7s72100-genmai.dts:33.17-60.4: Warning (avoid_unnecessary_addr_size): /flash@18000000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
arch/arm/boot/dts/renesas/r7s72100.dtsi:403.26-408.5: Warning (unique_unit_address_if_enabled): /soc/watchdog@fcfe0000: duplicate unit-address (also used in node /soc/cpg_clocks@fcfe0000)
--
>> arch/arm/boot/dts/renesas/r8a7779.dtsi:707.12-712.4: Warning (unit_address_vs_reg): /bus: node has a reg or ranges property, but no unit name
vim +87 arch/arm/boot/dts/renesas/r8a7792.dtsi
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 12
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 13 / {
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 14 compatible = "renesas,r8a7792";
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 15 #address-cells = <2>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 16 #size-cells = <2>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 17
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 18 aliases {
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 19 i2c0 = &i2c0;
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 20 i2c1 = &i2c1;
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 21 i2c2 = &i2c2;
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 22 i2c3 = &i2c3;
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 23 i2c4 = &i2c4;
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 24 i2c5 = &i2c5;
72cd625c85e268 arch/arm/boot/dts/r8a7792.dtsi Marek Vasut 2019-03-04 25 i2c6 = &iic3;
c9acea6efdd7b0 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-09-03 26 spi0 = &qspi;
b0663cd4211a26 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-09-05 27 spi1 = &msiof0;
b0663cd4211a26 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-09-05 28 spi2 = &msiof1;
a2d30b9c555f02 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 29 vin0 = &vin0;
a2d30b9c555f02 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 30 vin1 = &vin1;
a2d30b9c555f02 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 31 vin2 = &vin2;
a2d30b9c555f02 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 32 vin3 = &vin3;
a2d30b9c555f02 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 33 vin4 = &vin4;
a2d30b9c555f02 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 34 vin5 = &vin5;
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 35 };
78082700c8885a arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-07-23 36
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 37 /* External CAN clock */
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 38 can_clk: can {
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 39 compatible = "fixed-clock";
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 40 #clock-cells = <0>;
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 41 /* This value must be overridden by the board. */
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 42 clock-frequency = <0>;
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 43 };
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 44
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 45 cpus {
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 46 #address-cells = <1>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 47 #size-cells = <0>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 48
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 49 cpu0: cpu@0 {
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 50 device_type = "cpu";
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 51 compatible = "arm,cortex-a15";
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 52 reg = <0>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 53 clock-frequency = <1000000000>;
762dbc444ca240 arch/arm/boot/dts/r8a7792.dtsi Geert Uytterhoeven 2017-08-18 54 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 55 power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
a499e40a397c17 arch/arm/boot/dts/r8a7792.dtsi Geert Uytterhoeven 2021-05-19 56 enable-method = "renesas,apmu";
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 57 next-level-cache = <&L2_CA15>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 58 };
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 59
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 60 cpu1: cpu@1 {
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 61 device_type = "cpu";
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 62 compatible = "arm,cortex-a15";
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 63 reg = <1>;
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 64 clock-frequency = <1000000000>;
8684a24caa3d59 arch/arm/boot/dts/r8a7792.dtsi Geert Uytterhoeven 2017-10-12 65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 66 power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
a499e40a397c17 arch/arm/boot/dts/r8a7792.dtsi Geert Uytterhoeven 2021-05-19 67 enable-method = "renesas,apmu";
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 68 next-level-cache = <&L2_CA15>;
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 69 };
8fd763c75c3ab8 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-21 70
a0504f0880c11d arch/arm/boot/dts/r8a7792.dtsi Geert Uytterhoeven 2017-03-06 71 L2_CA15: cache-controller-0 {
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 72 compatible = "cache";
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 73 cache-unified;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 74 cache-level = <2>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 75 power-domains = <&sysc R8A7792_PD_CA15_SCU>;
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 76 };
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 77 };
7c4163aae3d8e5 arch/arm/boot/dts/r8a7792.dtsi Sergei Shtylyov 2016-06-13 78
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 79 /* External root clock */
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 80 extal_clk: extal {
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 81 compatible = "fixed-clock";
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 82 #clock-cells = <0>;
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 83 /* This value must be overridden by the board. */
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 84 clock-frequency = <0>;
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 85 };
c3d2c8d7c20e97 arch/arm/boot/dts/r8a7792.dtsi Simon Horman 2017-12-18 86
f559e35ddd0177 arch/arm/boot/dts/renesas/r8a7792.dtsi Wolfram Sang 2024-09-25 @87 lbsc: bus {
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
reply other threads:[~2024-09-27 6:01 UTC|newest]
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