Re: [PATCH v5 2/5] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

[Rob Herring <robh@kernel.org>]

On Wed, Oct 02, 2024 at 01:16:17PM +0800, Macpaul Lin wrote:
> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
> to an excessively long 'interrupts' property. The error message was:
> 
>   infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
>                      [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
>                      is too long
> 
> To address this issue, update the compatbile matching rule for
> 'interrupts' property. This change allows flexibility in the number
> of interrupts for new SoCs like MT8195.
> The purpose of these 5 interrupts is also added into description.
> 
> Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        | 29 ++++++++++++++++++-
>  1 file changed, 28 insertions(+), 1 deletion(-)
> 
> Changes for v2:
>  - commit message: re-formatting and add a description of adding 5 interrupts.
>  - add 'description' and 'maxItems: 5' for 'interrupt' property of
>    'mt8195-iommu-infra'
>  - others keeps 'maxItems: 1'
> 
> Changes for v3:
>  - Refine the description for 'interrupts' property and fixes the compatible
>    matching rules.
>  - Refine commit message.
> 
> Changes for v4:
>   - add missing 'minItems: 5' to 'mediatek,mt8195-iommu-infra'.
>     Thanks the explanation from Conor and Krzysztof. 
> 
> Changes for v5:
>   - Repharse the description for interrupts property of MT8195.
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> index ea6b0f5f24de..df8b2429008e 100644
> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> @@ -96,7 +96,16 @@ properties:
>      maxItems: 1
>  
>    interrupts:
> -    maxItems: 1
> +    description: |
> +      Usually, the IOMMU requires only one interrupt.
> +
> +      The infra IOMMU in MT8195 has five banks: each features one set
> +      of APB registers. One for the normal world (set 0), three for the
> +      protected world (sets 1-3), and one for the secure world (set 4).
> +      and each set has its own interrupt. Therefore, five interrupts
> +      are needed.
> +    minItems: 1
> +    maxItems: 5
>  
>    clocks:
>      items:
> @@ -210,6 +219,24 @@ allOf:
>        required:
>          - mediatek,larbs
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8195-iommu-infra
> +
> +    then:
> +      properties:
> +        interrupts:
> +          minItems: 5
> +          maxItems: 5

You only need minItems. The max is already 5.

With that,

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

> +
> +    else:
> +      properties:
> +        interrupts:
> +          maxItems: 1
> +
>  additionalProperties: false
>  
>  examples:
> -- 
> 2.45.2
>