From: Damien Le Moal <dlemoal@kernel.org>
To: "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Jingoo Han" <jingoohan1@gmail.com>,
linux-pci@vger.kernel.org
Cc: Rick Wertenbroek <rick.wertenbroek@gmail.com>,
Niklas Cassel <cassel@kernel.org>
Subject: [PATCH v3 7/7] PCI: dwc: endpoint: Define the .map_align() controller operation
Date: Fri, 4 Oct 2024 14:07:42 +0900 [thread overview]
Message-ID: <20241004050742.140664-8-dlemoal@kernel.org> (raw)
In-Reply-To: <20241004050742.140664-1-dlemoal@kernel.org>
The function dw_pcie_prog_outbound_atu() used to program outbound ATU
entries for mapping RC PCI addresses to local CPU addresses does not
allow PCI addresses that are not aligned to struct dw_pcie->region_align
(generally 64K).
Handle this constraint by defining the endpoint controller .map_align()
operation to calculate a mapping size and the offset into the mapping
based on the requested RC PCI address and size to map.
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index 43ba5c6738df..501e527c188e 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -268,6 +268,20 @@ static int dw_pcie_find_index(struct dw_pcie_ep *ep, phys_addr_t addr,
return -EINVAL;
}
+static int dw_pcie_ep_map_align(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
+ struct pci_epc_map *map)
+{
+ struct dw_pcie_ep *ep = epc_get_drvdata(epc);
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ size_t mask = pci->region_align - 1;
+
+ map->map_pci_addr = map->pci_addr & ~mask;
+ map->map_ofst = map->pci_addr & mask;
+ map->map_size = ALIGN(map->map_ofst + map->pci_size, ep->page_size);
+
+ return 0;
+}
+
static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
phys_addr_t addr)
{
@@ -444,6 +458,7 @@ static const struct pci_epc_ops epc_ops = {
.write_header = dw_pcie_ep_write_header,
.set_bar = dw_pcie_ep_set_bar,
.clear_bar = dw_pcie_ep_clear_bar,
+ .map_align = dw_pcie_ep_map_align,
.map_addr = dw_pcie_ep_map_addr,
.unmap_addr = dw_pcie_ep_unmap_addr,
.set_msi = dw_pcie_ep_set_msi,
--
2.46.2
next prev parent reply other threads:[~2024-10-04 5:07 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-04 5:07 [PATCH v3 0/7] Improve PCI memory mapping API Damien Le Moal
2024-10-04 5:07 ` [PATCH v3 1/7] PCI: endpoint: Introduce pci_epc_function_is_valid() Damien Le Moal
2024-10-04 5:07 ` [PATCH v3 2/7] PCI: endpoint: Improve pci_epc_mem_alloc_addr() Damien Le Moal
2024-10-04 11:45 ` Niklas Cassel
2024-10-04 5:07 ` [PATCH v3 3/7] PCI: endpoint: Introduce pci_epc_map_align() Damien Le Moal
2024-10-04 11:45 ` Niklas Cassel
2024-10-04 5:07 ` [PATCH v3 4/7] PCI: endpoint: Introduce pci_epc_mem_map()/unmap() Damien Le Moal
2024-10-04 11:47 ` Niklas Cassel
2024-10-04 13:29 ` Damien Le Moal
2024-10-07 2:01 ` kernel test robot
2024-10-04 5:07 ` [PATCH v3 5/7] PCI: endpoint: Update documentation Damien Le Moal
2024-10-04 11:51 ` Niklas Cassel
2024-10-04 5:07 ` [PATCH v3 6/7] PCI: endpoint: test: Use pci_epc_mem_map/unmap() Damien Le Moal
2024-10-04 12:11 ` Niklas Cassel
2024-10-04 13:47 ` Damien Le Moal
2024-10-06 11:48 ` Niklas Cassel
2024-10-06 22:15 ` Damien Le Moal
2024-10-04 5:07 ` Damien Le Moal [this message]
2024-10-04 12:12 ` [PATCH v3 7/7] PCI: dwc: endpoint: Define the .map_align() controller operation Niklas Cassel
2024-10-04 11:45 ` [PATCH v3 0/7] Improve PCI memory mapping API Niklas Cassel
2024-10-04 13:13 ` Niklas Cassel
2024-10-04 13:25 ` Damien Le Moal
2024-10-06 11:46 ` Niklas Cassel
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