From: Rob Herring <robh@kernel.org>
To: Andrea della Porta <andrea.porta@suse.com>
Cc: "Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
"Broadcom internal kernel review list"
<bcm-kernel-feedback-list@broadcom.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Derek Kiernan" <derek.kiernan@amd.com>,
"Dragan Cvetic" <dragan.cvetic@amd.com>,
"Arnd Bergmann" <arnd@arndb.de>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Saravana Kannan" <saravanak@google.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-rpi-kernel@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-gpio@vger.kernel.org,
"Masahiro Yamada" <masahiroy@kernel.org>,
"Stefan Wahren" <wahrenst@gmx.net>,
"Herve Codina" <herve.codina@bootlin.com>,
"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Andrew Lunn" <andrew@lunn.ch>
Subject: Re: [PATCH v2 03/14] dt-bindings: pci: Add common schema for devices accessible through PCI BARs
Date: Wed, 9 Oct 2024 21:47:46 -0500 [thread overview]
Message-ID: <20241010024746.GA978628-robh@kernel.org> (raw)
In-Reply-To: <e1d6c72d9f41218e755b615b9a985db075ce9c28.1728300189.git.andrea.porta@suse.com>
On Mon, Oct 07, 2024 at 02:39:46PM +0200, Andrea della Porta wrote:
> Common YAML schema for devices that exports internal peripherals through
> PCI BARs. The BARs are exposed as simple-buses through which the
> peripherals can be accessed.
>
> This is not intended to be used as a standalone binding, but should be
> included by device specific bindings.
>
> Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> ---
> .../devicetree/bindings/pci/pci-ep-bus.yaml | 69 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 70 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
> new file mode 100644
> index 000000000000..9d7a784b866a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Common properties for PCI MFD endpoints with peripherals addressable from BARs.
> +
> +maintainers:
> + - Andrea della Porta <andrea.porta@suse.com>
> +
> +description:
> + Define a generic node representing a PCI endpoint which contains several sub-
> + peripherals. The peripherals can be accessed through one or more BARs.
> + This common schema is intended to be referenced from device tree bindings, and
> + does not represent a device tree binding by itself.
> +
> +properties:
> + "#address-cells":
> + const: 3
> +
> + "#size-cells":
> + const: 2
> +
> + ranges:
> + minItems: 1
> + maxItems: 6
> + items:
> + maxItems: 8
> + additionalItems: true
> + items:
> + - maximum: 5 # The BAR number
> + - const: 0
> + - const: 0
> +
> +patternProperties:
> + "^pci-ep-bus@[0-5]$":
> + $ref: '#/$defs/pci-ep-bus'
This should just be:
additionalProperties: true
properties:
compatible:
const: simple-bus
required:
- compatible
Then the compatible will cause simple-bus.yaml to be applied to this
node.
> + description:
> + One node for each BAR used by peripherals contained in the PCI endpoint.
> + Each node represent a bus on which peripherals are connected.
> + This allows for some segmentation, e.g. one peripheral is accessible
> + through BAR0 and another through BAR1, and you don't want the two
> + peripherals to be able to act on the other BAR. Alternatively, when
> + different peripherals need to share BARs, you can define only one node
> + and use 'ranges' property to map all the used BARs.
> +
> +required:
> + - ranges
> + - '#address-cells'
> + - '#size-cells'
> +
> +$defs:
> + pci-ep-bus:
> + type: object
> + additionalProperties: true
> + properties:
> + compatible:
> + const: simple-bus
> + dma-ranges: true
> + ranges: true
> + "#address-cells": true
> + "#size-cells": true
> + required:
> + - compatible
> + - ranges
> + - '#address-cells'
> + - '#size-cells'
All this should be covered by simple-bus.yaml.
Rob
next prev parent reply other threads:[~2024-10-10 2:47 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-07 12:39 [PATCH v2 00/14] Add support for RaspberryPi RP1 PCI device using a DT overlay Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 01/14] dt-bindings: clock: Add RaspberryPi RP1 clock bindings Andrea della Porta
2024-10-08 6:31 ` Krzysztof Kozlowski
2024-10-21 17:07 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 02/14] dt-bindings: pinctrl: Add RaspberryPi RP1 gpio/pinctrl/pinmux bindings Andrea della Porta
2024-10-08 6:29 ` Krzysztof Kozlowski
2024-10-21 17:41 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 03/14] dt-bindings: pci: Add common schema for devices accessible through PCI BARs Andrea della Porta
2024-10-07 14:16 ` Rob Herring (Arm)
2024-10-08 6:24 ` Krzysztof Kozlowski
2024-10-22 9:16 ` Andrea della Porta
2024-10-10 2:47 ` Rob Herring [this message]
2024-10-22 9:16 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 04/14] dt-bindings: misc: Add device specific bindings for RaspberryPi RP1 Andrea della Porta
2024-10-08 6:26 ` Krzysztof Kozlowski
2024-10-22 10:00 ` Andrea della Porta
2024-10-10 2:52 ` Rob Herring
2024-10-22 9:30 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 05/14] PCI: of_property: Sanitize 32 bit PCI address parsed from DT Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 06/14] of: address: Preserve the flags portion on 1:1 dma-ranges mapping Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 07/14] gpiolib: Export symbol gpiochip_set_names() Andrea della Porta
2024-10-07 12:51 ` Bartosz Golaszewski
2024-10-07 12:39 ` [PATCH v2 08/14] clk: rp1: Add support for clocks provided by RP1 Andrea della Porta
2024-10-09 22:08 ` Stephen Boyd
2024-10-09 22:08 ` Stephen Boyd
2024-10-23 15:36 ` Andrea della Porta
2024-10-23 16:32 ` Herve Codina
2024-10-27 11:15 ` Andrea della Porta
2024-10-23 21:52 ` Stephen Boyd
2024-10-27 11:28 ` Andrea della Porta
2024-11-14 15:41 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 09/14] pinctrl: rp1: Implement RaspberryPi RP1 gpio support Andrea della Porta
2024-10-11 9:03 ` Linus Walleij
2024-10-11 10:08 ` Stefan Wahren
2024-10-27 11:32 ` Andrea della Porta
2024-10-27 11:32 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 10/14] arm64: dts: rp1: Add support for RaspberryPi's RP1 device Andrea della Porta
2024-10-07 14:57 ` Herve Codina
2024-10-27 13:26 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 11/14] misc: rp1: RaspberryPi RP1 misc driver Andrea della Porta
2024-10-07 15:41 ` Herve Codina
2024-10-28 9:57 ` Andrea della Porta
2024-10-10 19:03 ` kernel test robot
2024-10-11 5:15 ` kernel test robot
2024-10-24 15:21 ` Dave Stevenson
2024-10-25 8:29 ` Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 12/14] arm64: dts: bcm2712: Add external clock for RP1 chipset on Rpi5 Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 13/14] arm64: dts: Add DTS overlay for RP1 gpio line names Andrea della Porta
2024-10-07 12:39 ` [PATCH v2 14/14] arm64: defconfig: Enable RP1 misc/clock/gpio drivers Andrea della Porta
2024-10-08 6:32 ` Krzysztof Kozlowski
2024-10-28 10:36 ` Andrea della Porta
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