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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241007041218.157516-8-dlemoal@kernel.org> On Mon, Oct 07, 2024 at 01:12:13PM +0900, Damien Le Moal wrote: > Move the code in rockchip_pcie_ep_probe() to hide the MSI-X capability > to its own function, rockchip_pcie_ep_hide_msix_cap(). No functional > changes. > > Signed-off-by: Damien Le Moal Reviewed-by: Manivannan Sadhasivam Btw, can someone from Rockchip confirm if this hiding is necessary for all the SoCs? It looks to me like an SoC quirk. - Mani > --- > drivers/pci/controller/pcie-rockchip-ep.c | 54 +++++++++++++---------- > 1 file changed, 30 insertions(+), 24 deletions(-) > > diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c > index 523e9cdfd241..7a1798fcc2ad 100644 > --- a/drivers/pci/controller/pcie-rockchip-ep.c > +++ b/drivers/pci/controller/pcie-rockchip-ep.c > @@ -581,6 +581,34 @@ static void rockchip_pcie_ep_release_resources(struct rockchip_pcie_ep *ep) > pci_epc_mem_exit(ep->epc); > } > > +static void rockchip_pcie_ep_hide_msix_cap(struct rockchip_pcie *rockchip) > +{ > + u32 cfg_msi, cfg_msix_cp; > + > + /* > + * MSI-X is not supported but the controller still advertises the MSI-X > + * capability by default, which can lead to the Root Complex side > + * allocating MSI-X vectors which cannot be used. Avoid this by skipping > + * the MSI-X capability entry in the PCIe capabilities linked-list: get > + * the next pointer from the MSI-X entry and set that in the MSI > + * capability entry (which is the previous entry). This way the MSI-X > + * entry is skipped (left out of the linked-list) and not advertised. > + */ > + cfg_msi = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE + > + ROCKCHIP_PCIE_EP_MSI_CTRL_REG); > + > + cfg_msi &= ~ROCKCHIP_PCIE_EP_MSI_CP1_MASK; > + > + cfg_msix_cp = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE + > + ROCKCHIP_PCIE_EP_MSIX_CAP_REG) & > + ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK; > + > + cfg_msi |= cfg_msix_cp; > + > + rockchip_pcie_write(rockchip, cfg_msi, > + PCIE_EP_CONFIG_BASE + ROCKCHIP_PCIE_EP_MSI_CTRL_REG); > +} > + > static int rockchip_pcie_ep_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -588,7 +616,6 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) > struct rockchip_pcie *rockchip; > struct pci_epc *epc; > int err; > - u32 cfg_msi, cfg_msix_cp; > > ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL); > if (!ep) > @@ -619,6 +646,8 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) > if (err) > goto err_disable_clocks; > > + rockchip_pcie_ep_hide_msix_cap(rockchip); > + > /* Establish the link automatically */ > rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE, > PCIE_CLIENT_CONFIG); > @@ -626,29 +655,6 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) > /* Only enable function 0 by default */ > rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG); > > - /* > - * MSI-X is not supported but the controller still advertises the MSI-X > - * capability by default, which can lead to the Root Complex side > - * allocating MSI-X vectors which cannot be used. Avoid this by skipping > - * the MSI-X capability entry in the PCIe capabilities linked-list: get > - * the next pointer from the MSI-X entry and set that in the MSI > - * capability entry (which is the previous entry). This way the MSI-X > - * entry is skipped (left out of the linked-list) and not advertised. > - */ > - cfg_msi = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE + > - ROCKCHIP_PCIE_EP_MSI_CTRL_REG); > - > - cfg_msi &= ~ROCKCHIP_PCIE_EP_MSI_CP1_MASK; > - > - cfg_msix_cp = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_BASE + > - ROCKCHIP_PCIE_EP_MSIX_CAP_REG) & > - ROCKCHIP_PCIE_EP_MSIX_CAP_CP_MASK; > - > - cfg_msi |= cfg_msix_cp; > - > - rockchip_pcie_write(rockchip, cfg_msi, > - PCIE_EP_CONFIG_BASE + ROCKCHIP_PCIE_EP_MSI_CTRL_REG); > - > rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE, > PCIE_CLIENT_CONFIG); > > -- > 2.46.2 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate 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base64 Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org T24gTW9uLCBPY3QgMDcsIDIwMjQgYXQgMDE6MTI6MTNQTSArMDkwMCwgRGFtaWVuIExlIE1vYWwg d3JvdGU6Cj4gTW92ZSB0aGUgY29kZSBpbiByb2NrY2hpcF9wY2llX2VwX3Byb2JlKCkgdG8gaGlk ZSB0aGUgTVNJLVggY2FwYWJpbGl0eQo+IHRvIGl0cyBvd24gZnVuY3Rpb24sIHJvY2tjaGlwX3Bj aWVfZXBfaGlkZV9tc2l4X2NhcCgpLiBObyBmdW5jdGlvbmFsCj4gY2hhbmdlcy4KPiAKPiBTaWdu ZWQtb2ZmLWJ5OiBEYW1pZW4gTGUgTW9hbCA8ZGxlbW9hbEBrZXJuZWwub3JnPgoKUmV2aWV3ZWQt Ynk6IE1hbml2YW5uYW4gU2FkaGFzaXZhbSA8bWFuaXZhbm5hbi5zYWRoYXNpdmFtQGxpbmFyby5v cmc+CgpCdHcsIGNhbiBzb21lb25lIGZyb20gUm9ja2NoaXAgY29uZmlybSBpZiB0aGlzIGhpZGlu ZyBpcyBuZWNlc3NhcnkgZm9yIGFsbCB0aGUKU29Dcz8gSXQgbG9va3MgdG8gbWUgbGlrZSBhbiBT b0MgcXVpcmsuCgotIE1hbmkKCj4gLS0tCj4gIGRyaXZlcnMvcGNpL2NvbnRyb2xsZXIvcGNpZS1y b2NrY2hpcC1lcC5jIHwgNTQgKysrKysrKysrKysrKy0tLS0tLS0tLS0KPiAgMSBmaWxlIGNoYW5n ZWQsIDMwIGluc2VydGlvbnMoKyksIDI0IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9k cml2ZXJzL3BjaS9jb250cm9sbGVyL3BjaWUtcm9ja2NoaXAtZXAuYyBiL2RyaXZlcnMvcGNpL2Nv bnRyb2xsZXIvcGNpZS1yb2NrY2hpcC1lcC5jCj4gaW5kZXggNTIzZTljZGZkMjQxLi43YTE3OThm Y2MyYWQgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9wY2llLXJvY2tjaGlw LWVwLmMKPiArKysgYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL3BjaWUtcm9ja2NoaXAtZXAuYwo+ IEBAIC01ODEsNiArNTgxLDM0IEBAIHN0YXRpYyB2b2lkIHJvY2tjaGlwX3BjaWVfZXBfcmVsZWFz ZV9yZXNvdXJjZXMoc3RydWN0IHJvY2tjaGlwX3BjaWVfZXAgKmVwKQo+ICAJcGNpX2VwY19tZW1f ZXhpdChlcC0+ZXBjKTsKPiAgfQo+ICAKPiArc3RhdGljIHZvaWQgcm9ja2NoaXBfcGNpZV9lcF9o aWRlX21zaXhfY2FwKHN0cnVjdCByb2NrY2hpcF9wY2llICpyb2NrY2hpcCkKPiArewo+ICsJdTMy IGNmZ19tc2ksIGNmZ19tc2l4X2NwOwo+ICsKPiArCS8qCj4gKwkgKiBNU0ktWCBpcyBub3Qgc3Vw cG9ydGVkIGJ1dCB0aGUgY29udHJvbGxlciBzdGlsbCBhZHZlcnRpc2VzIHRoZSBNU0ktWAo+ICsJ ICogY2FwYWJpbGl0eSBieSBkZWZhdWx0LCB3aGljaCBjYW4gbGVhZCB0byB0aGUgUm9vdCBDb21w bGV4IHNpZGUKPiArCSAqIGFsbG9jYXRpbmcgTVNJLVggdmVjdG9ycyB3aGljaCBjYW5ub3QgYmUg dXNlZC4gQXZvaWQgdGhpcyBieSBza2lwcGluZwo+ICsJICogdGhlIE1TSS1YIGNhcGFiaWxpdHkg ZW50cnkgaW4gdGhlIFBDSWUgY2FwYWJpbGl0aWVzIGxpbmtlZC1saXN0OiBnZXQKPiArCSAqIHRo ZSBuZXh0IHBvaW50ZXIgZnJvbSB0aGUgTVNJLVggZW50cnkgYW5kIHNldCB0aGF0IGluIHRoZSBN U0kKPiArCSAqIGNhcGFiaWxpdHkgZW50cnkgKHdoaWNoIGlzIHRoZSBwcmV2aW91cyBlbnRyeSku IFRoaXMgd2F5IHRoZSBNU0ktWAo+ICsJICogZW50cnkgaXMgc2tpcHBlZCAobGVmdCBvdXQgb2Yg dGhlIGxpbmtlZC1saXN0KSBhbmQgbm90IGFkdmVydGlzZWQuCj4gKwkgKi8KPiArCWNmZ19tc2kg PSByb2NrY2hpcF9wY2llX3JlYWQocm9ja2NoaXAsIFBDSUVfRVBfQ09ORklHX0JBU0UgKwo+ICsJ CQkJICAgICBST0NLQ0hJUF9QQ0lFX0VQX01TSV9DVFJMX1JFRyk7Cj4gKwo+ICsJY2ZnX21zaSAm PSB+Uk9DS0NISVBfUENJRV9FUF9NU0lfQ1AxX01BU0s7Cj4gKwo+ICsJY2ZnX21zaXhfY3AgPSBy b2NrY2hpcF9wY2llX3JlYWQocm9ja2NoaXAsIFBDSUVfRVBfQ09ORklHX0JBU0UgKwo+ICsJCQkJ CSBST0NLQ0hJUF9QQ0lFX0VQX01TSVhfQ0FQX1JFRykgJgo+ICsJCQkJCSBST0NLQ0hJUF9QQ0lF X0VQX01TSVhfQ0FQX0NQX01BU0s7Cj4gKwo+ICsJY2ZnX21zaSB8PSBjZmdfbXNpeF9jcDsKPiAr Cj4gKwlyb2NrY2hpcF9wY2llX3dyaXRlKHJvY2tjaGlwLCBjZmdfbXNpLAo+ICsJCQkgICAgUENJ RV9FUF9DT05GSUdfQkFTRSArIFJPQ0tDSElQX1BDSUVfRVBfTVNJX0NUUkxfUkVHKTsKPiArfQo+ ICsKPiAgc3RhdGljIGludCByb2NrY2hpcF9wY2llX2VwX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9k ZXZpY2UgKnBkZXYpCj4gIHsKPiAgCXN0cnVjdCBkZXZpY2UgKmRldiA9ICZwZGV2LT5kZXY7Cj4g QEAgLTU4OCw3ICs2MTYsNiBAQCBzdGF0aWMgaW50IHJvY2tjaGlwX3BjaWVfZXBfcHJvYmUoc3Ry dWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCXN0cnVjdCByb2NrY2hpcF9wY2llICpyb2Nr Y2hpcDsKPiAgCXN0cnVjdCBwY2lfZXBjICplcGM7Cj4gIAlpbnQgZXJyOwo+IC0JdTMyIGNmZ19t c2ksIGNmZ19tc2l4X2NwOwo+ICAKPiAgCWVwID0gZGV2bV9remFsbG9jKGRldiwgc2l6ZW9mKCpl cCksIEdGUF9LRVJORUwpOwo+ICAJaWYgKCFlcCkKPiBAQCAtNjE5LDYgKzY0Niw4IEBAIHN0YXRp YyBpbnQgcm9ja2NoaXBfcGNpZV9lcF9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2 KQo+ICAJaWYgKGVycikKPiAgCQlnb3RvIGVycl9kaXNhYmxlX2Nsb2NrczsKPiAgCj4gKwlyb2Nr Y2hpcF9wY2llX2VwX2hpZGVfbXNpeF9jYXAocm9ja2NoaXApOwo+ICsKPiAgCS8qIEVzdGFibGlz aCB0aGUgbGluayBhdXRvbWF0aWNhbGx5ICovCj4gIAlyb2NrY2hpcF9wY2llX3dyaXRlKHJvY2tj aGlwLCBQQ0lFX0NMSUVOVF9MSU5LX1RSQUlOX0VOQUJMRSwKPiAgCQkJICAgIFBDSUVfQ0xJRU5U X0NPTkZJRyk7Cj4gQEAgLTYyNiwyOSArNjU1LDYgQEAgc3RhdGljIGludCByb2NrY2hpcF9wY2ll X2VwX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCj4gIAkvKiBPbmx5IGVuYWJs ZSBmdW5jdGlvbiAwIGJ5IGRlZmF1bHQgKi8KPiAgCXJvY2tjaGlwX3BjaWVfd3JpdGUocm9ja2No aXAsIEJJVCgwKSwgUENJRV9DT1JFX1BIWV9GVU5DX0NGRyk7Cj4gIAo+IC0JLyoKPiAtCSAqIE1T SS1YIGlzIG5vdCBzdXBwb3J0ZWQgYnV0IHRoZSBjb250cm9sbGVyIHN0aWxsIGFkdmVydGlzZXMg dGhlIE1TSS1YCj4gLQkgKiBjYXBhYmlsaXR5IGJ5IGRlZmF1bHQsIHdoaWNoIGNhbiBsZWFkIHRv IHRoZSBSb290IENvbXBsZXggc2lkZQo+IC0JICogYWxsb2NhdGluZyBNU0ktWCB2ZWN0b3JzIHdo aWNoIGNhbm5vdCBiZSB1c2VkLiBBdm9pZCB0aGlzIGJ5IHNraXBwaW5nCj4gLQkgKiB0aGUgTVNJ LVggY2FwYWJpbGl0eSBlbnRyeSBpbiB0aGUgUENJZSBjYXBhYmlsaXRpZXMgbGlua2VkLWxpc3Q6 IGdldAo+IC0JICogdGhlIG5leHQgcG9pbnRlciBmcm9tIHRoZSBNU0ktWCBlbnRyeSBhbmQgc2V0 IHRoYXQgaW4gdGhlIE1TSQo+IC0JICogY2FwYWJpbGl0eSBlbnRyeSAod2hpY2ggaXMgdGhlIHBy ZXZpb3VzIGVudHJ5KS4gVGhpcyB3YXkgdGhlIE1TSS1YCj4gLQkgKiBlbnRyeSBpcyBza2lwcGVk IChsZWZ0IG91dCBvZiB0aGUgbGlua2VkLWxpc3QpIGFuZCBub3QgYWR2ZXJ0aXNlZC4KPiAtCSAq Lwo+IC0JY2ZnX21zaSA9IHJvY2tjaGlwX3BjaWVfcmVhZChyb2NrY2hpcCwgUENJRV9FUF9DT05G SUdfQkFTRSArCj4gLQkJCQkgICAgIFJPQ0tDSElQX1BDSUVfRVBfTVNJX0NUUkxfUkVHKTsKPiAt Cj4gLQljZmdfbXNpICY9IH5ST0NLQ0hJUF9QQ0lFX0VQX01TSV9DUDFfTUFTSzsKPiAtCj4gLQlj ZmdfbXNpeF9jcCA9IHJvY2tjaGlwX3BjaWVfcmVhZChyb2NrY2hpcCwgUENJRV9FUF9DT05GSUdf QkFTRSArCj4gLQkJCQkJIFJPQ0tDSElQX1BDSUVfRVBfTVNJWF9DQVBfUkVHKSAmCj4gLQkJCQkJ IFJPQ0tDSElQX1BDSUVfRVBfTVNJWF9DQVBfQ1BfTUFTSzsKPiAtCj4gLQljZmdfbXNpIHw9IGNm Z19tc2l4X2NwOwo+IC0KPiAtCXJvY2tjaGlwX3BjaWVfd3JpdGUocm9ja2NoaXAsIGNmZ19tc2ks Cj4gLQkJCSAgICBQQ0lFX0VQX0NPTkZJR19CQVNFICsgUk9DS0NISVBfUENJRV9FUF9NU0lfQ1RS TF9SRUcpOwo+IC0KPiAgCXJvY2tjaGlwX3BjaWVfd3JpdGUocm9ja2NoaXAsIFBDSUVfQ0xJRU5U X0NPTkZfRU5BQkxFLAo+ICAJCQkgICAgUENJRV9DTElFTlRfQ09ORklHKTsKPiAgCj4gLS0gCj4g Mi40Ni4yCj4gCgotLSAK4K6u4K6j4K6/4K614K6j4K+N4K6j4K6p4K+NIOCumuCupOCuvuCumuCu v+CuteCuruCvjQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KTGludXgtcm9ja2NoaXAgbWFpbGluZyBsaXN0CkxpbnV4LXJvY2tjaGlwQGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51 eC1yb2NrY2hpcAo=