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[37.49.67.221]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ee0b9b186sm8907478f8f.91.2024.10.23.06.29.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 06:29:06 -0700 (PDT) From: Patrick Rudolph To: u-boot@lists.denx.de, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Moritz Fischer , Tom Rini Subject: [PATCH v10 20/37] arm: gic-v3-its: Implement of_xlate Date: Wed, 23 Oct 2024 15:20:03 +0200 Message-ID: <20241023132116.970117-21-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241023132116.970117-1-patrick.rudolph@9elements.com> References: <20241023132116.970117-1-patrick.rudolph@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Translate IRQs by implementing of_xlate() as required by irq_get_by_index() to parse interrupt properties. Map DT interrupts to ARM GIC interrupts as follows: - Interrupt numbers ID32-ID1019 are used for SPIs - ID0-ID15 are used for SGIs - ID16-ID31 are used for PPIs TEST: Booted on qemu sbsa-ref that has a GICV3. Signed-off-by: Patrick Rudolph Reviewed-by: Moritz Fischer --- Changelog v9: - Require at least 3 interrupt-cells - Map SPI interrupts to ID32+ - Map PPI interrupts to ID16+ --- arch/arm/lib/gic-v3-its.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c index 22fa46a341..58f8bf864f 100644 --- a/arch/arm/lib/gic-v3-its.c +++ b/arch/arm/lib/gic-v3-its.c @@ -4,9 +4,11 @@ */ #include #include +#include #include #include #include +#include #include #include #include @@ -163,8 +165,30 @@ static const struct udevice_id gic_v3_ids[] = { {} }; +static int arm_gic_v3_of_xlate(struct irq *irq, struct ofnode_phandle_args *args) +{ + if (args->args_count < 3) { + log_debug("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + + if (args->args[0] == GIC_SPI) + irq->id = args->args[1] + 32; + else + irq->id = args->args[1] + 16; + + irq->flags = args->args[2]; + + return 0; +} + +static const struct irq_ops arm_gic_v3_ops = { + .of_xlate = arm_gic_v3_of_xlate, +}; + U_BOOT_DRIVER(arm_gic_v3) = { .name = "gic-v3", .id = UCLASS_IRQ, .of_match = gic_v3_ids, + .ops = &arm_gic_v3_ops, }; -- 2.46.2