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[37.49.67.221]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ee0b9b186sm8907478f8f.91.2024.10.23.06.29.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 06:29:28 -0700 (PDT) From: Patrick Rudolph To: u-boot@lists.denx.de, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Simon Glass , Tom Rini Subject: [PATCH v10 31/37] armv8: cpu: Enable ACPI parking protocol Date: Wed, 23 Oct 2024 15:20:14 +0200 Message-ID: <20241023132116.970117-32-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241023132116.970117-1-patrick.rudolph@9elements.com> References: <20241023132116.970117-1-patrick.rudolph@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Update the generic entry point code to support the ACPI parking protocol. The ACPI parking protocol can be used when PSCI is not available to bring up secondary CPU cores. When enabled secondary CPUs will enter U-Boot proper and spin in their own 4KiB reserved memory page, which also acts as mailbox with the OS to release the CPU. TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b Signed-off-by: Patrick Rudolph Reviewed-by: Simon Glass --- arch/arm/cpu/armv8/start.S | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 7461280261..544a4a5364 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -178,6 +178,18 @@ pie_fixup_done: branch_if_master x0, master_cpu b spin_table_secondary_jump /* never return */ +#elif defined(CONFIG_ACPI_PARKING_PROTOCOL) && !defined(CONFIG_SPL_BUILD) + branch_if_master x0, master_cpu + /* + * Waits for ACPI parking protocol memory to be allocated and the spin-table + * code to be written. Once ready the secondary CPUs will jump and spin in + * their own 4KiB memory region, which is also used as mailbox, until released + * by the OS. + * The mechanism is similar to the DT enable-method = "spin-table", but works + * with ACPI enabled platforms. + */ + b acpi_pp_secondary_jump + /* never return */ #elif defined(CONFIG_ARMV8_MULTIENTRY) branch_if_master x0, master_cpu -- 2.46.2