From: Simon Horman <horms@kernel.org>
To: Jacky Chou <jacky_chou@aspeedtech.com>
Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, pabeni@redhat.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, p.zabel@pengutronix.de,
ratbert@faraday-tech.com, netdev@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [net-next 3/3] net: ftgmac100: Support for AST2700
Date: Mon, 11 Nov 2024 12:35:26 +0000 [thread overview]
Message-ID: <20241111123526.GC4507@kernel.org> (raw)
In-Reply-To: <20241107111500.4066517-4-jacky_chou@aspeedtech.com>
On Thu, Nov 07, 2024 at 07:15:00PM +0800, Jacky Chou wrote:
> The AST2700 is the 7th generation SoC from Aspeed, featuring three GPIO
> controllers that are support 64-bit DMA capability.
> Adding features is shown in the following list.
> 1.Support 64-bit DMA
> Add the high address (63:32) registers for description address and the
> description field for packet buffer with high address part.
> These registers and fields in legacy Aspeed SoC are reserved.
> This 64-bit DMA changing has verified on legacy Aspeed Soc, like
> AST2600.
> 2.Set RMII pin strap in AST2700 compitable
> Use bit 20 of MAC 0x50 to represent the pin strap of AST2700 RMII and
> RGMII. Set to 1 is RMII pin, otherwise is RGMII.
> This bis is also reserved in legacy Aspeed SoC.
>
> Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
...
> @@ -1965,16 +1980,27 @@ static int ftgmac100_probe(struct platform_device *pdev)
> dev_err(priv->dev, "MII probe failed!\n");
> goto err_ncsi_dev;
> }
> -
> }
>
> if (priv->is_aspeed) {
> + struct reset_control *rst;
> +
> err = ftgmac100_setup_clk(priv);
> if (err)
> goto err_phy_connect;
>
> - /* Disable ast2600 problematic HW arbitration */
> - if (of_device_is_compatible(np, "aspeed,ast2600-mac"))
> + rst = devm_reset_control_get_optional(priv->dev, NULL);
> + if (IS_ERR(rst))
Hi Jacky,
Should err be set to ERR_PTR(rst) here so that value is returned by
the function?
> + goto err_register_netdev;
> +
> + priv->rst = rst;
> + err = reset_control_assert(priv->rst);
> + mdelay(10);
> + err = reset_control_deassert(priv->rst);
> +
> + /* Disable some aspeed platform problematic HW arbitration */
> + if (of_device_is_compatible(np, "aspeed,ast2600-mac") ||
> + of_device_is_compatible(np, "aspeed,ast2700-mac"))
> iowrite32(FTGMAC100_TM_DEFAULT,
> priv->base + FTGMAC100_OFFSET_TM);
> }
next prev parent reply other threads:[~2024-11-11 12:35 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-07 11:14 [net-next 0/3] Add Aspeed G7 FTGMAC100 support Jacky Chou
2024-11-07 11:14 ` [net-next 1/3] dt-bindings: net: ftgmac100: support for AST2700 Jacky Chou
2024-11-07 16:54 ` Conor Dooley
2024-11-07 11:14 ` [net-next 2/3] net: faraday: Add ARM64 in FTGMAC100 " Jacky Chou
2024-11-07 11:15 ` [net-next 3/3] net: ftgmac100: Support " Jacky Chou
2024-11-07 12:38 ` Maxime Chevallier
2024-11-14 1:46 ` 回覆: " Jacky Chou
2024-11-07 23:23 ` Andrew Lunn
2024-11-14 2:19 ` 回覆: " Jacky Chou
2024-11-14 2:43 ` Andrew Lunn
2024-11-14 6:26 ` 回覆: " Jacky Chou
2024-11-11 12:35 ` Simon Horman [this message]
2024-11-14 2:22 ` Jacky Chou
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