Re: [PATCH v5 2/9] riscv: dts: Add display property

[kernel test robot <lkp@intel.com>]

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

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Hi keith,

kernel test robot noticed the following build warnings:

[auto build test WARNING on linus/master]
[also build test WARNING on drm-misc/drm-misc-next v6.12 next-20241121]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/keith-zhao/dt-bindings-display-bindings-for-starfive-JH7110-display-pipeline/20241121-145710
base:   linus/master
patch link:    https://lore.kernel.org/r/20241120061848.196754-3-keith.zhao%40starfivetech.com
patch subject: [PATCH v5 2/9] riscv: dts: Add display property
:::::: branch date: 9 hours ago
:::::: commit date: 9 hours ago
config: riscv-randconfig-052-20241121 (https://download.01.org/0day-ci/archive/20241121/202411212311.TMkrPObX-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 592c0fe55f6d9a811028b5f3507be91458ab2713)
dtschema version: 2024.12.dev1+gcabb5b9
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241121/202411212311.TMkrPObX-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202411212311.TMkrPObX-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
>> arch/riscv/boot/dts/starfive/jh7110-common.dtsi:107.19-117.5: Warning (graph_child_address): /soc/lcd-controller@29400000/ports/port@0: graph node has single child node 'endpoint@0', #address-cells/#size-cells are not necessary

vim +107 arch/riscv/boot/dts/starfive/jh7110-common.dtsi

ac9a37e2d6b637 Jisheng Zhang 2024-04-29  100  
231c32e8f23388 keith zhao    2024-11-20  101  &dc8200 {
231c32e8f23388 keith zhao    2024-11-20  102  	status = "okay";
231c32e8f23388 keith zhao    2024-11-20  103  	crtc_out: ports {
231c32e8f23388 keith zhao    2024-11-20  104  		#address-cells = <1>;
231c32e8f23388 keith zhao    2024-11-20  105  		#size-cells = <0>;
231c32e8f23388 keith zhao    2024-11-20  106  
231c32e8f23388 keith zhao    2024-11-20 @107  		dc_out0: port@0 {
231c32e8f23388 keith zhao    2024-11-20  108  			reg = <0>;
231c32e8f23388 keith zhao    2024-11-20  109  			#address-cells = <1>;
231c32e8f23388 keith zhao    2024-11-20  110  			#size-cells = <0>;
231c32e8f23388 keith zhao    2024-11-20  111  
231c32e8f23388 keith zhao    2024-11-20  112  			dc_out_dpi0: endpoint@0 {
231c32e8f23388 keith zhao    2024-11-20  113  				reg = <0>;
231c32e8f23388 keith zhao    2024-11-20  114  				remote-endpoint = <&hdmi_enc>;
231c32e8f23388 keith zhao    2024-11-20  115  			};
231c32e8f23388 keith zhao    2024-11-20  116  
231c32e8f23388 keith zhao    2024-11-20  117  		};
231c32e8f23388 keith zhao    2024-11-20  118  
231c32e8f23388 keith zhao    2024-11-20  119  		dc_out1: port@1 {
231c32e8f23388 keith zhao    2024-11-20  120  			reg = <1>;
231c32e8f23388 keith zhao    2024-11-20  121  			#address-cells = <1>;
231c32e8f23388 keith zhao    2024-11-20  122  			#size-cells = <0>;
231c32e8f23388 keith zhao    2024-11-20  123  
231c32e8f23388 keith zhao    2024-11-20  124  			dc_out_dpi1: endpoint@1 {
231c32e8f23388 keith zhao    2024-11-20  125  				reg = <1>;
231c32e8f23388 keith zhao    2024-11-20  126  				//remote-endpoint = <&dsi_enc>;
231c32e8f23388 keith zhao    2024-11-20  127  			};
231c32e8f23388 keith zhao    2024-11-20  128  
231c32e8f23388 keith zhao    2024-11-20  129  		};
231c32e8f23388 keith zhao    2024-11-20  130  	};
231c32e8f23388 keith zhao    2024-11-20  131  };
231c32e8f23388 keith zhao    2024-11-20  132  

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