diff for duplicates of <20241125-46efbc121d5164de961a804e@orel> diff --git a/a/1.txt b/N1/1.txt index 28eaa84..0d18e28 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,9 +1,9 @@ -On Mon, Nov 25, 2024 at 12:54:47PM +0100, Cl?ment L?ger wrote: +On Mon, Nov 25, 2024 at 12:54:47PM +0100, Clément Léger wrote: > Add a SSE entry assembly code to handle SSE events. Events should be > registered with a struct sse_handler_arg containing a correct stack and > handler function. > -> Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com> +> Signed-off-by: Clément Léger <cleger@rivosinc.com> > --- > riscv/Makefile | 1 + > lib/riscv/asm/sse.h | 16 +++++++ @@ -66,7 +66,7 @@ for that now, and sse_event_register() isn't in lib/riscv/sbi.c yet. > +/* > + * SBI SSE entry code > + * -> + * Copyright (C) 2024, Rivos Inc., Cl?ment L?ger <cleger@rivosinc.com> +> + * Copyright (C) 2024, Rivos Inc., Clément Léger <cleger@rivosinc.com> > + */ > +#include <asm/asm.h> > +#include <asm/asm-offsets.h> @@ -261,7 +261,7 @@ index f1244e17fe08..000000000000 -/* - * SBI SSE entry code - * -- * Copyright (C) 2024, Rivos Inc., Cl?ment L?ger <cleger@rivosinc.com> +- * Copyright (C) 2024, Rivos Inc., Clément Léger <cleger@rivosinc.com> - */ -#include <asm/asm.h> -#include <asm/asm-offsets.h> diff --git a/a/content_digest b/N1/content_digest index 7849867..3cbd888 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,17 +1,22 @@ "ref\020241125115452.1255745-1-cleger@rivosinc.com\0" "ref\020241125115452.1255745-4-cleger@rivosinc.com\0" "From\0Andrew Jones <andrew.jones@linux.dev>\0" - "Subject\0[kvm-unit-tests PATCH v3 3/4] riscv: lib: Add SSE assembly entry handling\0" + "Subject\0Re: [kvm-unit-tests PATCH v3 3/4] riscv: lib: Add SSE assembly entry handling\0" "Date\0Mon, 25 Nov 2024 14:50:04 +0100\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\0" + "Cc\0kvm@vger.kernel.org" + kvm-riscv@lists.infradead.org + Andrew Jones <ajones@ventanamicro.com> + Anup Patel <apatel@ventanamicro.com> + " Atish Patra <atishp@rivosinc.com>\0" "\00:1\0" "b\0" - "On Mon, Nov 25, 2024 at 12:54:47PM +0100, Cl?ment L?ger wrote:\n" + "On Mon, Nov 25, 2024 at 12:54:47PM +0100, Cl\303\251ment L\303\251ger wrote:\n" "> Add a SSE entry assembly code to handle SSE events. Events should be\n" "> registered with a struct sse_handler_arg containing a correct stack and\n" "> handler function.\n" "> \n" - "> Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>\n" + "> Signed-off-by: Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n" "> ---\n" "> riscv/Makefile | 1 +\n" "> lib/riscv/asm/sse.h | 16 +++++++\n" @@ -74,7 +79,7 @@ "> +/*\n" "> + * SBI SSE entry code\n" "> + *\n" - "> + * Copyright (C) 2024, Rivos Inc., Cl?ment L?ger <cleger@rivosinc.com>\n" + "> + * Copyright (C) 2024, Rivos Inc., Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n" "> + */\n" "> +#include <asm/asm.h>\n" "> +#include <asm/asm-offsets.h>\n" @@ -269,7 +274,7 @@ "-/*\n" "- * SBI SSE entry code\n" "- *\n" - "- * Copyright (C) 2024, Rivos Inc., Cl?ment L?ger <cleger@rivosinc.com>\n" + "- * Copyright (C) 2024, Rivos Inc., Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n" "- */\n" "-#include <asm/asm.h>\n" "-#include <asm/asm-offsets.h>\n" @@ -544,4 +549,4 @@ "+#endif /* !__ASSEMBLY__ */\n" #endif /* _RISCV_SBI_TESTS_H_ */ -f6116412c132e98363eb94a2d0c0e4a09675e9500ea23484425f4d6b35e65231 +43abc0c5a38105be6eed7f26cf307c2dc847a300fa7424b05d0d89f6b6777607
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.