All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20241125115452.1255745-4-cleger@rivosinc.com>

diff --git a/a/1.txt b/N1/1.txt
index fc92277..d773642 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -2,7 +2,7 @@ Add a SSE entry assembly code to handle SSE events. Events should be
 registered with a struct sse_handler_arg containing a correct stack and
 handler function.
 
-Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>
+Signed-off-by: Clément Léger <cleger@rivosinc.com>
 ---
  riscv/Makefile          |   1 +
  lib/riscv/asm/sse.h     |  16 +++++++
@@ -56,7 +56,7 @@ index 00000000..f1244e17
 +/*
 + * SBI SSE entry code
 + *
-+ * Copyright (C) 2024, Rivos Inc., Cl?ment L?ger <cleger@rivosinc.com>
++ * Copyright (C) 2024, Rivos Inc., Clément Léger <cleger@rivosinc.com>
 + */
 +#include <asm/asm.h>
 +#include <asm/asm-offsets.h>
diff --git a/a/content_digest b/N1/content_digest
index 2a753bc..ff30ede 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,14 +2,19 @@
  "From\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\0"
  "Subject\0[kvm-unit-tests PATCH v3 3/4] riscv: lib: Add SSE assembly entry handling\0"
  "Date\0Mon, 25 Nov 2024 12:54:47 +0100\0"
- "To\0kvm-riscv@lists.infradead.org\0"
+ "To\0kvm@vger.kernel.org"
+ " kvm-riscv@lists.infradead.org\0"
+ "Cc\0Cl\303\251ment L\303\251ger <cleger@rivosinc.com>"
+  Andrew Jones <ajones@ventanamicro.com>
+  Anup Patel <apatel@ventanamicro.com>
+ " Atish Patra <atishp@rivosinc.com>\0"
  "\00:1\0"
  "b\0"
  "Add a SSE entry assembly code to handle SSE events. Events should be\n"
  "registered with a struct sse_handler_arg containing a correct stack and\n"
  "handler function.\n"
  "\n"
- "Signed-off-by: Cl?ment L?ger <cleger@rivosinc.com>\n"
+ "Signed-off-by: Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n"
  "---\n"
  " riscv/Makefile          |   1 +\n"
  " lib/riscv/asm/sse.h     |  16 +++++++\n"
@@ -63,7 +68,7 @@
  "+/*\n"
  "+ * SBI SSE entry code\n"
  "+ *\n"
- "+ * Copyright (C) 2024, Rivos Inc., Cl?ment L?ger <cleger@rivosinc.com>\n"
+ "+ * Copyright (C) 2024, Rivos Inc., Cl\303\251ment L\303\251ger <cleger@rivosinc.com>\n"
  "+ */\n"
  "+#include <asm/asm.h>\n"
  "+#include <asm/asm-offsets.h>\n"
@@ -189,4 +194,4 @@
  "-- \n"
  2.45.2
 
-8990e5eb1bc4b4f1ef018fd2b1cfc3ce53833377756b10d180e68b1cd36a2efd
+84fdacbaa712eedd8b99725ba36a6231f0cb25f65ca0687d94c39df591716b96

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.