[PULL 00/72] target-arm queue

[Peter Maydell <peter.maydell@linaro.org>]

First arm pullreq of the cycle; this is mostly my softfloat NaN
handling series. (Lots more in my to-review queue, but I don't
like pullreqs growing too close to a hundred patches at a time :-))

thanks
-- PMM

The following changes since commit 97f2796a3736ed37a1b85dc1c76a6c45b829dd17:

  Open 10.0 development tree (2024-12-10 17:41:17 +0000)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20241211

for you to fetch changes up to 1abe28d519239eea5cf9620bb13149423e5665f8:

  MAINTAINERS: Add correct email address for Vikram Garhwal (2024-12-11 15:31:09 +0000)

----------------------------------------------------------------
target-arm queue:
 * hw/net/lan9118: Extract PHY model, reuse with imx_fec, fix bugs
 * fpu: Make muladd NaN handling runtime-selected, not compile-time
 * fpu: Make default NaN pattern runtime-selected, not compile-time
 * fpu: Minor NaN-related cleanups
 * MAINTAINERS: email address updates

----------------------------------------------------------------
Bernhard Beschow (5):
      hw/net/lan9118: Extract lan9118_phy
      hw/net/lan9118_phy: Reuse in imx_fec and consolidate implementations
      hw/net/lan9118_phy: Fix off-by-one error in MII_ANLPAR register
      hw/net/lan9118_phy: Reuse MII constants
      hw/net/lan9118_phy: Add missing 100 mbps full duplex advertisement

Leif Lindholm (1):
      MAINTAINERS: update email address for Leif Lindholm

Peter Maydell (54):
      fpu: handle raising Invalid for infzero in pick_nan_muladd
      fpu: Check for default_nan_mode before calling pickNaNMulAdd
      softfloat: Allow runtime choice of inf * 0 + NaN result
      tests/fp: Explicitly set inf-zero-nan rule
      target/arm: Set FloatInfZeroNaNRule explicitly
      target/s390: Set FloatInfZeroNaNRule explicitly
      target/ppc: Set FloatInfZeroNaNRule explicitly
      target/mips: Set FloatInfZeroNaNRule explicitly
      target/sparc: Set FloatInfZeroNaNRule explicitly
      target/xtensa: Set FloatInfZeroNaNRule explicitly
      target/x86: Set FloatInfZeroNaNRule explicitly
      target/loongarch: Set FloatInfZeroNaNRule explicitly
      target/hppa: Set FloatInfZeroNaNRule explicitly
      softfloat: Pass have_snan to pickNaNMulAdd
      softfloat: Allow runtime choice of NaN propagation for muladd
      tests/fp: Explicitly set 3-NaN propagation rule
      target/arm: Set Float3NaNPropRule explicitly
      target/loongarch: Set Float3NaNPropRule explicitly
      target/ppc: Set Float3NaNPropRule explicitly
      target/s390x: Set Float3NaNPropRule explicitly
      target/sparc: Set Float3NaNPropRule explicitly
      target/mips: Set Float3NaNPropRule explicitly
      target/xtensa: Set Float3NaNPropRule explicitly
      target/i386: Set Float3NaNPropRule explicitly
      target/hppa: Set Float3NaNPropRule explicitly
      fpu: Remove use_first_nan field from float_status
      target/m68k: Don't pass NULL float_status to floatx80_default_nan()
      softfloat: Create floatx80 default NaN from parts64_default_nan
      target/loongarch: Use normal float_status in fclass_s and fclass_d helpers
      target/m68k: In frem helper, initialize local float_status from env->fp_status
      target/m68k: Init local float_status from env fp_status in gdb get/set reg
      target/sparc: Initialize local scratch float_status from env->fp_status
      target/ppc: Use env->fp_status in helper_compute_fprf functions
      fpu: Allow runtime choice of default NaN value
      tests/fp: Set default NaN pattern explicitly
      target/microblaze: Set default NaN pattern explicitly
      target/i386: Set default NaN pattern explicitly
      target/hppa: Set default NaN pattern explicitly
      target/alpha: Set default NaN pattern explicitly
      target/arm: Set default NaN pattern explicitly
      target/loongarch: Set default NaN pattern explicitly
      target/m68k: Set default NaN pattern explicitly
      target/mips: Set default NaN pattern explicitly
      target/openrisc: Set default NaN pattern explicitly
      target/ppc: Set default NaN pattern explicitly
      target/sh4: Set default NaN pattern explicitly
      target/rx: Set default NaN pattern explicitly
      target/s390x: Set default NaN pattern explicitly
      target/sparc: Set default NaN pattern explicitly
      target/xtensa: Set default NaN pattern explicitly
      target/hexagon: Set default NaN pattern explicitly
      target/riscv: Set default NaN pattern explicitly
      target/tricore: Set default NaN pattern explicitly
      fpu: Remove default handling for dnan_pattern

Richard Henderson (11):
      target/arm: Copy entire float_status in is_ebf
      softfloat: Inline pickNaNMulAdd
      softfloat: Use goto for default nan case in pick_nan_muladd
      softfloat: Remove which from parts_pick_nan_muladd
      softfloat: Pad array size in pick_nan_muladd
      softfloat: Move propagateFloatx80NaN to softfloat.c
      softfloat: Use parts_pick_nan in propagateFloatx80NaN
      softfloat: Inline pickNaN
      softfloat: Share code between parts_pick_nan cases
      softfloat: Sink frac_cmp in parts_pick_nan until needed
      softfloat: Replace WHICH with RET in parts_pick_nan

Vikram Garhwal (1):
      MAINTAINERS: Add correct email address for Vikram Garhwal

 MAINTAINERS                       |   4 +-
 include/fpu/softfloat-helpers.h   |  38 +++-
 include/fpu/softfloat-types.h     |  89 +++++++-
 include/hw/net/imx_fec.h          |   9 +-
 include/hw/net/lan9118_phy.h      |  37 ++++
 include/hw/net/mii.h              |   6 +
 target/mips/fpu_helper.h          |  20 ++
 target/sparc/helper.h             |   4 +-
 fpu/softfloat.c                   |  19 ++
 hw/net/imx_fec.c                  | 146 ++------------
 hw/net/lan9118.c                  | 137 ++-----------
 hw/net/lan9118_phy.c              | 222 ++++++++++++++++++++
 linux-user/arm/nwfpe/fpa11.c      |   5 +
 target/alpha/cpu.c                |   2 +
 target/arm/cpu.c                  |  10 +
 target/arm/tcg/vec_helper.c       |  20 +-
 target/hexagon/cpu.c              |   2 +
 target/hppa/fpu_helper.c          |  12 ++
 target/i386/tcg/fpu_helper.c      |  12 ++
 target/loongarch/tcg/fpu_helper.c |  14 +-
 target/m68k/cpu.c                 |  14 +-
 target/m68k/fpu_helper.c          |   6 +-
 target/m68k/helper.c              |   6 +-
 target/microblaze/cpu.c           |   2 +
 target/mips/msa.c                 |  10 +
 target/openrisc/cpu.c             |   2 +
 target/ppc/cpu_init.c             |  19 ++
 target/ppc/fpu_helper.c           |   3 +-
 target/riscv/cpu.c                |   2 +
 target/rx/cpu.c                   |   2 +
 target/s390x/cpu.c                |   5 +
 target/sh4/cpu.c                  |   2 +
 target/sparc/cpu.c                |   6 +
 target/sparc/fop_helper.c         |   8 +-
 target/sparc/translate.c          |   4 +-
 target/tricore/helper.c           |   2 +
 target/xtensa/cpu.c               |   4 +
 target/xtensa/fpu_helper.c        |   3 +-
 tests/fp/fp-bench.c               |   7 +
 tests/fp/fp-test-log2.c           |   1 +
 tests/fp/fp-test.c                |   7 +
 fpu/softfloat-parts.c.inc         | 152 +++++++++++---
 fpu/softfloat-specialize.c.inc    | 412 ++------------------------------------
 .mailmap                          |   5 +-
 hw/net/Kconfig                    |   5 +
 hw/net/meson.build                |   1 +
 hw/net/trace-events               |  10 +-
 47 files changed, 778 insertions(+), 730 deletions(-)
 create mode 100644 include/hw/net/lan9118_phy.h
 create mode 100644 hw/net/lan9118_phy.c