Re: [PATCH v4 18/18] Documentation: Document the NVMe PCI endpoint target driver

[Bjorn Helgaas <helgaas@kernel.org>]

On Thu, Dec 12, 2024 at 08:34:40PM +0900, Damien Le Moal wrote:
> Add a documentation file
> (Documentation/nvme/nvme-pci-endpoint-target.rst) for the new NVMe PCI
> endpoint target driver. This provides an overview of the driver
> requirements, capabilities and limitations. A user guide describing how
> to setup a NVMe PCI endpoint device using this driver is also provided.
> 
> This document is made accessible also from the PCI endpoint
> documentation using a link. Furthermore, since the existing nvme
> documentation was not accessible from the top documentation index, an
> index file is added to Documentation/nvme and this index listed as
> "NVMe Subsystem" in the "Storage interfaces" section of the subsystem
> API index.

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

  Applying: Documentation: Document the NVMe PCI endpoint target driver
  .git/rebase-apply/patch:43: new blank line at EOF.
  +
  warning: 1 line adds whitespace errors.

> +The NVMe PCI endpoint target driver allows exposing a NVMe target controller
> +over a PCIe link, thus implementing an NVMe PCIe device similar to a regular
> +M.2 SSD. The target controller is created in the same manner as when using NVMe
> +over fabrics: the controller represents the interface to an NVMe subsystem
> +using a port. The port transfer type must be configured to be "pci". The
> +subsystem can be configured to have namespaces backed by regular files or block
> +devices, or can use NVMe passthrough to expose an existing physical NVMe device
> +or a NVMe fabrics host controller (e.g. a NVMe TCP host controller).
> +
> +The NVMe PCI endpoint target driver relies as much as possible on the NVMe
> +target core code to parse and execute NVMe commands submitted by the PCI RC
> +host. However, using the PCI endpoint framework API and DMA API, the driver is
> +also responsible for managing all data transfers over the PCI link. This
> +implies that the NVMe PCI endpoint target driver implements several NVMe data
> +structure management and some command parsing.

Sort of a mix of "PCIe link" vs "PCI link", maybe make them
consistent.

Does "PCI RC" mean "Root Complex"?  If so, maybe "PCIe Root Complex"
the first time, and "PCIe RC" subsequently?  I don't know enough about
this to know whether "Root Complex" is necessary in this context, or
whether "host" might be enough.

> +4) The boot partition support (BPS), Persistent Memory Region Supported (PMRS)
> +   and Controller Memory Buffer Supported (CMBS) capabilities are never reported.

Gratuitous >80 column line.

> +If the PCI endpoint controller used does not support MSIX, MSI can be
> +configured instead::

s/MSIX/MSI-X/ as is used elsewhere

> +The NVMe PCI endpoint target driver uses the PCI endpoint configfs device attributes as follows.

Gratuitous >80 column line.