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From: linux@treblig.org
To: zhenyuw@linux.intel.com, zhi.wang.linux@gmail.com,
	jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com,
	rodrigo.vivi@intel.com, tursulin@ursulin.net,
	intel-gvt-dev@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org
Cc: airlied@gmail.com, simona@ffwll.ch,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	"Dr. David Alan Gilbert" <linux@treblig.org>
Subject: [PATCH 2/3] drm/i915/gvt: Remove unused intel_vgpu_decode_sprite_plane
Date: Sun, 22 Dec 2024 00:20:42 +0000	[thread overview]
Message-ID: <20241222002043.173080-3-linux@treblig.org> (raw)
In-Reply-To: <20241222002043.173080-1-linux@treblig.org>

From: "Dr. David Alan Gilbert" <linux@treblig.org>

intel_vgpu_decode_sprite_plane() was added in 2017 by
commit 9f31d1063b43 ("drm/i915/gvt: Add framebuffer decoder support")
but has remained unused.

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
---
 drivers/gpu/drm/i915/gvt/fb_decoder.c | 117 --------------------------
 drivers/gpu/drm/i915/gvt/fb_decoder.h |   2 -
 2 files changed, 119 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index c454e25b2b0f..a37322914f5e 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -395,120 +395,3 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
 	plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot));
 	return 0;
 }
-
-#define SPRITE_FORMAT_NUM	(1 << 3)
-
-static const struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {
-	[0x0] = {DRM_FORMAT_YUV422, 16, "YUV 16-bit 4:2:2 packed"},
-	[0x1] = {DRM_FORMAT_XRGB2101010, 32, "RGB 32-bit 2:10:10:10"},
-	[0x2] = {DRM_FORMAT_XRGB8888, 32, "RGB 32-bit 8:8:8:8"},
-	[0x4] = {DRM_FORMAT_AYUV, 32,
-		"YUV 32-bit 4:4:4 packed (8:8:8:8 MSB-X:Y:U:V)"},
-};
-
-/**
- * intel_vgpu_decode_sprite_plane - Decode sprite plane
- * @vgpu: input vgpu
- * @plane: sprite plane to save decoded info
- * This function is called for decoding plane
- *
- * Returns:
- * 0 on success, non-zero if failed.
- */
-int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu,
-	struct intel_vgpu_sprite_plane_format *plane)
-{
-	u32 val, fmt;
-	u32 color_order, yuv_order;
-	int drm_format;
-	int pipe;
-
-	pipe = get_active_pipe(vgpu);
-	if (pipe >= I915_MAX_PIPES)
-		return -ENODEV;
-
-	val = vgpu_vreg_t(vgpu, SPRCTL(pipe));
-	plane->enabled = !!(val & SPRITE_ENABLE);
-	if (!plane->enabled)
-		return -ENODEV;
-
-	plane->tiled = !!(val & SPRITE_TILED);
-	color_order = !!(val & SPRITE_RGB_ORDER_RGBX);
-	yuv_order = (val & SPRITE_YUV_ORDER_MASK) >>
-				_SPRITE_YUV_ORDER_SHIFT;
-
-	fmt = (val & SPRITE_FORMAT_MASK) >> _SPRITE_FMT_SHIFT;
-	if (!sprite_pixel_formats[fmt].bpp) {
-		gvt_vgpu_err("Non-supported pixel format (0x%x)\n", fmt);
-		return -EINVAL;
-	}
-	plane->hw_format = fmt;
-	plane->bpp = sprite_pixel_formats[fmt].bpp;
-	drm_format = sprite_pixel_formats[fmt].drm_format;
-
-	/* Order of RGB values in an RGBxxx buffer may be ordered RGB or
-	 * BGR depending on the state of the color_order field
-	 */
-	if (!color_order) {
-		if (drm_format == DRM_FORMAT_XRGB2101010)
-			drm_format = DRM_FORMAT_XBGR2101010;
-		else if (drm_format == DRM_FORMAT_XRGB8888)
-			drm_format = DRM_FORMAT_XBGR8888;
-	}
-
-	if (drm_format == DRM_FORMAT_YUV422) {
-		switch (yuv_order) {
-		case 0:
-			drm_format = DRM_FORMAT_YUYV;
-			break;
-		case 1:
-			drm_format = DRM_FORMAT_UYVY;
-			break;
-		case 2:
-			drm_format = DRM_FORMAT_YVYU;
-			break;
-		case 3:
-			drm_format = DRM_FORMAT_VYUY;
-			break;
-		default:
-			/* yuv_order has only 2 bits */
-			break;
-		}
-	}
-
-	plane->drm_format = drm_format;
-
-	plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK;
-	if (!vgpu_gmadr_is_valid(vgpu, plane->base))
-		return  -EINVAL;
-
-	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
-	if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) {
-		gvt_vgpu_err("Translate sprite plane gma 0x%x to gpa fail\n",
-				plane->base);
-		return  -EINVAL;
-	}
-
-	plane->stride = vgpu_vreg_t(vgpu, SPRSTRIDE(pipe)) &
-				_SPRITE_STRIDE_MASK;
-
-	val = vgpu_vreg_t(vgpu, SPRSIZE(pipe));
-	plane->height = (val & _SPRITE_SIZE_HEIGHT_MASK) >>
-		_SPRITE_SIZE_HEIGHT_SHIFT;
-	plane->width = (val & _SPRITE_SIZE_WIDTH_MASK) >>
-		_SPRITE_SIZE_WIDTH_SHIFT;
-	plane->height += 1;	/* raw height is one minus the real value */
-	plane->width += 1;	/* raw width is one minus the real value */
-
-	val = vgpu_vreg_t(vgpu, SPRPOS(pipe));
-	plane->x_pos = (val & _SPRITE_POS_X_MASK) >> _SPRITE_POS_X_SHIFT;
-	plane->y_pos = (val & _SPRITE_POS_Y_MASK) >> _SPRITE_POS_Y_SHIFT;
-
-	val = vgpu_vreg_t(vgpu, SPROFFSET(pipe));
-	plane->x_offset = (val & _SPRITE_OFFSET_START_X_MASK) >>
-			   _SPRITE_OFFSET_START_X_SHIFT;
-	plane->y_offset = (val & _SPRITE_OFFSET_START_Y_MASK) >>
-			   _SPRITE_OFFSET_START_Y_SHIFT;
-
-	return 0;
-}
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h
index fa6503900c84..436d43c0087b 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.h
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h
@@ -156,7 +156,5 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
 	struct intel_vgpu_primary_plane_format *plane);
 int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
 	struct intel_vgpu_cursor_plane_format *plane);
-int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu,
-	struct intel_vgpu_sprite_plane_format *plane);
 
 #endif
-- 
2.47.1


  parent reply	other threads:[~2025-01-07 14:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-22  0:20 [PATCH 0/3] drm/i915/gvt: Deadcoding linux
2024-12-22  0:20 ` [PATCH 1/3] drm/i915/gvt: Remove intel_gvt_ggtt_h2g<->index linux
2024-12-22  0:20 ` linux [this message]
2024-12-22  0:20 ` [PATCH 3/3] drm/i915/gvt: Remove unused intel_gvt_in_force_nonpriv_whitelist linux
2024-12-22  0:25 ` [PATCH 0/3] drm/i915/gvt: Deadcoding Dr. David Alan Gilbert
2025-01-06  7:30   ` Zhenyu Wang
2025-01-09 21:10     ` Rodrigo Vivi
2025-01-10 10:49       ` GVT-g status (was: Re: [PATCH 0/3] drm/i915/gvt: Deadcoding) Jani Nikula
2025-01-11  5:26         ` Zhenyu Wang
2025-01-11 14:46           ` Zhi Wang
2025-01-13 10:17           ` Zhi Wang
2025-01-11  5:12       ` [PATCH 0/3] drm/i915/gvt: Deadcoding Zhenyu Wang
2025-01-13 16:26         ` Rodrigo Vivi
2025-01-06  7:27 ` Zhenyu Wang
2025-01-07 19:49 ` ✗ i915.CI.BAT: failure for " Patchwork

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