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charset=us-ascii Content-Disposition: inline tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 48f506ad0b683d3e7e794efa60c5785c4fdc86fa commit: e05c7b1f2bc4b7b28199b9a7572f73436d97317e mm: pgtable: add shortcuts for accessing kernel PMD and PTE date: 4 years, 6 months ago config: sh-randconfig-002-20241212 (https://download.01.org/0day-ci/archive/20241222/202412221527.oTd4Lie4-lkp@intel.com/config) compiler: sh4-linux-gcc (GCC) 12.4.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241222/202412221527.oTd4Lie4-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202412221527.oTd4Lie4-lkp@intel.com/ All errors (new ones prefixed by >>): cc1: error: arch/sh/include/mach-highlander: No such file or directory [-Werror=missing-include-dirs] cc1: error: arch/sh/include/mach-sdk7780: No such file or directory [-Werror=missing-include-dirs] cc1: error: arch/sh/include/mach-highlander: No such file or directory [-Werror=missing-include-dirs] cc1: error: arch/sh/include/mach-sdk7780: No such file or directory [-Werror=missing-include-dirs] arch/sh/mm/cache-sh4.c: In function 'flush_cache_one': arch/sh/mm/cache-sh4.c:98:31: error: 'cached_to_uncached' undeclared (first use in this function); did you mean 'jump_to_uncached'? 98 | exec_offset = cached_to_uncached; | ^~~~~~~~~~~~~~~~~~ | jump_to_uncached arch/sh/mm/cache-sh4.c:98:31: note: each undeclared identifier is reported only once for each function it appears in In file included from include/linux/init.h:5, from arch/sh/mm/cache-sh4.c:13: arch/sh/mm/cache-sh4.c: In function 'sh4_flush_cache_mm': arch/sh/mm/cache-sh4.c:191:13: error: implicit declaration of function 'cpu_context'; did you mean 'put_io_context'? [-Werror=implicit-function-declaration] 191 | if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) | ^~~~~~~~~~~ include/linux/compiler.h:58:52: note: in definition of macro '__trace_if_var' 58 | #define __trace_if_var(cond) (__builtin_constant_p(cond) ? (cond) : __trace_if_value(cond)) | ^~~~ arch/sh/mm/cache-sh4.c:191:9: note: in expansion of macro 'if' 191 | if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) | ^~ arch/sh/mm/cache-sh4.c: In function 'sh4_flush_cache_page': >> arch/sh/mm/cache-sh4.c:223:15: error: implicit declaration of function 'pmd_off' [-Werror=implicit-function-declaration] 223 | pmd = pmd_off(vma->vm_mm, address); | ^~~~~~~ arch/sh/mm/cache-sh4.c:223:13: error: assignment to 'pmd_t *' from 'int' makes pointer from integer without a cast [-Werror=int-conversion] 223 | pmd = pmd_off(vma->vm_mm, address); | ^ arch/sh/mm/cache-sh4.c: At top level: arch/sh/mm/cache-sh4.c:373:13: error: no previous prototype for 'sh4_cache_init' [-Werror=missing-prototypes] 373 | void __init sh4_cache_init(void) | ^~~~~~~~~~~~~~ cc1: all warnings being treated as errors vim +/pmd_off +223 arch/sh/mm/cache-sh4.c 176 177 /* 178 * Note : (RPC) since the caches are physically tagged, the only point 179 * of flush_cache_mm for SH-4 is to get rid of aliases from the 180 * D-cache. The assumption elsewhere, e.g. flush_cache_range, is that 181 * lines can stay resident so long as the virtual address they were 182 * accessed with (hence cache set) is in accord with the physical 183 * address (i.e. tag). It's no different here. 184 * 185 * Caller takes mm->mmap_sem. 186 */ 187 static void sh4_flush_cache_mm(void *arg) 188 { 189 struct mm_struct *mm = arg; 190 > 191 if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT) 192 return; 193 194 flush_dcache_all(); 195 } 196 197 /* 198 * Write back and invalidate I/D-caches for the page. 199 * 200 * ADDR: Virtual Address (U0 address) 201 * PFN: Physical page number 202 */ 203 static void sh4_flush_cache_page(void *args) 204 { 205 struct flusher_data *data = args; 206 struct vm_area_struct *vma; 207 struct page *page; 208 unsigned long address, pfn, phys; 209 int map_coherent = 0; 210 pmd_t *pmd; 211 pte_t *pte; 212 void *vaddr; 213 214 vma = data->vma; 215 address = data->addr1 & PAGE_MASK; 216 pfn = data->addr2; 217 phys = pfn << PAGE_SHIFT; 218 page = pfn_to_page(pfn); 219 220 if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT) 221 return; 222 > 223 pmd = pmd_off(vma->vm_mm, address); 224 pte = pte_offset_kernel(pmd, address); 225 226 /* If the page isn't present, there is nothing to do here. */ 227 if (!(pte_val(*pte) & _PAGE_PRESENT)) 228 return; 229 230 if ((vma->vm_mm == current->active_mm)) 231 vaddr = NULL; 232 else { 233 /* 234 * Use kmap_coherent or kmap_atomic to do flushes for 235 * another ASID than the current one. 236 */ 237 map_coherent = (current_cpu_data.dcache.n_aliases && 238 test_bit(PG_dcache_clean, &page->flags) && 239 page_mapcount(page)); 240 if (map_coherent) 241 vaddr = kmap_coherent(page, address); 242 else 243 vaddr = kmap_atomic(page); 244 245 address = (unsigned long)vaddr; 246 } 247 248 flush_cache_one(CACHE_OC_ADDRESS_ARRAY | 249 (address & shm_align_mask), phys); 250 251 if (vma->vm_flags & VM_EXEC) 252 flush_icache_all(); 253 254 if (vaddr) { 255 if (map_coherent) 256 kunmap_coherent(vaddr); 257 else 258 kunmap_atomic(vaddr); 259 } 260 } 261 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki