From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD87917BB35 for ; Mon, 23 Dec 2024 10:24:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734949487; cv=none; b=ivbt2tmRrugMtdbV+fjP7Uw1qYrE3MtMXS2c5tkoXyGzjsLEAl3qjQaIiy3XEgEAz3I4ixD2KIvXkH+esJUGrkJXK/J5xvEihIUPKO8AmhHimzleguXq7c5oXV2jIXjeimP9Bg9lcUZJBpF7l+vCnyfFwcWcZHsmeBq8y/pG4JY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734949487; c=relaxed/simple; bh=Q1lwuCXZBIKcyhvRlP2qP4d8ezVQvO3NxphqDjQuU7Q=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=Q9K/ezAlkqDrhAgbh8UquGRmeOt+xvRzUx1XXrUBqrMXfCTZmQV4BLutlMsFQt+oob2YStSKdcybxz9AgdwgEHC3i5+eIt6A2YEirCMKiE8u/LW3TfX3culbcrhQrdr/S9TXz13TvPiBAtBTP891LYvlmMt0k64pBSnThHSf7N8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hDEkQWWU; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hDEkQWWU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1734949482; x=1766485482; h=date:from:to:cc:subject:message-id:mime-version; bh=Q1lwuCXZBIKcyhvRlP2qP4d8ezVQvO3NxphqDjQuU7Q=; b=hDEkQWWUS2i/xrruurdABngLusASFIwZ4z7rFo/cmF9GtZlbub0gqav2 qbtpFerN9pKjQQRpd0JxSe6Akj/vM2zwQC1OYXhDw+K7a6Fj1BUYQA0hv wTbkfdAtlhCRff2q+gXqoMZvQiQLTrnIdxVRV/rKcXiIUCjzf5/CrK+g9 sWjgNiVuQNa1uumkjk7f1sbajHJEPwLQLvQnpc0lopRBU5akARfrpX2Ke 4AXncPOb8yxcQPLX3KOvd1JiDXZYDWYn2MTtsVTqDak9PrXn5q+bnvd1H UChvle9bNazR5DsTPpikmJ6C1kViSoG0Rmzco1GV7GBNejN2S2dmnJ4zX w==; X-CSE-ConnectionGUID: spj8UvXVSla4ZtbIqe7dCg== X-CSE-MsgGUID: 3ZZ88hf3TSu+XNtqqVoXuA== X-IronPort-AV: E=McAfee;i="6700,10204,11294"; a="46011476" X-IronPort-AV: E=Sophos;i="6.12,256,1728975600"; d="scan'208";a="46011476" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Dec 2024 02:24:41 -0800 X-CSE-ConnectionGUID: uLV9GJAuRBmkKUWr58ov0Q== X-CSE-MsgGUID: E3klzHUsScOBKgChhLPATw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="122446694" Received: from lkp-server01.sh.intel.com (HELO a46f226878e0) ([10.239.97.150]) by fmviesa002.fm.intel.com with ESMTP; 23 Dec 2024 02:24:39 -0800 Received: from kbuild by a46f226878e0 with local (Exim 4.96) (envelope-from ) id 1tPfc5-0003Xj-1Z; Mon, 23 Dec 2024 10:24:37 +0000 Date: Mon, 23 Dec 2024 18:23:38 +0800 From: kernel test robot To: oe-kbuild@lists.linux.dev Cc: lkp@intel.com Subject: [atishp04:perf_test_weilin_rebased 8/24] arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-s... Message-ID: <202412231830.fDyttxu8-lkp@intel.com> Precedence: bulk X-Mailing-List: oe-kbuild@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline :::::: :::::: Manual check reason: "dtcheck: binding changes may go via different trees" :::::: BCC: lkp@intel.com CC: oe-kbuild-all@lists.linux.dev CC: Atish Patra TO: Atish Patra tree: https://github.com/atishp04/linux perf_test_weilin_rebased head: 8c07a2e042b3578314c0f64e65491e4db27a5c4d commit: 949dd8eff8f81b234727b80a38c0912b7d11277f [8/24] dt-bindings: riscv: add Sxcsrind ISA extension description :::::: branch date: 3 days ago :::::: commit date: 3 days ago config: riscv-randconfig-052-20241223 (https://download.01.org/0day-ci/archive/20241223/202412231830.fDyttxu8-lkp@intel.com/config) compiler: riscv64-linux-gcc (GCC) 14.2.0 dtschema version: 2024.12.dev5+gea243eb reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241223/202412231830.fDyttxu8-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/r/202412231830.fDyttxu8-lkp@intel.com/ dtcheck warnings: (new ones prefixed by >>) >> arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[48]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[49]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 47}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[48]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[49]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 47}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[40]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[41]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 39}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[47]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[48]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 46}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[46]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[47]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 45}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[44]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[45]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 43}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[38]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[39]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 37}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[43]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[44]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 42}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[46]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[47]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 45}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/allwinner/sun20i-d1s-mangopi-mq.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'clocks': [[4, 132]], 'd-cache-block-size': 64, 'd-cache-sets': 256, 'd-cache-size': 32768, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'operating-points-v2': [[41]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], '#cooling-cells': 2, 'cpu-supply': [[42]], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 40}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/allwinner/sun20i-d1s-mangopi-mq.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/canaan/canaan_kd233.dtb: cpu@0: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[0]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 1, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 5}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/canaan/canaan_kd233.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/canaan_kd233.dtb: cpu@1: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 6}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/canaan_kd233.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/canaan/k210_generic.dtb: cpu@0: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[0]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 1, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 5}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/canaan/k210_generic.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/k210_generic.dtb: cpu@1: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 6}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/k210_generic.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/canaan/sipeed_maix_bit.dtb: cpu@0: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[0]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 1, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 5}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/canaan/sipeed_maix_bit.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maix_bit.dtb: cpu@1: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 6}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maix_bit.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/canaan/sipeed_maix_dock.dtb: cpu@0: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[0]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 1, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 5}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/canaan/sipeed_maix_dock.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maix_dock.dtb: cpu@1: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 6}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maix_dock.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/canaan/sipeed_maix_go.dtb: cpu@0: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[0]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 1, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 5}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/canaan/sipeed_maix_go.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maix_go.dtb: cpu@1: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 6}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maix_go.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/canaan/sipeed_maixduino.dtb: cpu@0: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[0]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 1, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 5}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/canaan/sipeed_maixduino.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maixduino.dtb: cpu@1: False schema does not allow {'device_type': ['cpu'], 'compatible': ['canaan,k210', 'riscv'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'mmu-type': ['riscv,none'], 'i-cache-block-size': 64, 'i-cache-size': 32768, 'd-cache-block-size': 64, 'd-cache-size': 32768, 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'interrupt-controller': True, 'compatible': ['riscv,cpu-intc'], 'phandle': 6}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/canaan/sipeed_maixduino.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa' was unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'status': ['disabled'], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 12}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 13}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 14}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 7, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 15}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'status': ['disabled'], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 12}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 13}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 7, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 14}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'status': ['disabled'], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 12}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 13}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 7, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 14}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'status': ['disabled'], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 12}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 13}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-polarberry.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 7, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 14}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'status': ['disabled'], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 12}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 13}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-sev-kit.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 7, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 14}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'status': ['disabled'], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 12}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 13}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/microchip/mpfs-tysom-m.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'clocks': [[1, 0]], 'tlb-split': True, 'next-level-cache': [[2]], 'status': ['okay'], 'phandle': 7, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 14}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: cpu@0: False schema does not allow {'compatible': ['andestech,ax45mp', 'riscv'], 'device_type': ['cpu'], '#cooling-cells': 2, 'reg': [[0]], 'status': ['okay'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': b'i\x00m\x00a\x00f\x00d\x00c\x00zicntr\x00zicsr\x00zifencei\x00zihpm\x00xandespmu\x00', 'mmu-type': ['riscv,sv39'], 'i-cache-size': 32768, 'i-cache-line-size': 64, 'd-cache-size': 32768, 'd-cache-line-size': 64, 'next-level-cache': [[42]], 'clocks': [[2, 0, 0]], 'operating-points-v2': [[43]], 'phandle': 41, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['andestech,cpu-intc', 'riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 38}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: cpu@0: riscv,isa-extensions: b'i\x00m\x00a\x00f\x00d\x00c\x00zicntr\x00zicsr\x00zifencei\x00zihpm\x00xandespmu\x00' is not of type 'object', 'integer', 'array', 'boolean', 'null' from schema $id: http://devicetree.org/schemas/dt-core.yaml# -- >> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,e51', 'sifive,rocket0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 7}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'next-level-cache': [[1]], 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 8}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'next-level-cache': [[1]], 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 9}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'next-level-cache': [[1]], 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u54-mc', 'sifive,rocket0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'next-level-cache': [[1]], 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,bullet0', 'riscv'], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 16384, 'next-level-cache': [[1]], 'reg': [[0]], 'riscv,isa': ['rv64imac'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 2, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 7}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,bullet0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'reg': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 3, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 8}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,bullet0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'reg': [[2]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 4, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 9}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,bullet0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'reg': [[3]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 5, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 10}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,bullet0', 'riscv'], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'reg': [[4]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 6, 'interrupt-controller': {'#interrupt-cells': 1, 'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, 'phandle': 11}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'd-cache-block-size': 64, 'd-cache-sets': 512, 'd-cache-size': 65536, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 6}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'd-cache-block-size': 64, 'd-cache-sets': 512, 'd-cache-size': 65536, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 4}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c906', 'riscv'], 'device_type': ['cpu'], 'reg': [[0]], 'd-cache-block-size': 64, 'd-cache-sets': 512, 'd-cache-size': 65536, 'i-cache-block-size': 64, 'i-cache-sets': 128, 'i-cache-size': 32768, 'mmu-type': ['riscv,sv39'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 6}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c920', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[0]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[65]], 'mmu-type': ['riscv,sv39'], 'phandle': 1, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 88}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@1: False schema does not allow {'compatible': ['thead,c920', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[1]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[65]], 'mmu-type': ['riscv,sv39'], 'phandle': 2, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 89}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@2: False schema does not allow {'compatible': ['thead,c920', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[2]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[65]], 'mmu-type': ['riscv,sv39'], 'phandle': 3, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 90}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: cpu@3: False schema does not allow {'compatible': ['thead,c920', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[3]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[65]], 'mmu-type': ['riscv,sv39'], 'phandle': 4, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 91}, '$nodename': ['cpu@3']} -- >> arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[0]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 2, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 6}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 3, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 7}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[0]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 2, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 6}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 32, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 32, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'phandle': 3, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 7}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# -- >> arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,s7', 'riscv'], 'reg': [[0]], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 16384, 'next-level-cache': [[1]], 'riscv,isa': ['rv64imac_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 5, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 13}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 6, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 14}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[2]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 7, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 15}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[3]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 8, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 16}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[4]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 9, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 17}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,s7', 'riscv'], 'reg': [[0]], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 16384, 'next-level-cache': [[1]], 'riscv,isa': ['rv64imac_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 5, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 13}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 6, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 14}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[2]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 7, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 15}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[3]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 8, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 16}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[4]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 9, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 17}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,s7', 'riscv'], 'reg': [[0]], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 16384, 'next-level-cache': [[1]], 'riscv,isa': ['rv64imac_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 5, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 13}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 6, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 14}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[2]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 7, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 15}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[3]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 8, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 16}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[4]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 9, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 17}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,s7', 'riscv'], 'reg': [[0]], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 16384, 'next-level-cache': [[1]], 'riscv,isa': ['rv64imac_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 5, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 13}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 6, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 14}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[2]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 7, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 15}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[3]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 8, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 16}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[4]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 9, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 17}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@0: False schema does not allow {'compatible': ['sifive,s7', 'riscv'], 'reg': [[0]], 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 16384, 'next-level-cache': [[1]], 'riscv,isa': ['rv64imac_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627415296, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'status': ['disabled'], 'phandle': 5, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 13}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@1: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[1]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 6, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 14}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@2: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[2]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 7, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 15}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@3: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[3]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 8, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 16}, '$nodename': ['cpu@3']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@3: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: cpu@4: False schema does not allow {'compatible': ['sifive,u74-mc', 'riscv'], 'reg': [[4]], 'd-cache-block-size': 64, 'd-cache-sets': 64, 'd-cache-size': 32768, 'd-tlb-sets': 1, 'd-tlb-size': 40, 'device_type': ['cpu'], 'i-cache-block-size': 64, 'i-cache-sets': 64, 'i-cache-size': 32768, 'i-tlb-sets': 1, 'i-tlb-size': 40, 'mmu-type': ['riscv,sv39'], 'next-level-cache': [[1]], 'riscv,isa': ['rv64imafdc_zba_zbb'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053267712, 2053267968, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'tlb-split': True, 'operating-points-v2': [[2]], 'clocks': [[3, 1]], 'clock-names': ['cpu'], '#cooling-cells': 2, 'cpu-supply': [[4]], 'phandle': 9, 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 17}, '$nodename': ['cpu@4']} -- >> arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[0]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 3}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@1: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[1]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 4}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@2: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[2]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 5}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dtb: cpu@3: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[3]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 6}, '$nodename': ['cpu@3']} -- >> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@0: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[0]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 3}, '$nodename': ['cpu@0']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# >> arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@0: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@1: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[1]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 4}, '$nodename': ['cpu@1']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@1: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@2: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[2]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 5}, '$nodename': ['cpu@2']} from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@2: Unevaluated properties are not allowed ('riscv,isa', 'riscv,isa-base', 'riscv,isa-extensions' were unexpected) from schema $id: http://devicetree.org/schemas/riscv/cpus.yaml# arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dtb: cpu@3: False schema does not allow {'compatible': ['thead,c910', 'riscv'], 'device_type': ['cpu'], 'riscv,isa': ['rv64imafdc'], 'riscv,isa-base': ['rv64i'], 'riscv,isa-extensions': [1761635584, 1627416064, 1677746944, 2053727086, 1953628282, 1768125298, 8022374, 1701733221, 1761639017, 1752198400], 'reg': [[3]], 'i-cache-block-size': 64, 'i-cache-size': 65536, 'i-cache-sets': 512, 'd-cache-block-size': 64, 'd-cache-size': 65536, 'd-cache-sets': 512, 'next-level-cache': [[1]], 'mmu-type': ['riscv,sv39'], 'interrupt-controller': {'compatible': ['riscv,cpu-intc'], 'interrupt-controller': True, '#interrupt-cells': 1, 'phandle': 6}, '$nodename': ['cpu@3']} -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki