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From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: u-boot@lists.denx.de
Cc: Mayuresh Chitale <mchitale@ventanamicro.com>,
	Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Tom Rini <trini@konsulko.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Heinrich Schuchardt <xypron.glpk@gmx.de>
Subject: [PATCH v1 0/2] Risc-V ISA Extension Probing
Date: Mon,  6 Jan 2025 13:04:03 +0000	[thread overview]
Message-ID: <20250106130405.220369-1-mchitale@ventanamicro.com> (raw)

This series aims to enchance the ISA probing support by porting the
corresponding code from kernel and using it when probing for CMO
extensions.

Mayuresh Chitale (2):
  riscv: Enhance extension probing
  riscv: Fallback to riscv,isa

 arch/riscv/cpu/cpu.c                | 600 ++++++++++++++++++++++++++--
 arch/riscv/include/asm/cpufeature.h |  37 ++
 arch/riscv/include/asm/hwcap.h      | 105 +++++
 arch/riscv/lib/cache.c              |  26 +-
 4 files changed, 710 insertions(+), 58 deletions(-)
 create mode 100644 arch/riscv/include/asm/cpufeature.h
 create mode 100644 arch/riscv/include/asm/hwcap.h

-- 
2.34.1


             reply	other threads:[~2025-01-06 13:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-06 13:04 Mayuresh Chitale [this message]
2025-01-06 13:04 ` [PATCH v1 1/2] riscv: Enhance extension probing Mayuresh Chitale
2025-01-16  7:20   ` Leo Liang
2025-01-06 13:04 ` [PATCH v1 2/2] riscv: Fallback to riscv,isa Mayuresh Chitale
2025-01-16  7:22   ` Leo Liang
2025-01-06 14:38 ` [PATCH v1 0/2] Risc-V ISA Extension Probing Simon Glass

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