From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
ajones@ventanamicro.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v3 4/6] target/riscv: change priv_ver check in validate_profile()
Date: Wed, 15 Jan 2025 10:49:55 -0300 [thread overview]
Message-ID: <20250115134957.2179085-5-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20250115134957.2179085-1-dbarboza@ventanamicro.com>
The S profiles do a priv_ver check during validation to see if the
running priv_ver is compatible with it. This check is done by comparing
if the running priv_ver is equal to the priv_ver the profile specifies.
There is an universe where we added RVA23S64 support based on both
RVA23U64 and RVA22S64 and this error is being thrown:
qemu-system-riscv64: warning: Profile rva22s64 requires
priv spec v1.12.0, but priv ver v1.13.0 was set
We're enabling RVA22S64 (priv_ver 1.12) as a dependency of RVA23S64
(priv_ver 1.13) and complaining to users about what we did ourselves.
There's no drawback in allowing a profile to run in an env that has a
priv_ver newer than it's required by it. So, like Hiro Nakamura saves
the future by changing the past, change the priv_ver check now to allow
profiles to run in a newer priv_ver. This universe will have one less
warning to deal with.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/tcg/tcg-cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index c9e5a3b580..f5338f43cb 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -746,7 +746,7 @@ static void riscv_cpu_validate_profile(RISCVCPU *cpu,
#endif
if (profile->priv_spec != RISCV_PROFILE_ATTR_UNUSED &&
- profile->priv_spec != env->priv_ver) {
+ profile->priv_spec > env->priv_ver) {
profile_impl = false;
if (send_warn) {
--
2.47.1
next prev parent reply other threads:[~2025-01-15 13:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 13:49 [PATCH v3 0/6] target/riscv: RVA23 profile support Daniel Henrique Barboza
2025-01-15 13:49 ` [PATCH v3 1/6] target/riscv: add ssu64xl Daniel Henrique Barboza
2025-01-15 13:49 ` [PATCH v3 2/6] target/riscv: use RVB in RVA22U64 Daniel Henrique Barboza
2025-01-15 13:49 ` [PATCH v3 3/6] target/riscv: add profile u_parent and s_parent Daniel Henrique Barboza
2025-01-15 15:24 ` Andrew Jones
2025-01-15 13:49 ` Daniel Henrique Barboza [this message]
2025-01-15 15:36 ` [PATCH v3 4/6] target/riscv: change priv_ver check in validate_profile() Andrew Jones
2025-01-15 13:49 ` [PATCH v3 5/6] target/riscv: add RVA23U64 profile Daniel Henrique Barboza
2025-01-15 13:49 ` [PATCH v3 6/6] target/riscv: add RVA23S64 profile Daniel Henrique Barboza
2025-01-15 15:39 ` Andrew Jones
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250115134957.2179085-5-dbarboza@ventanamicro.com \
--to=dbarboza@ventanamicro.com \
--cc=ajones@ventanamicro.com \
--cc=alistair.francis@wdc.com \
--cc=bmeng@tinylab.org \
--cc=liwei1518@gmail.com \
--cc=palmer@rivosinc.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.