From: BALATON Zoltan <balaton@eik.bme.hu>
To: qemu-devel@nongnu.org, qemu-block@nongnu.org
Cc: Bernhard Beschow <shentey@gmail.com>, philmd@linaro.org
Subject: [PATCH] hw/sd/sdhci: Set reset value of interrupt registers
Date: Wed, 15 Jan 2025 20:04:22 +0100 (CET) [thread overview]
Message-ID: <20250115190422.5F0FA4E6030@zero.eik.bme.hu> (raw)
The interrupt enable registers are not reset to 0 but some bits are
enabled on reset. At least some U-Boot versions seem to expect this
and not initialise these registers before expecting interrupts. The
numbers in this patch match what QorIQ P1022 has on reset and fix
U-Boot for this SoC and should not break other drivers that initialise
(and thus overwrite) these reset values.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
I've also noticed that the work around marked with an XXX comment near
line 600 breaks the U-Boot I've tested so I need to disable it:
if ((s->sdmasysad % boundary_chk) == 0) {
- page_aligned = true;
+// page_aligned = true;
}
What should this hack fix and could it be now removed or somehow
restricted to cases where it's needed?
hw/sd/sdhci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 58375483e3..88eb0bfcb2 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -303,6 +303,8 @@ static void sdhci_reset(SDHCIState *s)
s->data_count = 0;
s->stopped_state = sdhc_not_stopped;
s->pending_insert_state = false;
+ s->norintstsen = 0x013f;
+ s->errintstsen = 0x117f;
}
static void sdhci_poweron_reset(DeviceState *dev)
--
2.30.9
next reply other threads:[~2025-01-15 19:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 19:04 BALATON Zoltan [this message]
2025-01-30 12:46 ` [PATCH] hw/sd/sdhci: Set reset value of interrupt registers BALATON Zoltan
2025-02-06 10:00 ` Philippe Mathieu-Daudé
2025-02-06 12:49 ` BALATON Zoltan
2025-02-06 13:20 ` Philippe Mathieu-Daudé
2025-02-06 13:49 ` BALATON Zoltan
2025-02-06 15:05 ` Philippe Mathieu-Daudé
2025-02-09 12:10 ` Bernhard Beschow
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