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From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-devel@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
	Dmitry Fleytman <dmitry.fleytman@gmail.com>,
	Akihiko Odaki <akihiko.odaki@daynix.com>,
	Jason Wang <jasowang@redhat.com>,
	Sriram Yagnaraman <sriram.yagnaraman@ericsson.com>,
	Fabiano Rosas <farosas@suse.de>,
	Laurent Vivier <lvivier@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Subject: [PATCH 2/9] net/e1000e: Permit disabling interrupt throttling
Date: Sat, 18 Jan 2025 03:02:58 +1000	[thread overview]
Message-ID: <20250117170306.403075-3-npiggin@gmail.com> (raw)
In-Reply-To: <20250117170306.403075-1-npiggin@gmail.com>

The spec explicitly permits xITR register interval field to have a value
of zero to disable throttling. The e1000e model already allows for this
in the throttling logic.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 hw/net/e1000e_core.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
index 24138587905..e32955d244b 100644
--- a/hw/net/e1000e_core.c
+++ b/hw/net/e1000e_core.c
@@ -2783,7 +2783,11 @@ e1000e_set_itr(E1000ECore *core, int index, uint32_t val)
     trace_e1000e_irq_itr_set(val);
 
     core->itr_guest_value = interval;
-    core->mac[index] = MAX(interval, E1000E_MIN_XITR);
+    if (interval == 0) {
+        core->mac[index] = 0;
+    } else {
+        core->mac[index] = MAX(interval, E1000E_MIN_XITR);
+    }
 }
 
 static void
@@ -2795,7 +2799,11 @@ e1000e_set_eitr(E1000ECore *core, int index, uint32_t val)
     trace_e1000e_irq_eitr_set(eitr_num, val);
 
     core->eitr_guest_value[eitr_num] = interval;
-    core->mac[index] = MAX(interval, E1000E_MIN_XITR);
+    if (interval == 0) {
+        core->mac[index] = 0;
+    } else {
+        core->mac[index] = MAX(interval, E1000E_MIN_XITR);
+    }
 }
 
 static void
-- 
2.45.2



  parent reply	other threads:[~2025-01-17 17:04 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-17 17:02 [PATCH 0/9] hw/e1000e|igb: interrupts and qtests fixes Nicholas Piggin
2025-01-17 17:02 ` [PATCH 1/9] qtest/e1000e|igb: Clear interrupt-cause and msix pending bits after irq Nicholas Piggin
2025-01-17 17:02 ` Nicholas Piggin [this message]
2025-01-17 17:02 ` [PATCH 3/9] qtest/e1000e|igb: assert irqs are clear before triggering an irq Nicholas Piggin
2025-01-18  8:14   ` Akihiko Odaki
2025-01-19  9:22   ` Yan Vugenfirer
2025-01-21  4:45     ` Nicholas Piggin
2025-01-17 17:03 ` [PATCH 4/9] net/igb: Fix interrupt throttling interval calculation Nicholas Piggin
2025-01-18  8:22   ` Akihiko Odaki
2025-01-17 17:03 ` [PATCH 5/9] net/igb: Fix EITR LLI and counter fields Nicholas Piggin
2025-01-18  8:37   ` Akihiko Odaki
2025-01-17 17:03 ` [PATCH 6/9] net/e1000e|igb: Fix interrupt throttling logic Nicholas Piggin
2025-01-18  9:50   ` Akihiko Odaki
2025-01-17 17:03 ` [PATCH 7/9] qtest/e1000e|igb: Test interrupt throttling in multiple_transfers test Nicholas Piggin
2025-01-17 17:03 ` [PATCH 8/9] net/e1000e: Fix xITR minimum value Nicholas Piggin
2025-01-18  7:50   ` Akihiko Odaki
2025-01-17 17:03 ` [PATCH 9/9] hw/net/e1000e|igb: Remove xitr_guest_value logic Nicholas Piggin

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