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charset=us-ascii Content-Disposition: inline tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 595523945be0a5a2f12a1c04772383293fbc04a1 commit: 7b937cc243e5b1df8780a0aa743ce800df6c68d1 of: Create of_root if no dtb provided by firmware date: 11 months ago config: mips-randconfig-r132-20250118 (https://download.01.org/0day-ci/archive/20250118/202501181915.7EJcsNDo-lkp@intel.com/config) compiler: mips64-linux-gcc (GCC) 14.2.0 reproduce: (https://download.01.org/0day-ci/archive/20250118/202501181915.7EJcsNDo-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202501181915.7EJcsNDo-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) drivers/of/fdt.c: note: in included file (through include/linux/mm_types_task.h, include/linux/mm_types.h, include/linux/mmzone.h, ...): >> arch/mips/include/asm/page.h:189:24: sparse: sparse: cast truncates bits from constant value (a800000000000000 becomes 0) vim +189 arch/mips/include/asm/page.h c6e8b587718c48 include/asm-mips/page.h Ralf Baechle 2005-02-10 167 6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 168 /* 6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 169 * __pa()/__va() should be used only during mem init. 6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 170 */ 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 171 static inline unsigned long ___pa(unsigned long x) 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 172 { a5ff1b34e16c20 arch/mips/include/asm/page.h Masahiro Yamada 2016-08-25 173 if (IS_ENABLED(CONFIG_64BIT)) { 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 174 /* 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 175 * For MIPS64 the virtual address may either be in one of 2f9060b1db4aa2 arch/mips/include/asm/page.h Bjorn Helgaas 2024-01-03 176 * the compatibility segments ckseg0 or ckseg1, or it may 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 177 * be in xkphys. 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 178 */ 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 179 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 180 } 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 181 a5ff1b34e16c20 arch/mips/include/asm/page.h Masahiro Yamada 2016-08-25 182 if (!IS_ENABLED(CONFIG_EVA)) { 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 183 /* 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 184 * We're using the standard MIPS32 legacy memory map, ie. 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 185 * the address x is going to be in kseg0 or kseg1. We can 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 186 * handle either case by masking out the desired bits using 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 187 * CPHYSADDR. 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 188 */ 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 @189 return CPHYSADDR(x); 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 190 } 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 191 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 192 /* 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 193 * EVA is in use so the memory map could be anything, making it not 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 194 * safe to just mask out bits. 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 195 */ 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 196 return x - PAGE_OFFSET + PHYS_OFFSET; 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 197 } 0d8d83d0447deb arch/mips/include/asm/page.h Paul Burton 2016-08-02 198 #define __pa(x) ___pa((unsigned long)(x)) 6f284a2ce7b8bc include/asm-mips/page.h Franck Bui-Huu 2007-01-10 199 #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) 49c426ba445f83 arch/mips/include/asm/page.h David Daney 2013-05-07 200 #include 5707bf6bcecd85 arch/mips/include/asm/page.h Ralf Baechle 2010-08-17 201 :::::: The code at line 189 was first introduced by commit :::::: 0d8d83d0447deb526c3125250eb391b5d76a3472 MIPS: Use CPHYSADDR to implement mips32 __pa :::::: TO: Paul Burton :::::: CC: Ralf Baechle -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki