From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C85611E522; Thu, 30 Jan 2025 14:27:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738247238; cv=none; b=Lg+BfOeOsPkmWbEUf+3YIM3LlfrYPHzkmX9qpVfWdGvFQ1TBaOJeB3IqOIfBcFnhmYoVx95M9az5cOBGQf9pFWw+rBeUooXiu1rEysqfNt6QfkM0DJFYZBiua2RzrPJEg3yYeQF6KjKXb/VZ+M3B7HOZmP5lwr4OlO+KihoLF3s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738247238; c=relaxed/simple; bh=DYwSlo28yxQR6M9kIZMMYibyCpNOYE+EmlgFAgWNFbA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JdOxQNddC+LaHyruWyNNw47a35oSSu1Yv8l27p4HGOkSESNGedOAnGVcMfFmqrJjR4iiqOFXJvlmV7l7ILXmipZ3cNYf8+0ICyLDwHypGQ2xc2jTa+6NUPeDE8pRYkJ40Y5YuAriI0vLhzcSalAogyikC2Bup/887+M8GHNWM60= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=E9SisT1N; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="E9SisT1N" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 493B8C4CED2; Thu, 30 Jan 2025 14:27:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1738247238; bh=DYwSlo28yxQR6M9kIZMMYibyCpNOYE+EmlgFAgWNFbA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E9SisT1NflOGEX/MeYPOhU4EQrMD4jePpx2o6ZqRJy4nAxicR8Ko1DD6ArjhDYWy7 SY5+it9OFIgAH8fDaYhb1TBV/mHoc+wWz8c6M/4djH0DXwagdIAxFqJbm0f8NmEVoL SuFaf9Di5PLtFR6XK9o4folWwOgTiWoB+z4duAXE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Jean-Baptiste Maneyrol , Jonathan Cameron Subject: [PATCH 5.10 100/133] iio: imu: inv_icm42600: fix spi burst write not supported Date: Thu, 30 Jan 2025 15:01:29 +0100 Message-ID: <20250130140146.563138771@linuxfoundation.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250130140142.491490528@linuxfoundation.org> References: <20250130140142.491490528@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jean-Baptiste Maneyrol commit c0f866de4ce447bca3191b9cefac60c4b36a7922 upstream. Burst write with SPI is not working for all icm42600 chips. It was only used for setting user offsets with regmap_bulk_write. Add specific SPI regmap config for using only single write with SPI. Fixes: 9f9ff91b775b ("iio: imu: inv_icm42600: add SPI driver for inv_icm42600 driver") Cc: stable@vger.kernel.org Signed-off-by: Jean-Baptiste Maneyrol Link: https://patch.msgid.link/20241112-inv-icm42600-fix-spi-burst-write-not-supported-v2-1-97690dc03607@tdk.com Signed-off-by: Jonathan Cameron Signed-off-by: Greg Kroah-Hartman --- drivers/iio/imu/inv_icm42600/inv_icm42600.h | 1 + drivers/iio/imu/inv_icm42600/inv_icm42600_core.c | 11 +++++++++++ drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c | 3 ++- 3 files changed, 14 insertions(+), 1 deletion(-) --- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h @@ -360,6 +360,7 @@ struct inv_icm42600_state { typedef int (*inv_icm42600_bus_setup)(struct inv_icm42600_state *); extern const struct regmap_config inv_icm42600_regmap_config; +extern const struct regmap_config inv_icm42600_spi_regmap_config; extern const struct dev_pm_ops inv_icm42600_pm_ops; const struct iio_mount_matrix * --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c @@ -43,6 +43,17 @@ const struct regmap_config inv_icm42600_ }; EXPORT_SYMBOL_GPL(inv_icm42600_regmap_config); +/* define specific regmap for SPI not supporting burst write */ +const struct regmap_config inv_icm42600_spi_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x4FFF, + .ranges = inv_icm42600_regmap_ranges, + .num_ranges = ARRAY_SIZE(inv_icm42600_regmap_ranges), + .use_single_write = true, +}; +EXPORT_SYMBOL_GPL(inv_icm42600_spi_regmap_config); + struct inv_icm42600_hw { uint8_t whoami; const char *name; --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c @@ -59,7 +59,8 @@ static int inv_icm42600_probe(struct spi return -EINVAL; chip = (enum inv_icm42600_chip)match; - regmap = devm_regmap_init_spi(spi, &inv_icm42600_regmap_config); + /* use SPI specific regmap */ + regmap = devm_regmap_init_spi(spi, &inv_icm42600_spi_regmap_config); if (IS_ERR(regmap)) return PTR_ERR(regmap);