Re: [PATCH v3 6/6] cxl: Cleanup partition size and perf helpers

[Jonathan Cameron <Jonathan.Cameron@huawei.com>]

On Mon, 03 Feb 2025 20:24:35 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> Now that the 'struct cxl_dpa_partition' array contains both size and
> performance information, all paths that iterate over that information
> can use a loop rather than hard-code 'ram' and 'pmem' lookups.
> 
> Remove, or reduce the scope of the temporary helpers that bridged the
> pre-'struct cxl_dpa_partition' state of the code to the post-'struct
> cxl_dpa_partition' state.
> 
> - to_{ram,pmem}_perf(): scope reduced to just sysfs_emit + is_visible()
>   helpers
> 
> - to_{ram,pmem}_res(): fold into their only users cxl_{ram,pmem}_size()
> 
> - cxl_ram_size(): scope reduced to ram_size_show() (Note,
>   cxl_pmem_size() also used to gate nvdimm registration)
> 
> In short, memdev sysfs ABI already made the promise that 0-sized
> partitions will show for memdevs, but that can be avoided for future
> partitions by using dynamic sysfs group visibility (new relative to when
> the partition ABI first shipped upstream).
> 
> Cc: Dave Jiang <dave.jiang@intel.com>
> Cc: Alejandro Lucero <alucerop@amd.com>
> Cc: Ira Weiny <ira.weiny@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Ok. This might make my earlier suggestions about not special
cases ram regions less effective, but I think perhaps worth considering
none the less.

Anyhow, this patch is fine.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>