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From: Simon Horman <horms@kernel.org>
To: Choong Yong Liang <yong.liang.choong@linux.intel.com>
Cc: "Jose Abreu" <joabreu@synopsys.com>,
	"Jose Abreu" <Jose.Abreu@synopsys.com>,
	"David E Box" <david.e.box@linux.intel.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"H . Peter Anvin" <hpa@zytor.com>,
	"Rajneesh Bhardwaj" <irenic.rajneesh@gmail.com>,
	"David E Box" <david.e.box@intel.com>,
	"Andrew Lunn" <andrew+netdev@lunn.ch>,
	"David S . Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Jiawen Wu" <jiawenwu@trustnetic.com>,
	"Mengyuan Lou" <mengyuanlou@net-swift.com>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Hans de Goede" <hdegoede@redhat.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Richard Cochran" <richardcochran@gmail.com>,
	"Andrew Halaney" <ahalaney@redhat.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH net-next v6 4/7] stmmac: intel: configure SerDes according to the interface mode
Date: Tue, 4 Feb 2025 18:13:39 +0000	[thread overview]
Message-ID: <20250204181339.GM234677@kernel.org> (raw)
In-Reply-To: <20250204061020.1199124-5-yong.liang.choong@linux.intel.com>

On Tue, Feb 04, 2025 at 02:10:17PM +0800, Choong Yong Liang wrote:
> Intel platform will configure the SerDes through PMC api based on the
> provided interface mode.
> 
> This patch adds several new functions below:-
> - intel_tsn_lane_is_available(): This new function reads FIA lane
>   ownership registers and common lane registers through IPC commands
>   to know which lane the mGbE port is assigned to.
> - intel_config_serdes(): To configure the SerDes based on the assigned
>   lane and latest interface mode, it sends IPC command to the PMC through
>   PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver.
> - intel_set_reg_access(): Set the register access to the available TSN
>   interface.
> 
> Signed-off-by: Choong Yong Liang <yong.liang.choong@linux.intel.com>

...

> +static int intel_config_serdes(struct net_device *ndev,
> +			       void *intel_data,
> +			       phy_interface_t interface)
> +{
> +	struct intel_priv_data *intel_priv = intel_data;
> +	struct stmmac_priv *priv = netdev_priv(ndev);
> +	int ret = 0;
> +
> +	if (!intel_tsn_lane_is_available(ndev, intel_priv)) {
> +		netdev_info(priv->dev,
> +			    "No TSN lane available to set the registers.\n");
> +		goto pmc_read_error;
> +	}
> +
> +	if (intel_priv->pid_modphy == PID_MODPHY1) {
> +		if (interface == PHY_INTERFACE_MODE_2500BASEX) {
> +			ret = intel_set_reg_access(pid_modphy1_2p5g_regs,
> +						   ARRAY_SIZE(pid_modphy1_2p5g_regs));
> +		} else {
> +			ret = intel_set_reg_access(pid_modphy1_1g_regs,
> +						   ARRAY_SIZE(pid_modphy1_1g_regs));
> +		}
> +	} else {
> +		if (interface == PHY_INTERFACE_MODE_2500BASEX) {
> +			ret = intel_set_reg_access(pid_modphy3_2p5g_regs,
> +						   ARRAY_SIZE(pid_modphy3_2p5g_regs));
> +		} else {
> +			ret = intel_set_reg_access(pid_modphy3_1g_regs,
> +						   ARRAY_SIZE(pid_modphy3_1g_regs));
> +		}
> +	}
> +
> +	priv->plat->phy_interface = interface;
> +
> +	if (ret < 0)
> +		goto pmc_read_error;

Perhaps this is an artifact of earlier refactoring,
but the condition above seems to be without meaning
as in either case the code goes directly to pmc_read_error.

> +
> +pmc_read_error:
> +	intel_serdes_powerdown(ndev, intel_priv);
> +	intel_serdes_powerup(ndev, intel_priv);
> +
> +	return ret;
> +}
> +
>  static void common_default_data(struct plat_stmmacenet_data *plat)
>  {
>  	plat->clk_csr = 2;	/* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */

...


  parent reply	other threads:[~2025-02-04 18:17 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-04  6:10 [PATCH net-next v6 0/7] Enable SGMII and 2500BASEX interface mode switching for Intel platforms Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 1/7] net: phylink: use act_link_an_mode to determine PHY Choong Yong Liang
2025-02-04 12:04   ` Russell King (Oracle)
2025-02-05  6:50     ` Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 2/7] net: pcs: xpcs: re-initiate clause 37 Auto-negotiation Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 3/7] arch: x86: add IPC mailbox accessor function and add SoC register access Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 4/7] stmmac: intel: configure SerDes according to the interface mode Choong Yong Liang
2025-02-04  8:25   ` Ilpo Järvinen
2025-02-06  2:20     ` Choong Yong Liang
2025-02-04 12:08   ` Russell King (Oracle)
2025-02-06  2:22     ` Choong Yong Liang
2025-02-06 10:11       ` Russell King (Oracle)
2025-02-04 18:13   ` Simon Horman [this message]
2025-02-06  2:23     ` Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 5/7] net: stmmac: configure SerDes on mac_finish Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 6/7] stmmac: intel: interface switching support for EHL platform Choong Yong Liang
2025-02-04  6:10 ` [PATCH net-next v6 7/7] stmmac: intel: interface switching support for ADL-N platform Choong Yong Liang

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