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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4390d94d802sm65995685e9.12.2025.02.06.10.18.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 06 Feb 2025 10:18:59 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Palmer Dabbelt , qemu-riscv@nongnu.org, Alistair Francis , Daniel Henrique Barboza , Bin Meng , Weiwei Li , Sunil V L , Liu Zhiwei , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 6/7] hw/riscv/hart: Make 'riscv_hart.h' header target-agnostic Date: Thu, 6 Feb 2025 19:18:26 +0100 Message-ID: <20250206181827.41557-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250206181827.41557-1-philmd@linaro.org> References: <20250206181827.41557-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Hardware code using HART rarely needs to knows its internals. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/riscv/riscv_hart.h | 4 ++-- hw/riscv/virt-acpi-build.c | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h index a6ed73a1956..a2ca455d8b1 100644 --- a/include/hw/riscv/riscv_hart.h +++ b/include/hw/riscv/riscv_hart.h @@ -22,7 +22,7 @@ #define HW_RISCV_HART_H #include "hw/sysbus.h" -#include "target/riscv/cpu.h" +#include "target/riscv/cpu-qom.h" #include "qom/object.h" #define TYPE_RISCV_HART_ARRAY "riscv.hart_array" @@ -42,7 +42,7 @@ struct RISCVHartArrayState { uint64_t *rnmi_irqvec; uint32_t num_rnmi_excpvec; uint64_t *rnmi_excpvec; - RISCVCPU *harts; + ArchCPU *harts; }; #endif diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 1ad68005085..0030c21bc41 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -39,6 +39,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "system/reset.h" +#include "target/riscv/cpu.h" #define ACPI_BUILD_TABLE_SIZE 0x20000 #define ACPI_BUILD_INTC_ID(socket, index) ((socket << 24) | (index)) -- 2.47.1