From: Jason Gunthorpe <jgg@nvidia.com>
To: Yi Liu <yi.l.liu@intel.com>
Cc: Baolu Lu <baolu.lu@linux.intel.com>,
joro@8bytes.org, kevin.tian@intel.com, eric.auger@redhat.com,
nicolinc@nvidia.com, chao.p.peng@linux.intel.com,
iommu@lists.linux.dev, vasant.hegde@amd.com, will@kernel.org,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Robin Murphy <robin.murphy@arm.com>
Subject: Re: [PATCH v6 09/14] iommu/vt-d: Add IOMMU_HWPT_ALLOC_PASID support
Date: Wed, 12 Feb 2025 08:59:30 -0400 [thread overview]
Message-ID: <20250212125930.GQ3754072@nvidia.com> (raw)
In-Reply-To: <bd1655c6-8b2f-4cfa-adb1-badc00d01811@intel.com>
On Wed, Feb 12, 2025 at 03:47:57PM +0800, Yi Liu wrote:
> Let's consult with other vendors. We need this enforcement because we lack
> a straightforward method to distinguish between PRIs in stage-1 and stage-2
> under nested translation. If other vendors share this requirement, it would
> be appropriate to implement this enforcement in IOMMUFD. Otherwise, we may
> check it in intel iommu driver.
I do expect HW to be able to distinguish S1/S2 faults for the purpose
of PRI, otherwise you cannot use non-present pages in the S2 at all,
which is something that is very desirable.
Eg AMD as a GN bit in the PAGE_SERVICE_REQUEST
ARM has a S2 bit in their F_TRANSLATION/etc
IMHO not being able to do this is an Intel limitation (that you should
get your HW team to fix)
However, right now there is no driver or core implementation for any
of this, so setting up a S2 with fault should be blocked in the core
code.
Jason
next prev parent reply other threads:[~2025-02-12 12:59 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-19 13:27 [PATCH v6 00/14] iommufd support pasid attach/replace Yi Liu
2024-12-19 13:27 ` [PATCH v6 01/14] iommu: Introduce a replace API for device pasid Yi Liu
2024-12-20 2:47 ` Baolu Lu
2025-01-09 7:08 ` Tian, Kevin
2025-01-09 7:20 ` Tian, Kevin
2025-01-09 14:43 ` Jason Gunthorpe
2025-01-10 2:31 ` Baolu Lu
2025-01-10 7:21 ` Tian, Kevin
2025-01-16 10:00 ` Yi Liu
2025-01-13 20:21 ` Jason Gunthorpe
2025-01-14 8:10 ` Tian, Kevin
2025-01-14 13:45 ` Jason Gunthorpe
2025-01-15 4:43 ` Tian, Kevin
2025-01-15 14:43 ` Jason Gunthorpe
2025-01-16 5:48 ` Tian, Kevin
2025-01-17 10:32 ` Yi Liu
2024-12-19 13:27 ` [PATCH v6 02/14] iommufd: Refactor __fault_domain_replace_dev() to be a wrapper of iommu_replace_group_handle() Yi Liu
2024-12-19 13:27 ` [PATCH v6 03/14] iommufd: Move the iommufd_handle helpers to device.c Yi Liu
2024-12-20 3:31 ` Baolu Lu
2024-12-20 6:34 ` Yi Liu
2024-12-19 13:27 ` [PATCH v6 04/14] iommufd: Always pass iommu_attach_handle to iommu core Yi Liu
2024-12-20 4:35 ` Nicolin Chen
2024-12-20 6:40 ` Yi Liu
2024-12-20 6:58 ` Nicolin Chen
2025-01-09 7:44 ` Tian, Kevin
2025-01-17 12:33 ` Yi Liu
2025-01-17 19:03 ` Nicolin Chen
2024-12-19 13:27 ` [PATCH v6 05/14] iommufd: Pass pasid through the device attach/replace path Yi Liu
2025-01-09 7:53 ` Tian, Kevin
2025-01-09 14:51 ` Jason Gunthorpe
2025-01-10 7:22 ` Tian, Kevin
2024-12-19 13:27 ` [PATCH v6 06/14] iommufd: Mark PASID-compatible domain Yi Liu
2025-01-09 7:56 ` Tian, Kevin
2025-01-09 14:54 ` Jason Gunthorpe
2025-01-17 10:50 ` Yi Liu
2024-12-19 13:27 ` [PATCH v6 07/14] iommufd: Support pasid attach/replace Yi Liu
2025-01-09 8:25 ` Tian, Kevin
2024-12-19 13:27 ` [PATCH v6 08/14] iommufd: Enforce PASID-compatible domain for RID Yi Liu
2025-01-09 8:31 ` Tian, Kevin
2024-12-19 13:27 ` [PATCH v6 09/14] iommu/vt-d: Add IOMMU_HWPT_ALLOC_PASID support Yi Liu
2024-12-23 2:51 ` Baolu Lu
2024-12-24 11:35 ` Yi Liu
2024-12-25 1:02 ` Baolu Lu
2024-12-25 4:30 ` Yi Liu
2024-12-25 7:13 ` Baolu Lu
2025-02-12 7:47 ` Yi Liu
2025-02-12 12:59 ` Jason Gunthorpe [this message]
2025-02-13 9:34 ` Yi Liu
2025-02-13 12:56 ` Jason Gunthorpe
2025-02-14 3:24 ` Yi Liu
2025-02-12 13:00 ` Robin Murphy
2025-02-12 13:08 ` Jason Gunthorpe
2025-02-13 10:10 ` Yi Liu
2025-02-13 10:24 ` Robin Murphy
2025-02-13 12:53 ` Yi Liu
2025-02-19 8:02 ` Tian, Kevin
2025-02-19 12:50 ` Yi Liu
2025-02-20 6:57 ` Tian, Kevin
2025-01-09 15:27 ` Jason Gunthorpe
2025-01-10 2:41 ` Baolu Lu
2025-01-10 7:34 ` Tian, Kevin
2025-01-17 10:57 ` Yi Liu
2025-01-10 7:38 ` Tian, Kevin
2025-01-14 8:13 ` Tian, Kevin
2025-01-13 20:31 ` Jason Gunthorpe
2025-01-14 8:19 ` Tian, Kevin
2024-12-19 13:27 ` [PATCH v6 10/14] iommufd: Allow allocating PASID-compatible domain Yi Liu
2024-12-19 13:27 ` [PATCH v6 11/14] iommufd/selftest: Add set_dev_pasid in mock iommu Yi Liu
2024-12-19 13:27 ` [PATCH v6 12/14] iommufd/selftest: Add a helper to get test device Yi Liu
2024-12-19 13:27 ` [PATCH v6 13/14] iommufd/selftest: Add test ops to test pasid attach/detach Yi Liu
2024-12-19 13:27 ` [PATCH v6 14/14] iommufd/selftest: Add coverage for iommufd " Yi Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250212125930.GQ3754072@nvidia.com \
--to=jgg@nvidia.com \
--cc=baolu.lu@linux.intel.com \
--cc=chao.p.peng@linux.intel.com \
--cc=eric.auger@redhat.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=nicolinc@nvidia.com \
--cc=robin.murphy@arm.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=vasant.hegde@amd.com \
--cc=will@kernel.org \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.