* [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
This is a spin-off of the series titled
"powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
During the development of that series, it became clear that many
devicetree bindings for Freescale MPC8xxx platforms are still in the old
plain-text format, or don't exist at all, and in any case don't mention
all valid compatible strings.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
Changes in v2:
- rebased on v6.14-rc1
- various style cleanups, both in YAML and in DTS examples
- minor improvements to the commit messages
- Link to v1: https://lore.kernel.org/r/20250126-ppcyaml-v1-0-50649f51c3dd@posteo.net
---
J. Neuschäfer (12):
dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
dt-bindings: ata: Convert fsl,pq-sata to YAML
dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx to YAML
dt-bindings: dma: Convert fsl,elo*-dma to YAML
dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
dt-bindings: spi: Convert Freescale SPI bindings to YAML
dt-bindings: memory-controllers: Convert fsl,elbc to YAML
dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
dt-bindings: nand: Add fsl,elbc-fcm-nand
dt-bindings: mtd: raw-nand-chip: Relax node name pattern
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ---
.../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 ++++++++++++++
.../devicetree/bindings/crypto/fsl-sec2.txt | 65 -------
.../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
.../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
.../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
.../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++
.../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++
.../bindings/mfd/fsl,mcu-mpc8349emitx.yaml | 53 ++++++
.../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 +++++++
.../devicetree/bindings/mtd/raw-nand-chip.yaml | 2 +-
.../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 ++++++++++++
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 ---
.../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
.../bindings/powerpc/fsl/fsl,mpc83xx.yaml | 67 +++++++
.../devicetree/bindings/powerpc/fsl/lbc.txt | 43 -----
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 17 --
.../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++
Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++
Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 -------
.../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 ---
.../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 +++++++
23 files changed, 1308 insertions(+), 472 deletions(-)
---
base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
change-id: 20250126-ppcyaml-680ccd8b3fc2
Best regards,
--
J. Neuschäfer <j.ne@posteo.net>
^ permalink raw reply [flat|nested] 117+ messages in thread* [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
This is a spin-off of the series titled
"powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
During the development of that series, it became clear that many
devicetree bindings for Freescale MPC8xxx platforms are still in the old
plain-text format, or don't exist at all, and in any case don't mention
all valid compatible strings.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
Changes in v2:
- rebased on v6.14-rc1
- various style cleanups, both in YAML and in DTS examples
- minor improvements to the commit messages
- Link to v1: https://lore.kernel.org/r/20250126-ppcyaml-v1-0-50649f51c3dd@posteo.net
---
J. Neuschäfer (12):
dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
dt-bindings: ata: Convert fsl,pq-sata to YAML
dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx to YAML
dt-bindings: dma: Convert fsl,elo*-dma to YAML
dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
dt-bindings: spi: Convert Freescale SPI bindings to YAML
dt-bindings: memory-controllers: Convert fsl,elbc to YAML
dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
dt-bindings: nand: Add fsl,elbc-fcm-nand
dt-bindings: mtd: raw-nand-chip: Relax node name pattern
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ---
.../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 ++++++++++++++
.../devicetree/bindings/crypto/fsl-sec2.txt | 65 -------
.../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
.../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
.../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
.../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++
.../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++
.../bindings/mfd/fsl,mcu-mpc8349emitx.yaml | 53 ++++++
.../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 +++++++
.../devicetree/bindings/mtd/raw-nand-chip.yaml | 2 +-
.../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 ++++++++++++
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 ---
.../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
.../bindings/powerpc/fsl/fsl,mpc83xx.yaml | 67 +++++++
.../devicetree/bindings/powerpc/fsl/lbc.txt | 43 -----
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 17 --
.../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++
Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++
Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 -------
.../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 ---
.../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 +++++++
23 files changed, 1308 insertions(+), 472 deletions(-)
---
base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
change-id: 20250126-ppcyaml-680ccd8b3fc2
Best regards,
--
J. Neuschäfer <j.ne@posteo.net>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
This is a spin-off of the series titled
"powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
During the development of that series, it became clear that many
devicetree bindings for Freescale MPC8xxx platforms are still in the old
plain-text format, or don't exist at all, and in any case don't mention
all valid compatible strings.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
Changes in v2:
- rebased on v6.14-rc1
- various style cleanups, both in YAML and in DTS examples
- minor improvements to the commit messages
- Link to v1: https://lore.kernel.org/r/20250126-ppcyaml-v1-0-50649f51c3dd@posteo.net
---
J. Neuschäfer (12):
dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
dt-bindings: ata: Convert fsl,pq-sata to YAML
dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx to YAML
dt-bindings: dma: Convert fsl,elo*-dma to YAML
dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
dt-bindings: spi: Convert Freescale SPI bindings to YAML
dt-bindings: memory-controllers: Convert fsl,elbc to YAML
dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
dt-bindings: nand: Add fsl,elbc-fcm-nand
dt-bindings: mtd: raw-nand-chip: Relax node name pattern
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ---
.../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 ++++++++++++++
.../devicetree/bindings/crypto/fsl-sec2.txt | 65 -------
.../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
.../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
.../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
.../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++
.../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++
.../bindings/mfd/fsl,mcu-mpc8349emitx.yaml | 53 ++++++
.../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 +++++++
.../devicetree/bindings/mtd/raw-nand-chip.yaml | 2 +-
.../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 ++++++++++++
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 ---
.../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
.../bindings/powerpc/fsl/fsl,mpc83xx.yaml | 67 +++++++
.../devicetree/bindings/powerpc/fsl/lbc.txt | 43 -----
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 17 --
.../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++
Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++
Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 -------
.../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 ---
.../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 +++++++
23 files changed, 1308 insertions(+), 472 deletions(-)
---
base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
change-id: 20250126-ppcyaml-680ccd8b3fc2
Best regards,
--
J. Neuschäfer <j.ne@posteo.net>
^ permalink raw reply [flat|nested] 117+ messages in thread* [PATCH v2 01/12] dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Add a new binding for MPC83xx platforms, describing the board compatible
strings used in currently existing device trees.
Note that the SoC bus is called immr@... in many existing devicetrees,
but this contradicts the simple-bus binding.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line
- fix property order to comply with dts coding style
- add Rob Herrings's R-b tag
---
.../bindings/powerpc/fsl/fsl,mpc83xx.yaml | 67 ++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml b/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1d7ed67473ca447e0fd2e9b8f30d20e18c601ccf
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/fsl/fsl,mpc83xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale PowerQUICC II Pro (MPC83xx) platforms
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: MPC83xx Reference Design Boards
+ items:
+ - enum:
+ - fsl,mpc8308rdb
+ - fsl,mpc8315erdb
+ - fsl,mpc8360rdk
+ - fsl,mpc8377rdb
+ - fsl,mpc8377wlan
+ - fsl,mpc8378rdb
+ - fsl,mpc8379rdb
+
+patternProperties:
+ "^soc@.*$":
+ type: object
+ properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8315-immr
+ - fsl,mpc8308-immr
+ - const: simple-bus
+ - items:
+ - const: fsl,mpc8360-immr
+ - const: fsl,immr
+ - const: fsl,soc
+ - const: simple-bus
+ - const: simple-bus
+
+additionalProperties: true
+
+examples:
+ - |
+ / {
+ compatible = "fsl,mpc8315erdb";
+ model = "MPC8315E-RDB";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ soc@e0000000 {
+ compatible = "fsl,mpc8315-immr", "simple-bus";
+ reg = <0xe0000000 0x00000200>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 0xe0000000 0x00100000>;
+ bus-frequency = <0>;
+ };
+ };
+
+...
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 01/12] dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Add a new binding for MPC83xx platforms, describing the board compatible
strings used in currently existing device trees.
Note that the SoC bus is called immr@... in many existing devicetrees,
but this contradicts the simple-bus binding.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line
- fix property order to comply with dts coding style
- add Rob Herrings's R-b tag
---
.../bindings/powerpc/fsl/fsl,mpc83xx.yaml | 67 ++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml b/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1d7ed67473ca447e0fd2e9b8f30d20e18c601ccf
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/fsl/fsl,mpc83xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale PowerQUICC II Pro (MPC83xx) platforms
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: MPC83xx Reference Design Boards
+ items:
+ - enum:
+ - fsl,mpc8308rdb
+ - fsl,mpc8315erdb
+ - fsl,mpc8360rdk
+ - fsl,mpc8377rdb
+ - fsl,mpc8377wlan
+ - fsl,mpc8378rdb
+ - fsl,mpc8379rdb
+
+patternProperties:
+ "^soc@.*$":
+ type: object
+ properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8315-immr
+ - fsl,mpc8308-immr
+ - const: simple-bus
+ - items:
+ - const: fsl,mpc8360-immr
+ - const: fsl,immr
+ - const: fsl,soc
+ - const: simple-bus
+ - const: simple-bus
+
+additionalProperties: true
+
+examples:
+ - |
+ / {
+ compatible = "fsl,mpc8315erdb";
+ model = "MPC8315E-RDB";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ soc@e0000000 {
+ compatible = "fsl,mpc8315-immr", "simple-bus";
+ reg = <0xe0000000 0x00000200>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 0xe0000000 0x00100000>;
+ bus-frequency = <0>;
+ };
+ };
+
+...
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 01/12] dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Add a new binding for MPC83xx platforms, describing the board compatible
strings used in currently existing device trees.
Note that the SoC bus is called immr@... in many existing devicetrees,
but this contradicts the simple-bus binding.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line
- fix property order to comply with dts coding style
- add Rob Herrings's R-b tag
---
.../bindings/powerpc/fsl/fsl,mpc83xx.yaml | 67 ++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml b/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1d7ed67473ca447e0fd2e9b8f30d20e18c601ccf
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/fsl/fsl,mpc83xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale PowerQUICC II Pro (MPC83xx) platforms
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: MPC83xx Reference Design Boards
+ items:
+ - enum:
+ - fsl,mpc8308rdb
+ - fsl,mpc8315erdb
+ - fsl,mpc8360rdk
+ - fsl,mpc8377rdb
+ - fsl,mpc8377wlan
+ - fsl,mpc8378rdb
+ - fsl,mpc8379rdb
+
+patternProperties:
+ "^soc@.*$":
+ type: object
+ properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8315-immr
+ - fsl,mpc8308-immr
+ - const: simple-bus
+ - items:
+ - const: fsl,mpc8360-immr
+ - const: fsl,immr
+ - const: fsl,soc
+ - const: simple-bus
+ - const: simple-bus
+
+additionalProperties: true
+
+examples:
+ - |
+ / {
+ compatible = "fsl,mpc8315erdb";
+ model = "MPC8315E-RDB";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ soc@e0000000 {
+ compatible = "fsl,mpc8315-immr", "simple-bus";
+ reg = <0xe0000000 0x00000200>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 0xe0000000 0x00100000>;
+ bus-frequency = <0>;
+ };
+ };
+
+...
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread
* [PATCH v2 02/12] dt-bindings: ata: Convert fsl,pq-sata to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Convert the Freescale PowerQUICC SATA controller binding from text form
to YAML. The list of compatible strings reflects current usage.
To clarify the description, I changed it to mention "each SATA
controller" instead of each port.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove unnecessary multiline marker (|)
- clarified controllers vs. ports in the description
- trim subject line (remove "binding")
---
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ----------
2 files changed, 59 insertions(+), 28 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..97eea11b4fbbb773487c004abbedcb7bd290605c
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale 8xxx/3.0 Gb/s SATA nodes
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ SATA nodes are defined to describe on-chip Serial ATA controllers.
+ Each SATA controller should have its own node.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8377-sata
+ - fsl,mpc8536-sata
+ - fsl,mpc8315-sata
+ - fsl,mpc8379-sata
+ - const: fsl,pq-sata
+ - const: fsl,pq-sata-v2
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3, 4]
+ description: |
+ 1 for controller @ 0x18000
+ 2 for controller @ 0x19000
+ 3 for controller @ 0x1a000
+ 4 for controller @ 0x1b000
+
+required:
+ - compatible
+ - interrupts
+ - cell-index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&ipic>;
+ };
diff --git a/Documentation/devicetree/bindings/ata/fsl-sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
deleted file mode 100644
index fd63bb3becc9363c520a8fd06629fdc52c4d4299..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/ata/fsl-sata.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-* Freescale 8xxx/3.0 Gb/s SATA nodes
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA port should have its own node.
-
-Required properties:
-- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-sata", where CHIP is the processor
- (mpc8315, mpc8379, etc.) and the second is
- "fsl,pq-sata"
-- interrupts : <interrupt mapping for SATA IRQ>
-- cell-index : controller index.
- 1 for controller @ 0x18000
- 2 for controller @ 0x19000
- 3 for controller @ 0x1a000
- 4 for controller @ 0x1b000
-
-Optional properties:
-- reg : <registers mapping>
-
-Example:
- sata@18000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x18000 0x1000>;
- cell-index = <1>;
- interrupts = <2c 8>;
- interrupt-parent = < &ipic >;
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 02/12] dt-bindings: ata: Convert fsl,pq-sata to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale PowerQUICC SATA controller binding from text form
to YAML. The list of compatible strings reflects current usage.
To clarify the description, I changed it to mention "each SATA
controller" instead of each port.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove unnecessary multiline marker (|)
- clarified controllers vs. ports in the description
- trim subject line (remove "binding")
---
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ----------
2 files changed, 59 insertions(+), 28 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..97eea11b4fbbb773487c004abbedcb7bd290605c
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale 8xxx/3.0 Gb/s SATA nodes
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ SATA nodes are defined to describe on-chip Serial ATA controllers.
+ Each SATA controller should have its own node.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8377-sata
+ - fsl,mpc8536-sata
+ - fsl,mpc8315-sata
+ - fsl,mpc8379-sata
+ - const: fsl,pq-sata
+ - const: fsl,pq-sata-v2
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3, 4]
+ description: |
+ 1 for controller @ 0x18000
+ 2 for controller @ 0x19000
+ 3 for controller @ 0x1a000
+ 4 for controller @ 0x1b000
+
+required:
+ - compatible
+ - interrupts
+ - cell-index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&ipic>;
+ };
diff --git a/Documentation/devicetree/bindings/ata/fsl-sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
deleted file mode 100644
index fd63bb3becc9363c520a8fd06629fdc52c4d4299..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/ata/fsl-sata.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-* Freescale 8xxx/3.0 Gb/s SATA nodes
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA port should have its own node.
-
-Required properties:
-- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-sata", where CHIP is the processor
- (mpc8315, mpc8379, etc.) and the second is
- "fsl,pq-sata"
-- interrupts : <interrupt mapping for SATA IRQ>
-- cell-index : controller index.
- 1 for controller @ 0x18000
- 2 for controller @ 0x19000
- 3 for controller @ 0x1a000
- 4 for controller @ 0x1b000
-
-Optional properties:
-- reg : <registers mapping>
-
-Example:
- sata@18000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x18000 0x1000>;
- cell-index = <1>;
- interrupts = <2c 8>;
- interrupt-parent = < &ipic >;
- };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 02/12] dt-bindings: ata: Convert fsl,pq-sata to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale PowerQUICC SATA controller binding from text form
to YAML. The list of compatible strings reflects current usage.
To clarify the description, I changed it to mention "each SATA
controller" instead of each port.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove unnecessary multiline marker (|)
- clarified controllers vs. ports in the description
- trim subject line (remove "binding")
---
.../devicetree/bindings/ata/fsl,pq-sata.yaml | 59 ++++++++++++++++++++++
Documentation/devicetree/bindings/ata/fsl-sata.txt | 28 ----------
2 files changed, 59 insertions(+), 28 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..97eea11b4fbbb773487c004abbedcb7bd290605c
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/fsl,pq-sata.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale 8xxx/3.0 Gb/s SATA nodes
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ SATA nodes are defined to describe on-chip Serial ATA controllers.
+ Each SATA controller should have its own node.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8377-sata
+ - fsl,mpc8536-sata
+ - fsl,mpc8315-sata
+ - fsl,mpc8379-sata
+ - const: fsl,pq-sata
+ - const: fsl,pq-sata-v2
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3, 4]
+ description: |
+ 1 for controller @ 0x18000
+ 2 for controller @ 0x19000
+ 3 for controller @ 0x1a000
+ 4 for controller @ 0x1b000
+
+required:
+ - compatible
+ - interrupts
+ - cell-index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&ipic>;
+ };
diff --git a/Documentation/devicetree/bindings/ata/fsl-sata.txt b/Documentation/devicetree/bindings/ata/fsl-sata.txt
deleted file mode 100644
index fd63bb3becc9363c520a8fd06629fdc52c4d4299..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/ata/fsl-sata.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-* Freescale 8xxx/3.0 Gb/s SATA nodes
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA port should have its own node.
-
-Required properties:
-- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-sata", where CHIP is the processor
- (mpc8315, mpc8379, etc.) and the second is
- "fsl,pq-sata"
-- interrupts : <interrupt mapping for SATA IRQ>
-- cell-index : controller index.
- 1 for controller @ 0x18000
- 2 for controller @ 0x19000
- 3 for controller @ 0x1a000
- 4 for controller @ 0x1b000
-
-Optional properties:
-- reg : <registers mapping>
-
-Example:
- sata@18000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x18000 0x1000>;
- cell-index = <1>;
- interrupts = <2c 8>;
- interrupt-parent = < &ipic >;
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 02/12] dt-bindings: ata: Convert fsl,pq-sata to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-07 23:17 ` Damien Le Moal
-1 siblings, 0 replies; 117+ messages in thread
From: Damien Le Moal @ 2025-02-07 23:17 UTC (permalink / raw)
To: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On 2/8/25 06:30, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale PowerQUICC SATA controller binding from text form
> to YAML. The list of compatible strings reflects current usage.
>
> To clarify the description, I changed it to mention "each SATA
> controller" instead of each port.
>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Acked-by: Damien Le Moal <dlemoal@kernel.org>
--
Damien Le Moal
Western Digital Research
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 02/12] dt-bindings: ata: Convert fsl,pq-sata to YAML
@ 2025-02-07 23:17 ` Damien Le Moal
0 siblings, 0 replies; 117+ messages in thread
From: Damien Le Moal @ 2025-02-07 23:17 UTC (permalink / raw)
To: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On 2/8/25 06:30, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale PowerQUICC SATA controller binding from text form
> to YAML. The list of compatible strings reflects current usage.
>
> To clarify the description, I changed it to mention "each SATA
> controller" instead of each port.
>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Acked-by: Damien Le Moal <dlemoal@kernel.org>
--
Damien Le Moal
Western Digital Research
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Convert the Freescale security engine (crypto accelerator) binding from
text form to YAML. The list of compatible strings reflects what was
previously described in prose; not all combinations occur in existing
devicetrees.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- several improvements suggested by Rob Herring:
- remove unnecessary multiline markers
- constrain fsl,num-channels to enum: [1,4]
- constrain fsl,channel-fifo-len to plausible limits
- constrain fsl,exec-units-mask to maximum=0xfff
- trim subject line (remove "binding")
---
.../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
.../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
2 files changed, 142 insertions(+), 65 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net.
+
+properties:
+ compatible:
+ description:
+ Should contain entries for this and backward compatible SEC versions,
+ high to low. Warning - SEC1 and SEC2 are mutually exclusive.
+ oneOf:
+ - items:
+ - const: fsl,sec3.3
+ - const: fsl,sec3.1
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec3.1
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec1.2
+ - const: fsl,sec1.0
+ - items:
+ - const: fsl,sec1.0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,num-channels:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 4 ]
+ description: An integer representing the number of channels available.
+
+ fsl,channel-fifo-len:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 100
+ description:
+ An integer representing the number of descriptor pointers each channel
+ fetch fifo can hold.
+
+ fsl,exec-units-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 0xfff
+ description: |
+ The bitmask representing what execution units (EUs) are available.
+ EU information should be encoded following the SEC's Descriptor Header
+ Dword EU_SEL0 field documentation, i.e. as follows:
+
+ bit 0 = reserved - should be 0
+ bit 1 = set if SEC has the ARC4 EU (AFEU)
+ bit 2 = set if SEC has the DES/3DES EU (DEU)
+ bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
+ bit 4 = set if SEC has the random number generator EU (RNG)
+ bit 5 = set if SEC has the public key EU (PKEU)
+ bit 6 = set if SEC has the AES EU (AESU)
+ bit 7 = set if SEC has the Kasumi EU (KEU)
+ bit 8 = set if SEC has the CRC EU (CRCU)
+ bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
+
+ remaining bits are reserved for future SEC EUs.
+
+ fsl,descriptor-types-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The bitmask representing what descriptors are available. Descriptor type
+ information should be encoded following the SEC's Descriptor Header Dword
+ DESC_TYPE field documentation, i.e. as follows:
+
+ bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
+ bit 1 = set if SEC supports the ipsec_esp descriptor type
+ bit 2 = set if SEC supports the common_nonsnoop desc. type
+ bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
+ bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
+ bit 5 = set if SEC supports the srtp descriptor type
+ bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
+ bit 7 = set if SEC supports the pkeu_assemble descriptor type
+ bit 8 = set if SEC supports the aesu_key_expand_output desc.type
+ bit 9 = set if SEC supports the pkeu_ptmul descriptor type
+ bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
+ bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
+
+ ..and so on and so forth.
+
+required:
+ - compatible
+ - reg
+ - fsl,num-channels
+ - fsl,channel-fifo-len
+ - fsl,exec-units-mask
+ - fsl,descriptor-types-mask
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ /* MPC8548E */
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <29 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
deleted file mode 100644
index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
-
-Required properties:
-
-- compatible : Should contain entries for this and backward compatible
- SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
- e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
- warning: SEC1 and SEC2 are mutually exclusive
-- reg : Offset and length of the register set for the device
-- interrupts : the SEC's interrupt number
-- fsl,num-channels : An integer representing the number of channels
- available.
-- fsl,channel-fifo-len : An integer representing the number of
- descriptor pointers each channel fetch fifo can hold.
-- fsl,exec-units-mask : The bitmask representing what execution units
- (EUs) are available. It's a single 32-bit cell. EU information
- should be encoded following the SEC's Descriptor Header Dword
- EU_SEL0 field documentation, i.e. as follows:
-
- bit 0 = reserved - should be 0
- bit 1 = set if SEC has the ARC4 EU (AFEU)
- bit 2 = set if SEC has the DES/3DES EU (DEU)
- bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
- bit 4 = set if SEC has the random number generator EU (RNG)
- bit 5 = set if SEC has the public key EU (PKEU)
- bit 6 = set if SEC has the AES EU (AESU)
- bit 7 = set if SEC has the Kasumi EU (KEU)
- bit 8 = set if SEC has the CRC EU (CRCU)
- bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
-
-remaining bits are reserved for future SEC EUs.
-
-- fsl,descriptor-types-mask : The bitmask representing what descriptors
- are available. It's a single 32-bit cell. Descriptor type information
- should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
- field documentation, i.e. as follows:
-
- bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
- bit 1 = set if SEC supports the ipsec_esp descriptor type
- bit 2 = set if SEC supports the common_nonsnoop desc. type
- bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
- bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
- bit 5 = set if SEC supports the srtp descriptor type
- bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
- bit 7 = set if SEC supports the pkeu_assemble descriptor type
- bit 8 = set if SEC supports the aesu_key_expand_output desc.type
- bit 9 = set if SEC supports the pkeu_ptmul descriptor type
- bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
- bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
-
- ..and so on and so forth.
-
-Example:
-
- /* MPC8548E */
- crypto@30000 {
- compatible = "fsl,sec2.1", "fsl,sec2.0";
- reg = <0x30000 0x10000>;
- interrupts = <29 2>;
- interrupt-parent = <&mpic>;
- fsl,num-channels = <4>;
- fsl,channel-fifo-len = <24>;
- fsl,exec-units-mask = <0xfe>;
- fsl,descriptor-types-mask = <0x12b0ebf>;
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale security engine (crypto accelerator) binding from
text form to YAML. The list of compatible strings reflects what was
previously described in prose; not all combinations occur in existing
devicetrees.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- several improvements suggested by Rob Herring:
- remove unnecessary multiline markers
- constrain fsl,num-channels to enum: [1,4]
- constrain fsl,channel-fifo-len to plausible limits
- constrain fsl,exec-units-mask to maximum=0xfff
- trim subject line (remove "binding")
---
.../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
.../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
2 files changed, 142 insertions(+), 65 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net.
+
+properties:
+ compatible:
+ description:
+ Should contain entries for this and backward compatible SEC versions,
+ high to low. Warning - SEC1 and SEC2 are mutually exclusive.
+ oneOf:
+ - items:
+ - const: fsl,sec3.3
+ - const: fsl,sec3.1
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec3.1
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec1.2
+ - const: fsl,sec1.0
+ - items:
+ - const: fsl,sec1.0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,num-channels:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 4 ]
+ description: An integer representing the number of channels available.
+
+ fsl,channel-fifo-len:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 100
+ description:
+ An integer representing the number of descriptor pointers each channel
+ fetch fifo can hold.
+
+ fsl,exec-units-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 0xfff
+ description: |
+ The bitmask representing what execution units (EUs) are available.
+ EU information should be encoded following the SEC's Descriptor Header
+ Dword EU_SEL0 field documentation, i.e. as follows:
+
+ bit 0 = reserved - should be 0
+ bit 1 = set if SEC has the ARC4 EU (AFEU)
+ bit 2 = set if SEC has the DES/3DES EU (DEU)
+ bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
+ bit 4 = set if SEC has the random number generator EU (RNG)
+ bit 5 = set if SEC has the public key EU (PKEU)
+ bit 6 = set if SEC has the AES EU (AESU)
+ bit 7 = set if SEC has the Kasumi EU (KEU)
+ bit 8 = set if SEC has the CRC EU (CRCU)
+ bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
+
+ remaining bits are reserved for future SEC EUs.
+
+ fsl,descriptor-types-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The bitmask representing what descriptors are available. Descriptor type
+ information should be encoded following the SEC's Descriptor Header Dword
+ DESC_TYPE field documentation, i.e. as follows:
+
+ bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
+ bit 1 = set if SEC supports the ipsec_esp descriptor type
+ bit 2 = set if SEC supports the common_nonsnoop desc. type
+ bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
+ bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
+ bit 5 = set if SEC supports the srtp descriptor type
+ bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
+ bit 7 = set if SEC supports the pkeu_assemble descriptor type
+ bit 8 = set if SEC supports the aesu_key_expand_output desc.type
+ bit 9 = set if SEC supports the pkeu_ptmul descriptor type
+ bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
+ bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
+
+ ..and so on and so forth.
+
+required:
+ - compatible
+ - reg
+ - fsl,num-channels
+ - fsl,channel-fifo-len
+ - fsl,exec-units-mask
+ - fsl,descriptor-types-mask
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ /* MPC8548E */
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <29 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
deleted file mode 100644
index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
-
-Required properties:
-
-- compatible : Should contain entries for this and backward compatible
- SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
- e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
- warning: SEC1 and SEC2 are mutually exclusive
-- reg : Offset and length of the register set for the device
-- interrupts : the SEC's interrupt number
-- fsl,num-channels : An integer representing the number of channels
- available.
-- fsl,channel-fifo-len : An integer representing the number of
- descriptor pointers each channel fetch fifo can hold.
-- fsl,exec-units-mask : The bitmask representing what execution units
- (EUs) are available. It's a single 32-bit cell. EU information
- should be encoded following the SEC's Descriptor Header Dword
- EU_SEL0 field documentation, i.e. as follows:
-
- bit 0 = reserved - should be 0
- bit 1 = set if SEC has the ARC4 EU (AFEU)
- bit 2 = set if SEC has the DES/3DES EU (DEU)
- bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
- bit 4 = set if SEC has the random number generator EU (RNG)
- bit 5 = set if SEC has the public key EU (PKEU)
- bit 6 = set if SEC has the AES EU (AESU)
- bit 7 = set if SEC has the Kasumi EU (KEU)
- bit 8 = set if SEC has the CRC EU (CRCU)
- bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
-
-remaining bits are reserved for future SEC EUs.
-
-- fsl,descriptor-types-mask : The bitmask representing what descriptors
- are available. It's a single 32-bit cell. Descriptor type information
- should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
- field documentation, i.e. as follows:
-
- bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
- bit 1 = set if SEC supports the ipsec_esp descriptor type
- bit 2 = set if SEC supports the common_nonsnoop desc. type
- bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
- bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
- bit 5 = set if SEC supports the srtp descriptor type
- bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
- bit 7 = set if SEC supports the pkeu_assemble descriptor type
- bit 8 = set if SEC supports the aesu_key_expand_output desc.type
- bit 9 = set if SEC supports the pkeu_ptmul descriptor type
- bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
- bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
-
- ..and so on and so forth.
-
-Example:
-
- /* MPC8548E */
- crypto@30000 {
- compatible = "fsl,sec2.1", "fsl,sec2.0";
- reg = <0x30000 0x10000>;
- interrupts = <29 2>;
- interrupt-parent = <&mpic>;
- fsl,num-channels = <4>;
- fsl,channel-fifo-len = <24>;
- fsl,exec-units-mask = <0xfe>;
- fsl,descriptor-types-mask = <0x12b0ebf>;
- };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale security engine (crypto accelerator) binding from
text form to YAML. The list of compatible strings reflects what was
previously described in prose; not all combinations occur in existing
devicetrees.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- several improvements suggested by Rob Herring:
- remove unnecessary multiline markers
- constrain fsl,num-channels to enum: [1,4]
- constrain fsl,channel-fifo-len to plausible limits
- constrain fsl,exec-units-mask to maximum=0xfff
- trim subject line (remove "binding")
---
.../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
.../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
2 files changed, 142 insertions(+), 65 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
@@ -0,0 +1,142 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net.
+
+properties:
+ compatible:
+ description:
+ Should contain entries for this and backward compatible SEC versions,
+ high to low. Warning - SEC1 and SEC2 are mutually exclusive.
+ oneOf:
+ - items:
+ - const: fsl,sec3.3
+ - const: fsl,sec3.1
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec3.1
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec3.0
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.4
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.2
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.1
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec2.0
+ - items:
+ - const: fsl,sec1.2
+ - const: fsl,sec1.0
+ - items:
+ - const: fsl,sec1.0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,num-channels:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 4 ]
+ description: An integer representing the number of channels available.
+
+ fsl,channel-fifo-len:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 100
+ description:
+ An integer representing the number of descriptor pointers each channel
+ fetch fifo can hold.
+
+ fsl,exec-units-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 0xfff
+ description: |
+ The bitmask representing what execution units (EUs) are available.
+ EU information should be encoded following the SEC's Descriptor Header
+ Dword EU_SEL0 field documentation, i.e. as follows:
+
+ bit 0 = reserved - should be 0
+ bit 1 = set if SEC has the ARC4 EU (AFEU)
+ bit 2 = set if SEC has the DES/3DES EU (DEU)
+ bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
+ bit 4 = set if SEC has the random number generator EU (RNG)
+ bit 5 = set if SEC has the public key EU (PKEU)
+ bit 6 = set if SEC has the AES EU (AESU)
+ bit 7 = set if SEC has the Kasumi EU (KEU)
+ bit 8 = set if SEC has the CRC EU (CRCU)
+ bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
+
+ remaining bits are reserved for future SEC EUs.
+
+ fsl,descriptor-types-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ The bitmask representing what descriptors are available. Descriptor type
+ information should be encoded following the SEC's Descriptor Header Dword
+ DESC_TYPE field documentation, i.e. as follows:
+
+ bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
+ bit 1 = set if SEC supports the ipsec_esp descriptor type
+ bit 2 = set if SEC supports the common_nonsnoop desc. type
+ bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
+ bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
+ bit 5 = set if SEC supports the srtp descriptor type
+ bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
+ bit 7 = set if SEC supports the pkeu_assemble descriptor type
+ bit 8 = set if SEC supports the aesu_key_expand_output desc.type
+ bit 9 = set if SEC supports the pkeu_ptmul descriptor type
+ bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
+ bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
+
+ ..and so on and so forth.
+
+required:
+ - compatible
+ - reg
+ - fsl,num-channels
+ - fsl,channel-fifo-len
+ - fsl,exec-units-mask
+ - fsl,descriptor-types-mask
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ /* MPC8548E */
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <29 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
deleted file mode 100644
index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
-
-Required properties:
-
-- compatible : Should contain entries for this and backward compatible
- SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
- e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
- warning: SEC1 and SEC2 are mutually exclusive
-- reg : Offset and length of the register set for the device
-- interrupts : the SEC's interrupt number
-- fsl,num-channels : An integer representing the number of channels
- available.
-- fsl,channel-fifo-len : An integer representing the number of
- descriptor pointers each channel fetch fifo can hold.
-- fsl,exec-units-mask : The bitmask representing what execution units
- (EUs) are available. It's a single 32-bit cell. EU information
- should be encoded following the SEC's Descriptor Header Dword
- EU_SEL0 field documentation, i.e. as follows:
-
- bit 0 = reserved - should be 0
- bit 1 = set if SEC has the ARC4 EU (AFEU)
- bit 2 = set if SEC has the DES/3DES EU (DEU)
- bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
- bit 4 = set if SEC has the random number generator EU (RNG)
- bit 5 = set if SEC has the public key EU (PKEU)
- bit 6 = set if SEC has the AES EU (AESU)
- bit 7 = set if SEC has the Kasumi EU (KEU)
- bit 8 = set if SEC has the CRC EU (CRCU)
- bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
-
-remaining bits are reserved for future SEC EUs.
-
-- fsl,descriptor-types-mask : The bitmask representing what descriptors
- are available. It's a single 32-bit cell. Descriptor type information
- should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
- field documentation, i.e. as follows:
-
- bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
- bit 1 = set if SEC supports the ipsec_esp descriptor type
- bit 2 = set if SEC supports the common_nonsnoop desc. type
- bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
- bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
- bit 5 = set if SEC supports the srtp descriptor type
- bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
- bit 7 = set if SEC supports the pkeu_assemble descriptor type
- bit 8 = set if SEC supports the aesu_key_expand_output desc.type
- bit 9 = set if SEC supports the pkeu_ptmul descriptor type
- bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
- bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
-
- ..and so on and so forth.
-
-Example:
-
- /* MPC8548E */
- crypto@30000 {
- compatible = "fsl,sec2.1", "fsl,sec2.0";
- reg = <0x30000 0x10000>;
- interrupts = <29 2>;
- interrupt-parent = <&mpic>;
- fsl,num-channels = <4>;
- fsl,channel-fifo-len = <24>;
- fsl,exec-units-mask = <0xfe>;
- fsl,descriptor-types-mask = <0x12b0ebf>;
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAMLy
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-10 19:30 ` Frank Li
-1 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:30 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:20PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale security engine (crypto accelerator) binding from
> text form to YAML. The list of compatible strings reflects what was
> previously described in prose; not all combinations occur in existing
> devicetrees.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>
> V2:
> - several improvements suggested by Rob Herring:
> - remove unnecessary multiline markers
> - constrain fsl,num-channels to enum: [1,4]
> - constrain fsl,channel-fifo-len to plausible limits
> - constrain fsl,exec-units-mask to maximum=0xfff
> - trim subject line (remove "binding")
> ---
> .../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
> .../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
> 2 files changed, 142 insertions(+), 65 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net.
> +
> +properties:
> + compatible:
> + description:
> + Should contain entries for this and backward compatible SEC versions,
> + high to low. Warning - SEC1 and SEC2 are mutually exclusive.
> + oneOf:
> + - items:
> + - const: fsl,sec3.3
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec1.2
> + - const: fsl,sec1.0
> + - items:
> + - const: fsl,sec1.0
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,num-channels:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: An integer representing the number of channels available.
> +
> + fsl,channel-fifo-len:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 100
> + description:
> + An integer representing the number of descriptor pointers each channel
> + fetch fifo can hold.
> +
> + fsl,exec-units-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 0xfff
> + description: |
> + The bitmask representing what execution units (EUs) are available.
> + EU information should be encoded following the SEC's Descriptor Header
> + Dword EU_SEL0 field documentation, i.e. as follows:
> +
> + bit 0 = reserved - should be 0
> + bit 1 = set if SEC has the ARC4 EU (AFEU)
> + bit 2 = set if SEC has the DES/3DES EU (DEU)
> + bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> + bit 4 = set if SEC has the random number generator EU (RNG)
> + bit 5 = set if SEC has the public key EU (PKEU)
> + bit 6 = set if SEC has the AES EU (AESU)
> + bit 7 = set if SEC has the Kasumi EU (KEU)
> + bit 8 = set if SEC has the CRC EU (CRCU)
> + bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> +
> + remaining bits are reserved for future SEC EUs.
> +
> + fsl,descriptor-types-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The bitmask representing what descriptors are available. Descriptor type
> + information should be encoded following the SEC's Descriptor Header Dword
> + DESC_TYPE field documentation, i.e. as follows:
> +
> + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> + bit 1 = set if SEC supports the ipsec_esp descriptor type
> + bit 2 = set if SEC supports the common_nonsnoop desc. type
> + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> + bit 5 = set if SEC supports the srtp descriptor type
> + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> + bit 7 = set if SEC supports the pkeu_assemble descriptor type
> + bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> + bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
> +
> + ..and so on and so forth.
> +
> +required:
> + - compatible
> + - reg
> + - fsl,num-channels
> + - fsl,channel-fifo-len
> + - fsl,exec-units-mask
> + - fsl,descriptor-types-mask
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + /* MPC8548E */
> + crypto@30000 {
> + compatible = "fsl,sec2.1", "fsl,sec2.0";
> + reg = <0x30000 0x10000>;
> + interrupts = <29 2>;
> + interrupt-parent = <&mpic>;
> + fsl,num-channels = <4>;
> + fsl,channel-fifo-len = <24>;
> + fsl,exec-units-mask = <0xfe>;
> + fsl,descriptor-types-mask = <0x12b0ebf>;
> + };
> diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> deleted file mode 100644
> index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> +++ /dev/null
> @@ -1,65 +0,0 @@
> -Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> -
> -Required properties:
> -
> -- compatible : Should contain entries for this and backward compatible
> - SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
> - e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
> - warning: SEC1 and SEC2 are mutually exclusive
> -- reg : Offset and length of the register set for the device
> -- interrupts : the SEC's interrupt number
> -- fsl,num-channels : An integer representing the number of channels
> - available.
> -- fsl,channel-fifo-len : An integer representing the number of
> - descriptor pointers each channel fetch fifo can hold.
> -- fsl,exec-units-mask : The bitmask representing what execution units
> - (EUs) are available. It's a single 32-bit cell. EU information
> - should be encoded following the SEC's Descriptor Header Dword
> - EU_SEL0 field documentation, i.e. as follows:
> -
> - bit 0 = reserved - should be 0
> - bit 1 = set if SEC has the ARC4 EU (AFEU)
> - bit 2 = set if SEC has the DES/3DES EU (DEU)
> - bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> - bit 4 = set if SEC has the random number generator EU (RNG)
> - bit 5 = set if SEC has the public key EU (PKEU)
> - bit 6 = set if SEC has the AES EU (AESU)
> - bit 7 = set if SEC has the Kasumi EU (KEU)
> - bit 8 = set if SEC has the CRC EU (CRCU)
> - bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> -
> -remaining bits are reserved for future SEC EUs.
> -
> -- fsl,descriptor-types-mask : The bitmask representing what descriptors
> - are available. It's a single 32-bit cell. Descriptor type information
> - should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
> - field documentation, i.e. as follows:
> -
> - bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> - bit 1 = set if SEC supports the ipsec_esp descriptor type
> - bit 2 = set if SEC supports the common_nonsnoop desc. type
> - bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> - bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> - bit 5 = set if SEC supports the srtp descriptor type
> - bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> - bit 7 = set if SEC supports the pkeu_assemble descriptor type
> - bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> - bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> - bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> - bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
> -
> - ..and so on and so forth.
> -
> -Example:
> -
> - /* MPC8548E */
> - crypto@30000 {
> - compatible = "fsl,sec2.1", "fsl,sec2.0";
> - reg = <0x30000 0x10000>;
> - interrupts = <29 2>;
> - interrupt-parent = <&mpic>;
> - fsl,num-channels = <4>;
> - fsl,channel-fifo-len = <24>;
> - fsl,exec-units-mask = <0xfe>;
> - fsl,descriptor-types-mask = <0x12b0ebf>;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAMLy
@ 2025-02-10 19:30 ` Frank Li
0 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:30 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:20PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale security engine (crypto accelerator) binding from
> text form to YAML. The list of compatible strings reflects what was
> previously described in prose; not all combinations occur in existing
> devicetrees.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>
> V2:
> - several improvements suggested by Rob Herring:
> - remove unnecessary multiline markers
> - constrain fsl,num-channels to enum: [1,4]
> - constrain fsl,channel-fifo-len to plausible limits
> - constrain fsl,exec-units-mask to maximum=0xfff
> - trim subject line (remove "binding")
> ---
> .../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
> .../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
> 2 files changed, 142 insertions(+), 65 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net.
> +
> +properties:
> + compatible:
> + description:
> + Should contain entries for this and backward compatible SEC versions,
> + high to low. Warning - SEC1 and SEC2 are mutually exclusive.
> + oneOf:
> + - items:
> + - const: fsl,sec3.3
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec1.2
> + - const: fsl,sec1.0
> + - items:
> + - const: fsl,sec1.0
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,num-channels:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: An integer representing the number of channels available.
> +
> + fsl,channel-fifo-len:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 100
> + description:
> + An integer representing the number of descriptor pointers each channel
> + fetch fifo can hold.
> +
> + fsl,exec-units-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 0xfff
> + description: |
> + The bitmask representing what execution units (EUs) are available.
> + EU information should be encoded following the SEC's Descriptor Header
> + Dword EU_SEL0 field documentation, i.e. as follows:
> +
> + bit 0 = reserved - should be 0
> + bit 1 = set if SEC has the ARC4 EU (AFEU)
> + bit 2 = set if SEC has the DES/3DES EU (DEU)
> + bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> + bit 4 = set if SEC has the random number generator EU (RNG)
> + bit 5 = set if SEC has the public key EU (PKEU)
> + bit 6 = set if SEC has the AES EU (AESU)
> + bit 7 = set if SEC has the Kasumi EU (KEU)
> + bit 8 = set if SEC has the CRC EU (CRCU)
> + bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> +
> + remaining bits are reserved for future SEC EUs.
> +
> + fsl,descriptor-types-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The bitmask representing what descriptors are available. Descriptor type
> + information should be encoded following the SEC's Descriptor Header Dword
> + DESC_TYPE field documentation, i.e. as follows:
> +
> + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> + bit 1 = set if SEC supports the ipsec_esp descriptor type
> + bit 2 = set if SEC supports the common_nonsnoop desc. type
> + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> + bit 5 = set if SEC supports the srtp descriptor type
> + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> + bit 7 = set if SEC supports the pkeu_assemble descriptor type
> + bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> + bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
> +
> + ..and so on and so forth.
> +
> +required:
> + - compatible
> + - reg
> + - fsl,num-channels
> + - fsl,channel-fifo-len
> + - fsl,exec-units-mask
> + - fsl,descriptor-types-mask
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + /* MPC8548E */
> + crypto@30000 {
> + compatible = "fsl,sec2.1", "fsl,sec2.0";
> + reg = <0x30000 0x10000>;
> + interrupts = <29 2>;
> + interrupt-parent = <&mpic>;
> + fsl,num-channels = <4>;
> + fsl,channel-fifo-len = <24>;
> + fsl,exec-units-mask = <0xfe>;
> + fsl,descriptor-types-mask = <0x12b0ebf>;
> + };
> diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> deleted file mode 100644
> index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> +++ /dev/null
> @@ -1,65 +0,0 @@
> -Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> -
> -Required properties:
> -
> -- compatible : Should contain entries for this and backward compatible
> - SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
> - e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
> - warning: SEC1 and SEC2 are mutually exclusive
> -- reg : Offset and length of the register set for the device
> -- interrupts : the SEC's interrupt number
> -- fsl,num-channels : An integer representing the number of channels
> - available.
> -- fsl,channel-fifo-len : An integer representing the number of
> - descriptor pointers each channel fetch fifo can hold.
> -- fsl,exec-units-mask : The bitmask representing what execution units
> - (EUs) are available. It's a single 32-bit cell. EU information
> - should be encoded following the SEC's Descriptor Header Dword
> - EU_SEL0 field documentation, i.e. as follows:
> -
> - bit 0 = reserved - should be 0
> - bit 1 = set if SEC has the ARC4 EU (AFEU)
> - bit 2 = set if SEC has the DES/3DES EU (DEU)
> - bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> - bit 4 = set if SEC has the random number generator EU (RNG)
> - bit 5 = set if SEC has the public key EU (PKEU)
> - bit 6 = set if SEC has the AES EU (AESU)
> - bit 7 = set if SEC has the Kasumi EU (KEU)
> - bit 8 = set if SEC has the CRC EU (CRCU)
> - bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> -
> -remaining bits are reserved for future SEC EUs.
> -
> -- fsl,descriptor-types-mask : The bitmask representing what descriptors
> - are available. It's a single 32-bit cell. Descriptor type information
> - should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
> - field documentation, i.e. as follows:
> -
> - bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> - bit 1 = set if SEC supports the ipsec_esp descriptor type
> - bit 2 = set if SEC supports the common_nonsnoop desc. type
> - bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> - bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> - bit 5 = set if SEC supports the srtp descriptor type
> - bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> - bit 7 = set if SEC supports the pkeu_assemble descriptor type
> - bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> - bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> - bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> - bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
> -
> - ..and so on and so forth.
> -
> -Example:
> -
> - /* MPC8548E */
> - crypto@30000 {
> - compatible = "fsl,sec2.1", "fsl,sec2.0";
> - reg = <0x30000 0x10000>;
> - interrupts = <29 2>;
> - interrupt-parent = <&mpic>;
> - fsl,num-channels = <4>;
> - fsl,channel-fifo-len = <24>;
> - fsl,exec-units-mask = <0xfe>;
> - fsl,descriptor-types-mask = <0x12b0ebf>;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-12 19:33 ` Rob Herring
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-12 19:33 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:20PM +0100, J. Neuschäfer wrote:
> Convert the Freescale security engine (crypto accelerator) binding from
> text form to YAML. The list of compatible strings reflects what was
> previously described in prose; not all combinations occur in existing
> devicetrees.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - several improvements suggested by Rob Herring:
> - remove unnecessary multiline markers
> - constrain fsl,num-channels to enum: [1,4]
> - constrain fsl,channel-fifo-len to plausible limits
> - constrain fsl,exec-units-mask to maximum=0xfff
> - trim subject line (remove "binding")
> ---
> .../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
> .../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
> 2 files changed, 142 insertions(+), 65 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net.
missing >
> +
> +properties:
> + compatible:
> + description:
> + Should contain entries for this and backward compatible SEC versions,
> + high to low. Warning - SEC1 and SEC2 are mutually exclusive.
> + oneOf:
> + - items:
> + - const: fsl,sec3.3
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec1.2
> + - const: fsl,sec1.0
> + - items:
> + - const: fsl,sec1.0
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,num-channels:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: An integer representing the number of channels available.
> +
> + fsl,channel-fifo-len:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 100
> + description:
> + An integer representing the number of descriptor pointers each channel
> + fetch fifo can hold.
> +
> + fsl,exec-units-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 0xfff
> + description: |
> + The bitmask representing what execution units (EUs) are available.
> + EU information should be encoded following the SEC's Descriptor Header
> + Dword EU_SEL0 field documentation, i.e. as follows:
> +
> + bit 0 = reserved - should be 0
> + bit 1 = set if SEC has the ARC4 EU (AFEU)
> + bit 2 = set if SEC has the DES/3DES EU (DEU)
> + bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> + bit 4 = set if SEC has the random number generator EU (RNG)
> + bit 5 = set if SEC has the public key EU (PKEU)
> + bit 6 = set if SEC has the AES EU (AESU)
> + bit 7 = set if SEC has the Kasumi EU (KEU)
> + bit 8 = set if SEC has the CRC EU (CRCU)
> + bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> +
> + remaining bits are reserved for future SEC EUs.
> +
> + fsl,descriptor-types-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The bitmask representing what descriptors are available. Descriptor type
> + information should be encoded following the SEC's Descriptor Header Dword
> + DESC_TYPE field documentation, i.e. as follows:
> +
> + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> + bit 1 = set if SEC supports the ipsec_esp descriptor type
> + bit 2 = set if SEC supports the common_nonsnoop desc. type
> + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> + bit 5 = set if SEC supports the srtp descriptor type
> + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> + bit 7 = set if SEC supports the pkeu_assemble descriptor type
> + bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> + bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
Why 3 variations of 'descriptor type'?
> +
> + ..and so on and so forth.
> +
> +required:
> + - compatible
> + - reg
> + - fsl,num-channels
> + - fsl,channel-fifo-len
> + - fsl,exec-units-mask
> + - fsl,descriptor-types-mask
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + /* MPC8548E */
> + crypto@30000 {
> + compatible = "fsl,sec2.1", "fsl,sec2.0";
> + reg = <0x30000 0x10000>;
> + interrupts = <29 2>;
> + interrupt-parent = <&mpic>;
> + fsl,num-channels = <4>;
> + fsl,channel-fifo-len = <24>;
> + fsl,exec-units-mask = <0xfe>;
> + fsl,descriptor-types-mask = <0x12b0ebf>;
> + };
> diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> deleted file mode 100644
> index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> +++ /dev/null
> @@ -1,65 +0,0 @@
> -Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> -
> -Required properties:
> -
> -- compatible : Should contain entries for this and backward compatible
> - SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
> - e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
> - warning: SEC1 and SEC2 are mutually exclusive
> -- reg : Offset and length of the register set for the device
> -- interrupts : the SEC's interrupt number
> -- fsl,num-channels : An integer representing the number of channels
> - available.
> -- fsl,channel-fifo-len : An integer representing the number of
> - descriptor pointers each channel fetch fifo can hold.
> -- fsl,exec-units-mask : The bitmask representing what execution units
> - (EUs) are available. It's a single 32-bit cell. EU information
> - should be encoded following the SEC's Descriptor Header Dword
> - EU_SEL0 field documentation, i.e. as follows:
> -
> - bit 0 = reserved - should be 0
> - bit 1 = set if SEC has the ARC4 EU (AFEU)
> - bit 2 = set if SEC has the DES/3DES EU (DEU)
> - bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> - bit 4 = set if SEC has the random number generator EU (RNG)
> - bit 5 = set if SEC has the public key EU (PKEU)
> - bit 6 = set if SEC has the AES EU (AESU)
> - bit 7 = set if SEC has the Kasumi EU (KEU)
> - bit 8 = set if SEC has the CRC EU (CRCU)
> - bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> -
> -remaining bits are reserved for future SEC EUs.
> -
> -- fsl,descriptor-types-mask : The bitmask representing what descriptors
> - are available. It's a single 32-bit cell. Descriptor type information
> - should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
> - field documentation, i.e. as follows:
> -
> - bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> - bit 1 = set if SEC supports the ipsec_esp descriptor type
> - bit 2 = set if SEC supports the common_nonsnoop desc. type
> - bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> - bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> - bit 5 = set if SEC supports the srtp descriptor type
> - bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> - bit 7 = set if SEC supports the pkeu_assemble descriptor type
> - bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> - bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> - bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> - bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
> -
> - ..and so on and so forth.
> -
> -Example:
> -
> - /* MPC8548E */
> - crypto@30000 {
> - compatible = "fsl,sec2.1", "fsl,sec2.0";
> - reg = <0x30000 0x10000>;
> - interrupts = <29 2>;
> - interrupt-parent = <&mpic>;
> - fsl,num-channels = <4>;
> - fsl,channel-fifo-len = <24>;
> - fsl,exec-units-mask = <0xfe>;
> - fsl,descriptor-types-mask = <0x12b0ebf>;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
@ 2025-02-12 19:33 ` Rob Herring
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-12 19:33 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:20PM +0100, J. Neuschäfer wrote:
> Convert the Freescale security engine (crypto accelerator) binding from
> text form to YAML. The list of compatible strings reflects what was
> previously described in prose; not all combinations occur in existing
> devicetrees.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - several improvements suggested by Rob Herring:
> - remove unnecessary multiline markers
> - constrain fsl,num-channels to enum: [1,4]
> - constrain fsl,channel-fifo-len to plausible limits
> - constrain fsl,exec-units-mask to maximum=0xfff
> - trim subject line (remove "binding")
> ---
> .../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
> .../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
> 2 files changed, 142 insertions(+), 65 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..0b82f3b68b5f82e7fb52d292a623d452c1cdb059
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/fsl,sec2.0.yaml
> @@ -0,0 +1,142 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net.
missing >
> +
> +properties:
> + compatible:
> + description:
> + Should contain entries for this and backward compatible SEC versions,
> + high to low. Warning - SEC1 and SEC2 are mutually exclusive.
> + oneOf:
> + - items:
> + - const: fsl,sec3.3
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.1
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec3.0
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.4
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.2
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.1
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec2.0
> + - items:
> + - const: fsl,sec1.2
> + - const: fsl,sec1.0
> + - items:
> + - const: fsl,sec1.0
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,num-channels:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: An integer representing the number of channels available.
> +
> + fsl,channel-fifo-len:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 100
> + description:
> + An integer representing the number of descriptor pointers each channel
> + fetch fifo can hold.
> +
> + fsl,exec-units-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 0xfff
> + description: |
> + The bitmask representing what execution units (EUs) are available.
> + EU information should be encoded following the SEC's Descriptor Header
> + Dword EU_SEL0 field documentation, i.e. as follows:
> +
> + bit 0 = reserved - should be 0
> + bit 1 = set if SEC has the ARC4 EU (AFEU)
> + bit 2 = set if SEC has the DES/3DES EU (DEU)
> + bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> + bit 4 = set if SEC has the random number generator EU (RNG)
> + bit 5 = set if SEC has the public key EU (PKEU)
> + bit 6 = set if SEC has the AES EU (AESU)
> + bit 7 = set if SEC has the Kasumi EU (KEU)
> + bit 8 = set if SEC has the CRC EU (CRCU)
> + bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> +
> + remaining bits are reserved for future SEC EUs.
> +
> + fsl,descriptor-types-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + The bitmask representing what descriptors are available. Descriptor type
> + information should be encoded following the SEC's Descriptor Header Dword
> + DESC_TYPE field documentation, i.e. as follows:
> +
> + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> + bit 1 = set if SEC supports the ipsec_esp descriptor type
> + bit 2 = set if SEC supports the common_nonsnoop desc. type
> + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> + bit 5 = set if SEC supports the srtp descriptor type
> + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> + bit 7 = set if SEC supports the pkeu_assemble descriptor type
> + bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> + bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
Why 3 variations of 'descriptor type'?
> +
> + ..and so on and so forth.
> +
> +required:
> + - compatible
> + - reg
> + - fsl,num-channels
> + - fsl,channel-fifo-len
> + - fsl,exec-units-mask
> + - fsl,descriptor-types-mask
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + /* MPC8548E */
> + crypto@30000 {
> + compatible = "fsl,sec2.1", "fsl,sec2.0";
> + reg = <0x30000 0x10000>;
> + interrupts = <29 2>;
> + interrupt-parent = <&mpic>;
> + fsl,num-channels = <4>;
> + fsl,channel-fifo-len = <24>;
> + fsl,exec-units-mask = <0xfe>;
> + fsl,descriptor-types-mask = <0x12b0ebf>;
> + };
> diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt b/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> deleted file mode 100644
> index 125f155d00d052eec7d5093b5c5076cbe720417f..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/crypto/fsl-sec2.txt
> +++ /dev/null
> @@ -1,65 +0,0 @@
> -Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> -
> -Required properties:
> -
> -- compatible : Should contain entries for this and backward compatible
> - SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
> - e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
> - warning: SEC1 and SEC2 are mutually exclusive
> -- reg : Offset and length of the register set for the device
> -- interrupts : the SEC's interrupt number
> -- fsl,num-channels : An integer representing the number of channels
> - available.
> -- fsl,channel-fifo-len : An integer representing the number of
> - descriptor pointers each channel fetch fifo can hold.
> -- fsl,exec-units-mask : The bitmask representing what execution units
> - (EUs) are available. It's a single 32-bit cell. EU information
> - should be encoded following the SEC's Descriptor Header Dword
> - EU_SEL0 field documentation, i.e. as follows:
> -
> - bit 0 = reserved - should be 0
> - bit 1 = set if SEC has the ARC4 EU (AFEU)
> - bit 2 = set if SEC has the DES/3DES EU (DEU)
> - bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
> - bit 4 = set if SEC has the random number generator EU (RNG)
> - bit 5 = set if SEC has the public key EU (PKEU)
> - bit 6 = set if SEC has the AES EU (AESU)
> - bit 7 = set if SEC has the Kasumi EU (KEU)
> - bit 8 = set if SEC has the CRC EU (CRCU)
> - bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
> -
> -remaining bits are reserved for future SEC EUs.
> -
> -- fsl,descriptor-types-mask : The bitmask representing what descriptors
> - are available. It's a single 32-bit cell. Descriptor type information
> - should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
> - field documentation, i.e. as follows:
> -
> - bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> - bit 1 = set if SEC supports the ipsec_esp descriptor type
> - bit 2 = set if SEC supports the common_nonsnoop desc. type
> - bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> - bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> - bit 5 = set if SEC supports the srtp descriptor type
> - bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> - bit 7 = set if SEC supports the pkeu_assemble descriptor type
> - bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> - bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> - bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> - bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
> -
> - ..and so on and so forth.
> -
> -Example:
> -
> - /* MPC8548E */
> - crypto@30000 {
> - compatible = "fsl,sec2.1", "fsl,sec2.0";
> - reg = <0x30000 0x10000>;
> - interrupts = <29 2>;
> - interrupt-parent = <&mpic>;
> - fsl,num-channels = <4>;
> - fsl,channel-fifo-len = <24>;
> - fsl,exec-units-mask = <0xfe>;
> - fsl,descriptor-types-mask = <0x12b0ebf>;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
2025-02-12 19:33 ` Rob Herring
@ 2025-02-14 2:04 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-14 2:04 UTC (permalink / raw)
To: Rob Herring
Cc: J. Neuschäfer, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Wed, Feb 12, 2025 at 01:33:14PM -0600, Rob Herring wrote:
> On Fri, Feb 07, 2025 at 10:30:20PM +0100, J. Neuschäfer wrote:
> > Convert the Freescale security engine (crypto accelerator) binding from
> > text form to YAML. The list of compatible strings reflects what was
> > previously described in prose; not all combinations occur in existing
> > devicetrees.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - several improvements suggested by Rob Herring:
> > - remove unnecessary multiline markers
> > - constrain fsl,num-channels to enum: [1,4]
> > - constrain fsl,channel-fifo-len to plausible limits
> > - constrain fsl,exec-units-mask to maximum=0xfff
> > - trim subject line (remove "binding")
> > ---
> > .../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
> > .../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
> > 2 files changed, 142 insertions(+), 65 deletions(-)
[...]
> > +title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> > +
> > +maintainers:
> > + - J. Neuschäfer <j.ne@posteo.net.
>
> missing >
Good catch, will fix.
> > + fsl,descriptor-types-mask:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: |
> > + The bitmask representing what descriptors are available. Descriptor type
> > + information should be encoded following the SEC's Descriptor Header Dword
> > + DESC_TYPE field documentation, i.e. as follows:
> > +
> > + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> > + bit 1 = set if SEC supports the ipsec_esp descriptor type
> > + bit 2 = set if SEC supports the common_nonsnoop desc. type
> > + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> > + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> > + bit 5 = set if SEC supports the srtp descriptor type
> > + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> > + bit 7 = set if SEC supports the pkeu_assemble descriptor type
> > + bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> > + bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> > + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> > + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
>
> Why 3 variations of 'descriptor type'?
The reasons have been lost in time, I suppose. I'll normalize the spelling.
Thanks,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
@ 2025-02-14 2:04 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-14 2:04 UTC (permalink / raw)
To: Rob Herring
Cc: J. Neuschäfer, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Wed, Feb 12, 2025 at 01:33:14PM -0600, Rob Herring wrote:
> On Fri, Feb 07, 2025 at 10:30:20PM +0100, J. Neuschäfer wrote:
> > Convert the Freescale security engine (crypto accelerator) binding from
> > text form to YAML. The list of compatible strings reflects what was
> > previously described in prose; not all combinations occur in existing
> > devicetrees.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - several improvements suggested by Rob Herring:
> > - remove unnecessary multiline markers
> > - constrain fsl,num-channels to enum: [1,4]
> > - constrain fsl,channel-fifo-len to plausible limits
> > - constrain fsl,exec-units-mask to maximum=0xfff
> > - trim subject line (remove "binding")
> > ---
> > .../devicetree/bindings/crypto/fsl,sec2.0.yaml | 142 +++++++++++++++++++++
> > .../devicetree/bindings/crypto/fsl-sec2.txt | 65 ----------
> > 2 files changed, 142 insertions(+), 65 deletions(-)
[...]
> > +title: Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
> > +
> > +maintainers:
> > + - J. Neuschäfer <j.ne@posteo.net.
>
> missing >
Good catch, will fix.
> > + fsl,descriptor-types-mask:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: |
> > + The bitmask representing what descriptors are available. Descriptor type
> > + information should be encoded following the SEC's Descriptor Header Dword
> > + DESC_TYPE field documentation, i.e. as follows:
> > +
> > + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
> > + bit 1 = set if SEC supports the ipsec_esp descriptor type
> > + bit 2 = set if SEC supports the common_nonsnoop desc. type
> > + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
> > + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
> > + bit 5 = set if SEC supports the srtp descriptor type
> > + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
> > + bit 7 = set if SEC supports the pkeu_assemble descriptor type
> > + bit 8 = set if SEC supports the aesu_key_expand_output desc.type
> > + bit 9 = set if SEC supports the pkeu_ptmul descriptor type
> > + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
> > + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
>
> Why 3 variations of 'descriptor type'?
The reasons have been lost in time, I suppose. I'll normalize the spelling.
Thanks,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 04/12] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Convert mcu-mpc8349emitx.txt to YAML and list the compatible strings
currently in use.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../bindings/mfd/fsl,mcu-mpc8349emitx.yaml | 53 ++++++++++++++++++++++
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 17 -------
2 files changed, 53 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml b/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..d20de7a4142546c95f65814a3f1b03dd0949cffb
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/fsl,mcu-mpc8349emitx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU)
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mc9s08qg8-mpc8315erdb
+ - fsl,mc9s08qg8-mpc8349emitx
+ - fsl,mc9s08qg8-mpc8377erdb
+ - fsl,mc9s08qg8-mpc8378erdb
+ - fsl,mc9s08qg8-mpc8379erdb
+ - const: fsl,mcu-mpc8349emitx
+
+ reg:
+ maxItems: 1
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-controller: true
+
+required:
+ - compatible
+ - reg
+ - "#gpio-cells"
+ - gpio-controller
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mcu@a {
+ compatible = "fsl,mc9s08qg8-mpc8349emitx",
+ "fsl,mcu-mpc8349emitx";
+ reg = <0x0a>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt b/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
deleted file mode 100644
index 37f91fa576545aa245d893c24248bdbb2c0fcc07..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU)
-
-Required properties:
-- compatible : "fsl,<mcu-chip>-<board>", "fsl,mcu-mpc8349emitx".
-- reg : should specify I2C address (0x0a).
-- #gpio-cells : should be 2.
-- gpio-controller : should be present.
-
-Example:
-
-mcu@a {
- #gpio-cells = <2>;
- compatible = "fsl,mc9s08qg8-mpc8349emitx",
- "fsl,mcu-mpc8349emitx";
- reg = <0x0a>;
- gpio-controller;
-};
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 04/12] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert mcu-mpc8349emitx.txt to YAML and list the compatible strings
currently in use.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../bindings/mfd/fsl,mcu-mpc8349emitx.yaml | 53 ++++++++++++++++++++++
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 17 -------
2 files changed, 53 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml b/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..d20de7a4142546c95f65814a3f1b03dd0949cffb
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/fsl,mcu-mpc8349emitx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU)
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mc9s08qg8-mpc8315erdb
+ - fsl,mc9s08qg8-mpc8349emitx
+ - fsl,mc9s08qg8-mpc8377erdb
+ - fsl,mc9s08qg8-mpc8378erdb
+ - fsl,mc9s08qg8-mpc8379erdb
+ - const: fsl,mcu-mpc8349emitx
+
+ reg:
+ maxItems: 1
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-controller: true
+
+required:
+ - compatible
+ - reg
+ - "#gpio-cells"
+ - gpio-controller
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mcu@a {
+ compatible = "fsl,mc9s08qg8-mpc8349emitx",
+ "fsl,mcu-mpc8349emitx";
+ reg = <0x0a>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt b/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
deleted file mode 100644
index 37f91fa576545aa245d893c24248bdbb2c0fcc07..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU)
-
-Required properties:
-- compatible : "fsl,<mcu-chip>-<board>", "fsl,mcu-mpc8349emitx".
-- reg : should specify I2C address (0x0a).
-- #gpio-cells : should be 2.
-- gpio-controller : should be present.
-
-Example:
-
-mcu@a {
- #gpio-cells = <2>;
- compatible = "fsl,mc9s08qg8-mpc8349emitx",
- "fsl,mcu-mpc8349emitx";
- reg = <0x0a>;
- gpio-controller;
-};
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 04/12] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert mcu-mpc8349emitx.txt to YAML and list the compatible strings
currently in use.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../bindings/mfd/fsl,mcu-mpc8349emitx.yaml | 53 ++++++++++++++++++++++
.../bindings/powerpc/fsl/mcu-mpc8349emitx.txt | 17 -------
2 files changed, 53 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml b/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..d20de7a4142546c95f65814a3f1b03dd0949cffb
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl,mcu-mpc8349emitx.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/fsl,mcu-mpc8349emitx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU)
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mc9s08qg8-mpc8315erdb
+ - fsl,mc9s08qg8-mpc8349emitx
+ - fsl,mc9s08qg8-mpc8377erdb
+ - fsl,mc9s08qg8-mpc8378erdb
+ - fsl,mc9s08qg8-mpc8379erdb
+ - const: fsl,mcu-mpc8349emitx
+
+ reg:
+ maxItems: 1
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-controller: true
+
+required:
+ - compatible
+ - reg
+ - "#gpio-cells"
+ - gpio-controller
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mcu@a {
+ compatible = "fsl,mc9s08qg8-mpc8349emitx",
+ "fsl,mcu-mpc8349emitx";
+ reg = <0x0a>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt b/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
deleted file mode 100644
index 37f91fa576545aa245d893c24248bdbb2c0fcc07..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/mcu-mpc8349emitx.txt
+++ /dev/null
@@ -1,17 +0,0 @@
-Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU)
-
-Required properties:
-- compatible : "fsl,<mcu-chip>-<board>", "fsl,mcu-mpc8349emitx".
-- reg : should specify I2C address (0x0a).
-- #gpio-cells : should be 2.
-- gpio-controller : should be present.
-
-Example:
-
-mcu@a {
- #gpio-cells = <2>;
- compatible = "fsl,mc9s08qg8-mpc8349emitx",
- "fsl,mcu-mpc8349emitx";
- reg = <0x0a>;
- gpio-controller;
-};
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread
* [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
The devicetree bindings for Freescale DMA engines have so far existed as
a text file. This patch converts them to YAML, and specifies all the
compatible strings currently in use in arch/powerpc/boot/dts.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove unnecessary multiline markers
- fix additionalProperties to always be false
- add description/maxItems to interrupts
- add missing #address-cells/#size-cells properties
- convert "Note on DMA channel compatible properties" to YAML by listing
fsl,ssi-dma-channel as a valid compatible value
- fix property ordering in examples: compatible and reg come first
- add missing newlines in examples
- trim subject line (remove "bindings")
---
.../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
.../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
.../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
.../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
4 files changed, 397 insertions(+), 204 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Elo DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
+ series chips such as mpc8315, mpc8349, mpc8379 etc.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,mpc8313-dma
+ - fsl,mpc8315-dma
+ - fsl,mpc8323-dma
+ - fsl,mpc8347-dma
+ - fsl,mpc8349-dma
+ - fsl,mpc8360-dma
+ - fsl,mpc8377-dma
+ - fsl,mpc8378-dma
+ - fsl,mpc8379-dma
+ - const: fsl,elo-dma
+
+ reg:
+ maxItems: 1
+ description:
+ DMA General Status Register, i.e. DGSR which contains status for
+ all the 4 DMA channels.
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Controller index. 0 for controller @ 0x8100.
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+required:
+ - compatible
+ - reg
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ oneOf:
+ # native DMA channel
+ - items:
+ - enum:
+ - fsl,mpc8315-dma-channel
+ - fsl,mpc8323-dma-channel
+ - fsl,mpc8347-dma-channel
+ - fsl,mpc8349-dma-channel
+ - fsl,mpc8360-dma-channel
+ - fsl,mpc8377-dma-channel
+ - fsl,mpc8378-dma-channel
+ - fsl,mpc8379-dma-channel
+ - const: fsl,elo-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - const: fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ description: DMA channel index starts at 0.
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@82a8 {
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x8100 0x1a4>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..36865836b48af78af32d4e11f55a32e32771a23e
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
@@ -0,0 +1,123 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Elo3 DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ DMA controller which has same function as EloPlus except that Elo3 has 8
+ channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
+ series chips, such as t1040, t4240, b4860.
+
+properties:
+ compatible:
+ const: fsl,elo3-dma
+
+ reg:
+ maxItems: 2
+ description:
+ contains two entries for DMA General Status Registers, i.e. DGSR0 which
+ includes status for channel 1~4, and DGSR1 for channel 5~8
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ enum:
+ # native DMA channel
+ - fsl,eloplus-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@100300 {
+ compatible = "fsl,elo3-dma";
+ reg = <0x100300 0x4>,
+ <0x100600 0x4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x100100 0x500>;
+
+ dma-channel@0 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ interrupts = <28 2 0 0>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ interrupts = <29 2 0 0>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ interrupts = <30 2 0 0>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ interrupts = <31 2 0 0>;
+ };
+
+ dma-channel@300 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x300 0x80>;
+ interrupts = <76 2 0 0>;
+ };
+
+ dma-channel@380 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x380 0x80>;
+ interrupts = <77 2 0 0>;
+ };
+
+ dma-channel@400 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x400 0x80>;
+ interrupts = <78 2 0 0>;
+ };
+
+ dma-channel@480 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x480 0x80>;
+ interrupts = <79 2 0 0>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..513fee051657832dc031d32c1f701bf7c3b89daa
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale EloPlus DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ This is a 4-channel DMA controller with extended addresses and chaining,
+ mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
+ mpc8540, mpc8641 p4080, bsc9131 etc.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8540-dma
+ - fsl,mpc8541-dma
+ - fsl,mpc8548-dma
+ - fsl,mpc8555-dma
+ - fsl,mpc8560-dma
+ - fsl,mpc8572-dma
+ - fsl,mpc8641-dma
+ - const: fsl,eloplus-dma
+ - const: fsl,eloplus-dma
+
+ reg:
+ maxItems: 1
+ description:
+ DMA General Status Register, i.e. DGSR which contains
+ status for all the 4 DMA channels
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ oneOf:
+ # native DMA channel
+ - items:
+ - enum:
+ - fsl,mpc8540-dma-channel
+ - fsl,mpc8541-dma-channel
+ - fsl,mpc8548-dma-channel
+ - fsl,mpc8555-dma-channel
+ - fsl,mpc8560-dma-channel
+ - fsl,mpc8572-dma-channel
+ - const: fsl,eloplus-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - const: fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ description: DMA channel index starts at 0.
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@21300 {
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <0x21300 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x21100 0x200>;
+ cell-index = <0>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
deleted file mode 100644
index c11ad5c6db2190bf38c160632d9997122e169945..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ /dev/null
@@ -1,204 +0,0 @@
-* Freescale DMA Controllers
-
-** Freescale Elo DMA Controller
- This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
- series chips such as mpc8315, mpc8349, mpc8379 etc.
-
-Required properties:
-
-- compatible : must include "fsl,elo-dma"
-- reg : DMA General Status Register, i.e. DGSR which contains
- status for all the 4 DMA channels
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-- cell-index : controller index. 0 for controller @ 0x8100
-- interrupts : interrupt specifier for DMA IRQ
-
-- DMA channel nodes:
- - compatible : must include "fsl,elo-dma-channel"
- However, see note below.
- - reg : DMA channel specific registers
- - cell-index : DMA channel index starts at 0.
-
-Optional properties:
- - interrupts : interrupt specifier for DMA channel IRQ
- (on 83xx this is expected to be identical to
- the interrupts property of the parent node)
-
-Example:
- dma@82a8 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
- reg = <0x82a8 4>;
- ranges = <0 0x8100 0x1a4>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <0>;
- reg = <0 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <1>;
- reg = <0x80 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <2>;
- reg = <0x100 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <3>;
- reg = <0x180 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- };
-
-** Freescale EloPlus DMA Controller
- This is a 4-channel DMA controller with extended addresses and chaining,
- mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
- mpc8540, mpc8641 p4080, bsc9131 etc.
-
-Required properties:
-
-- compatible : must include "fsl,eloplus-dma"
-- reg : DMA General Status Register, i.e. DGSR which contains
- status for all the 4 DMA channels
-- cell-index : controller index. 0 for controller @ 0x21000,
- 1 for controller @ 0xc000
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-
-- DMA channel nodes:
- - compatible : must include "fsl,eloplus-dma-channel"
- However, see note below.
- - cell-index : DMA channel index starts at 0.
- - reg : DMA channel specific registers
- - interrupts : interrupt specifier for DMA channel IRQ
-
-Example:
- dma@21300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
- reg = <0x21300 4>;
- ranges = <0 0x21100 0x200>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0 0x80>;
- cell-index = <0>;
- interrupt-parent = <&mpic>;
- interrupts = <20 2>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- cell-index = <1>;
- interrupt-parent = <&mpic>;
- interrupts = <21 2>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- cell-index = <2>;
- interrupt-parent = <&mpic>;
- interrupts = <22 2>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- cell-index = <3>;
- interrupt-parent = <&mpic>;
- interrupts = <23 2>;
- };
- };
-
-** Freescale Elo3 DMA Controller
- DMA controller which has same function as EloPlus except that Elo3 has 8
- channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
- series chips, such as t1040, t4240, b4860.
-
-Required properties:
-
-- compatible : must include "fsl,elo3-dma"
-- reg : contains two entries for DMA General Status Registers,
- i.e. DGSR0 which includes status for channel 1~4, and
- DGSR1 for channel 5~8
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-
-- DMA channel nodes:
- - compatible : must include "fsl,eloplus-dma-channel"
- - reg : DMA channel specific registers
- - interrupts : interrupt specifier for DMA channel IRQ
-
-Example:
-dma@100300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,elo3-dma";
- reg = <0x100300 0x4>,
- <0x100600 0x4>;
- ranges = <0x0 0x100100 0x500>;
- dma-channel@0 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x0 0x80>;
- interrupts = <28 2 0 0>;
- };
- dma-channel@80 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- interrupts = <29 2 0 0>;
- };
- dma-channel@100 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- interrupts = <30 2 0 0>;
- };
- dma-channel@180 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- interrupts = <31 2 0 0>;
- };
- dma-channel@300 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x300 0x80>;
- interrupts = <76 2 0 0>;
- };
- dma-channel@380 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x380 0x80>;
- interrupts = <77 2 0 0>;
- };
- dma-channel@400 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x400 0x80>;
- interrupts = <78 2 0 0>;
- };
- dma-channel@480 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x480 0x80>;
- interrupts = <79 2 0 0>;
- };
-};
-
-Note on DMA channel compatible properties: The compatible property must say
-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
-driver (fsldma). Any DMA channel used by fsldma cannot be used by another
-DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
-channel that should be used for another driver should not use
-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
-example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
-for more information.
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
The devicetree bindings for Freescale DMA engines have so far existed as
a text file. This patch converts them to YAML, and specifies all the
compatible strings currently in use in arch/powerpc/boot/dts.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove unnecessary multiline markers
- fix additionalProperties to always be false
- add description/maxItems to interrupts
- add missing #address-cells/#size-cells properties
- convert "Note on DMA channel compatible properties" to YAML by listing
fsl,ssi-dma-channel as a valid compatible value
- fix property ordering in examples: compatible and reg come first
- add missing newlines in examples
- trim subject line (remove "bindings")
---
.../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
.../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
.../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
.../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
4 files changed, 397 insertions(+), 204 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Elo DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
+ series chips such as mpc8315, mpc8349, mpc8379 etc.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,mpc8313-dma
+ - fsl,mpc8315-dma
+ - fsl,mpc8323-dma
+ - fsl,mpc8347-dma
+ - fsl,mpc8349-dma
+ - fsl,mpc8360-dma
+ - fsl,mpc8377-dma
+ - fsl,mpc8378-dma
+ - fsl,mpc8379-dma
+ - const: fsl,elo-dma
+
+ reg:
+ maxItems: 1
+ description:
+ DMA General Status Register, i.e. DGSR which contains status for
+ all the 4 DMA channels.
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Controller index. 0 for controller @ 0x8100.
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+required:
+ - compatible
+ - reg
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ oneOf:
+ # native DMA channel
+ - items:
+ - enum:
+ - fsl,mpc8315-dma-channel
+ - fsl,mpc8323-dma-channel
+ - fsl,mpc8347-dma-channel
+ - fsl,mpc8349-dma-channel
+ - fsl,mpc8360-dma-channel
+ - fsl,mpc8377-dma-channel
+ - fsl,mpc8378-dma-channel
+ - fsl,mpc8379-dma-channel
+ - const: fsl,elo-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - const: fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ description: DMA channel index starts at 0.
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@82a8 {
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x8100 0x1a4>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..36865836b48af78af32d4e11f55a32e32771a23e
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
@@ -0,0 +1,123 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Elo3 DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ DMA controller which has same function as EloPlus except that Elo3 has 8
+ channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
+ series chips, such as t1040, t4240, b4860.
+
+properties:
+ compatible:
+ const: fsl,elo3-dma
+
+ reg:
+ maxItems: 2
+ description:
+ contains two entries for DMA General Status Registers, i.e. DGSR0 which
+ includes status for channel 1~4, and DGSR1 for channel 5~8
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ enum:
+ # native DMA channel
+ - fsl,eloplus-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@100300 {
+ compatible = "fsl,elo3-dma";
+ reg = <0x100300 0x4>,
+ <0x100600 0x4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x100100 0x500>;
+
+ dma-channel@0 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ interrupts = <28 2 0 0>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ interrupts = <29 2 0 0>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ interrupts = <30 2 0 0>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ interrupts = <31 2 0 0>;
+ };
+
+ dma-channel@300 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x300 0x80>;
+ interrupts = <76 2 0 0>;
+ };
+
+ dma-channel@380 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x380 0x80>;
+ interrupts = <77 2 0 0>;
+ };
+
+ dma-channel@400 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x400 0x80>;
+ interrupts = <78 2 0 0>;
+ };
+
+ dma-channel@480 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x480 0x80>;
+ interrupts = <79 2 0 0>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..513fee051657832dc031d32c1f701bf7c3b89daa
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale EloPlus DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ This is a 4-channel DMA controller with extended addresses and chaining,
+ mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
+ mpc8540, mpc8641 p4080, bsc9131 etc.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8540-dma
+ - fsl,mpc8541-dma
+ - fsl,mpc8548-dma
+ - fsl,mpc8555-dma
+ - fsl,mpc8560-dma
+ - fsl,mpc8572-dma
+ - fsl,mpc8641-dma
+ - const: fsl,eloplus-dma
+ - const: fsl,eloplus-dma
+
+ reg:
+ maxItems: 1
+ description:
+ DMA General Status Register, i.e. DGSR which contains
+ status for all the 4 DMA channels
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ oneOf:
+ # native DMA channel
+ - items:
+ - enum:
+ - fsl,mpc8540-dma-channel
+ - fsl,mpc8541-dma-channel
+ - fsl,mpc8548-dma-channel
+ - fsl,mpc8555-dma-channel
+ - fsl,mpc8560-dma-channel
+ - fsl,mpc8572-dma-channel
+ - const: fsl,eloplus-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - const: fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ description: DMA channel index starts at 0.
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@21300 {
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <0x21300 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x21100 0x200>;
+ cell-index = <0>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
deleted file mode 100644
index c11ad5c6db2190bf38c160632d9997122e169945..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ /dev/null
@@ -1,204 +0,0 @@
-* Freescale DMA Controllers
-
-** Freescale Elo DMA Controller
- This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
- series chips such as mpc8315, mpc8349, mpc8379 etc.
-
-Required properties:
-
-- compatible : must include "fsl,elo-dma"
-- reg : DMA General Status Register, i.e. DGSR which contains
- status for all the 4 DMA channels
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-- cell-index : controller index. 0 for controller @ 0x8100
-- interrupts : interrupt specifier for DMA IRQ
-
-- DMA channel nodes:
- - compatible : must include "fsl,elo-dma-channel"
- However, see note below.
- - reg : DMA channel specific registers
- - cell-index : DMA channel index starts at 0.
-
-Optional properties:
- - interrupts : interrupt specifier for DMA channel IRQ
- (on 83xx this is expected to be identical to
- the interrupts property of the parent node)
-
-Example:
- dma@82a8 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
- reg = <0x82a8 4>;
- ranges = <0 0x8100 0x1a4>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <0>;
- reg = <0 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <1>;
- reg = <0x80 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <2>;
- reg = <0x100 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <3>;
- reg = <0x180 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- };
-
-** Freescale EloPlus DMA Controller
- This is a 4-channel DMA controller with extended addresses and chaining,
- mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
- mpc8540, mpc8641 p4080, bsc9131 etc.
-
-Required properties:
-
-- compatible : must include "fsl,eloplus-dma"
-- reg : DMA General Status Register, i.e. DGSR which contains
- status for all the 4 DMA channels
-- cell-index : controller index. 0 for controller @ 0x21000,
- 1 for controller @ 0xc000
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-
-- DMA channel nodes:
- - compatible : must include "fsl,eloplus-dma-channel"
- However, see note below.
- - cell-index : DMA channel index starts at 0.
- - reg : DMA channel specific registers
- - interrupts : interrupt specifier for DMA channel IRQ
-
-Example:
- dma@21300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
- reg = <0x21300 4>;
- ranges = <0 0x21100 0x200>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0 0x80>;
- cell-index = <0>;
- interrupt-parent = <&mpic>;
- interrupts = <20 2>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- cell-index = <1>;
- interrupt-parent = <&mpic>;
- interrupts = <21 2>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- cell-index = <2>;
- interrupt-parent = <&mpic>;
- interrupts = <22 2>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- cell-index = <3>;
- interrupt-parent = <&mpic>;
- interrupts = <23 2>;
- };
- };
-
-** Freescale Elo3 DMA Controller
- DMA controller which has same function as EloPlus except that Elo3 has 8
- channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
- series chips, such as t1040, t4240, b4860.
-
-Required properties:
-
-- compatible : must include "fsl,elo3-dma"
-- reg : contains two entries for DMA General Status Registers,
- i.e. DGSR0 which includes status for channel 1~4, and
- DGSR1 for channel 5~8
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-
-- DMA channel nodes:
- - compatible : must include "fsl,eloplus-dma-channel"
- - reg : DMA channel specific registers
- - interrupts : interrupt specifier for DMA channel IRQ
-
-Example:
-dma@100300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,elo3-dma";
- reg = <0x100300 0x4>,
- <0x100600 0x4>;
- ranges = <0x0 0x100100 0x500>;
- dma-channel@0 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x0 0x80>;
- interrupts = <28 2 0 0>;
- };
- dma-channel@80 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- interrupts = <29 2 0 0>;
- };
- dma-channel@100 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- interrupts = <30 2 0 0>;
- };
- dma-channel@180 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- interrupts = <31 2 0 0>;
- };
- dma-channel@300 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x300 0x80>;
- interrupts = <76 2 0 0>;
- };
- dma-channel@380 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x380 0x80>;
- interrupts = <77 2 0 0>;
- };
- dma-channel@400 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x400 0x80>;
- interrupts = <78 2 0 0>;
- };
- dma-channel@480 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x480 0x80>;
- interrupts = <79 2 0 0>;
- };
-};
-
-Note on DMA channel compatible properties: The compatible property must say
-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
-driver (fsldma). Any DMA channel used by fsldma cannot be used by another
-DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
-channel that should be used for another driver should not use
-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
-example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
-for more information.
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
The devicetree bindings for Freescale DMA engines have so far existed as
a text file. This patch converts them to YAML, and specifies all the
compatible strings currently in use in arch/powerpc/boot/dts.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- remove unnecessary multiline markers
- fix additionalProperties to always be false
- add description/maxItems to interrupts
- add missing #address-cells/#size-cells properties
- convert "Note on DMA channel compatible properties" to YAML by listing
fsl,ssi-dma-channel as a valid compatible value
- fix property ordering in examples: compatible and reg come first
- add missing newlines in examples
- trim subject line (remove "bindings")
---
.../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
.../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
.../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
.../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
4 files changed, 397 insertions(+), 204 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Elo DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
+ series chips such as mpc8315, mpc8349, mpc8379 etc.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - fsl,mpc8313-dma
+ - fsl,mpc8315-dma
+ - fsl,mpc8323-dma
+ - fsl,mpc8347-dma
+ - fsl,mpc8349-dma
+ - fsl,mpc8360-dma
+ - fsl,mpc8377-dma
+ - fsl,mpc8378-dma
+ - fsl,mpc8379-dma
+ - const: fsl,elo-dma
+
+ reg:
+ maxItems: 1
+ description:
+ DMA General Status Register, i.e. DGSR which contains status for
+ all the 4 DMA channels.
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Controller index. 0 for controller @ 0x8100.
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+required:
+ - compatible
+ - reg
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ oneOf:
+ # native DMA channel
+ - items:
+ - enum:
+ - fsl,mpc8315-dma-channel
+ - fsl,mpc8323-dma-channel
+ - fsl,mpc8347-dma-channel
+ - fsl,mpc8349-dma-channel
+ - fsl,mpc8360-dma-channel
+ - fsl,mpc8377-dma-channel
+ - fsl,mpc8378-dma-channel
+ - fsl,mpc8379-dma-channel
+ - const: fsl,elo-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - const: fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ description: DMA channel index starts at 0.
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@82a8 {
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x8100 0x1a4>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..36865836b48af78af32d4e11f55a32e32771a23e
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
@@ -0,0 +1,123 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Elo3 DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ DMA controller which has same function as EloPlus except that Elo3 has 8
+ channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
+ series chips, such as t1040, t4240, b4860.
+
+properties:
+ compatible:
+ const: fsl,elo3-dma
+
+ reg:
+ maxItems: 2
+ description:
+ contains two entries for DMA General Status Registers, i.e. DGSR0 which
+ includes status for channel 1~4, and DGSR1 for channel 5~8
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ enum:
+ # native DMA channel
+ - fsl,eloplus-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@100300 {
+ compatible = "fsl,elo3-dma";
+ reg = <0x100300 0x4>,
+ <0x100600 0x4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x100100 0x500>;
+
+ dma-channel@0 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ interrupts = <28 2 0 0>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ interrupts = <29 2 0 0>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ interrupts = <30 2 0 0>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ interrupts = <31 2 0 0>;
+ };
+
+ dma-channel@300 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x300 0x80>;
+ interrupts = <76 2 0 0>;
+ };
+
+ dma-channel@380 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x380 0x80>;
+ interrupts = <77 2 0 0>;
+ };
+
+ dma-channel@400 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x400 0x80>;
+ interrupts = <78 2 0 0>;
+ };
+
+ dma-channel@480 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x480 0x80>;
+ interrupts = <79 2 0 0>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..513fee051657832dc031d32c1f701bf7c3b89daa
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale EloPlus DMA Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+description:
+ This is a 4-channel DMA controller with extended addresses and chaining,
+ mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
+ mpc8540, mpc8641 p4080, bsc9131 etc.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8540-dma
+ - fsl,mpc8541-dma
+ - fsl,mpc8548-dma
+ - fsl,mpc8555-dma
+ - fsl,mpc8560-dma
+ - fsl,mpc8572-dma
+ - fsl,mpc8641-dma
+ - const: fsl,eloplus-dma
+ - const: fsl,eloplus-dma
+
+ reg:
+ maxItems: 1
+ description:
+ DMA General Status Register, i.e. DGSR which contains
+ status for all the 4 DMA channels
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000
+
+ ranges: true
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ interrupts:
+ maxItems: 1
+ description: Controller interrupt.
+
+patternProperties:
+ "^dma-channel@.*$":
+ type: object
+ additionalProperties: false
+
+ properties:
+ compatible:
+ oneOf:
+ # native DMA channel
+ - items:
+ - enum:
+ - fsl,mpc8540-dma-channel
+ - fsl,mpc8541-dma-channel
+ - fsl,mpc8548-dma-channel
+ - fsl,mpc8555-dma-channel
+ - fsl,mpc8560-dma-channel
+ - fsl,mpc8572-dma-channel
+ - const: fsl,eloplus-dma-channel
+
+ # audio DMA channel, see fsl,ssi.yaml
+ - const: fsl,ssi-dma-channel
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ description: DMA channel index starts at 0.
+
+ interrupts:
+ maxItems: 1
+ description:
+ Per-channel interrupt. Only necessary if no controller interrupt has
+ been provided.
+
+additionalProperties: false
+
+examples:
+ - |
+ dma@21300 {
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <0x21300 4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x21100 0x200>;
+ cell-index = <0>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
deleted file mode 100644
index c11ad5c6db2190bf38c160632d9997122e169945..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ /dev/null
@@ -1,204 +0,0 @@
-* Freescale DMA Controllers
-
-** Freescale Elo DMA Controller
- This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
- series chips such as mpc8315, mpc8349, mpc8379 etc.
-
-Required properties:
-
-- compatible : must include "fsl,elo-dma"
-- reg : DMA General Status Register, i.e. DGSR which contains
- status for all the 4 DMA channels
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-- cell-index : controller index. 0 for controller @ 0x8100
-- interrupts : interrupt specifier for DMA IRQ
-
-- DMA channel nodes:
- - compatible : must include "fsl,elo-dma-channel"
- However, see note below.
- - reg : DMA channel specific registers
- - cell-index : DMA channel index starts at 0.
-
-Optional properties:
- - interrupts : interrupt specifier for DMA channel IRQ
- (on 83xx this is expected to be identical to
- the interrupts property of the parent node)
-
-Example:
- dma@82a8 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
- reg = <0x82a8 4>;
- ranges = <0 0x8100 0x1a4>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <0>;
- reg = <0 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <1>;
- reg = <0x80 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <2>;
- reg = <0x100 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <3>;
- reg = <0x180 0x80>;
- interrupt-parent = <&ipic>;
- interrupts = <71 8>;
- };
- };
-
-** Freescale EloPlus DMA Controller
- This is a 4-channel DMA controller with extended addresses and chaining,
- mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
- mpc8540, mpc8641 p4080, bsc9131 etc.
-
-Required properties:
-
-- compatible : must include "fsl,eloplus-dma"
-- reg : DMA General Status Register, i.e. DGSR which contains
- status for all the 4 DMA channels
-- cell-index : controller index. 0 for controller @ 0x21000,
- 1 for controller @ 0xc000
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-
-- DMA channel nodes:
- - compatible : must include "fsl,eloplus-dma-channel"
- However, see note below.
- - cell-index : DMA channel index starts at 0.
- - reg : DMA channel specific registers
- - interrupts : interrupt specifier for DMA channel IRQ
-
-Example:
- dma@21300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
- reg = <0x21300 4>;
- ranges = <0 0x21100 0x200>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0 0x80>;
- cell-index = <0>;
- interrupt-parent = <&mpic>;
- interrupts = <20 2>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- cell-index = <1>;
- interrupt-parent = <&mpic>;
- interrupts = <21 2>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- cell-index = <2>;
- interrupt-parent = <&mpic>;
- interrupts = <22 2>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- cell-index = <3>;
- interrupt-parent = <&mpic>;
- interrupts = <23 2>;
- };
- };
-
-** Freescale Elo3 DMA Controller
- DMA controller which has same function as EloPlus except that Elo3 has 8
- channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
- series chips, such as t1040, t4240, b4860.
-
-Required properties:
-
-- compatible : must include "fsl,elo3-dma"
-- reg : contains two entries for DMA General Status Registers,
- i.e. DGSR0 which includes status for channel 1~4, and
- DGSR1 for channel 5~8
-- ranges : describes the mapping between the address space of the
- DMA channels and the address space of the DMA controller
-
-- DMA channel nodes:
- - compatible : must include "fsl,eloplus-dma-channel"
- - reg : DMA channel specific registers
- - interrupts : interrupt specifier for DMA channel IRQ
-
-Example:
-dma@100300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,elo3-dma";
- reg = <0x100300 0x4>,
- <0x100600 0x4>;
- ranges = <0x0 0x100100 0x500>;
- dma-channel@0 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x0 0x80>;
- interrupts = <28 2 0 0>;
- };
- dma-channel@80 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- interrupts = <29 2 0 0>;
- };
- dma-channel@100 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- interrupts = <30 2 0 0>;
- };
- dma-channel@180 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- interrupts = <31 2 0 0>;
- };
- dma-channel@300 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x300 0x80>;
- interrupts = <76 2 0 0>;
- };
- dma-channel@380 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x380 0x80>;
- interrupts = <77 2 0 0>;
- };
- dma-channel@400 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x400 0x80>;
- interrupts = <78 2 0 0>;
- };
- dma-channel@480 {
- compatible = "fsl,eloplus-dma-channel";
- reg = <0x480 0x80>;
- interrupts = <79 2 0 0>;
- };
-};
-
-Note on DMA channel compatible properties: The compatible property must say
-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
-driver (fsldma). Any DMA channel used by fsldma cannot be used by another
-DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
-channel that should be used for another driver should not use
-"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
-example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
-for more information.
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-10 19:39 ` Frank Li
-1 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:39 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> The devicetree bindings for Freescale DMA engines have so far existed as
> a text file. This patch converts them to YAML, and specifies all the
> compatible strings currently in use in arch/powerpc/boot/dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - remove unnecessary multiline markers
> - fix additionalProperties to always be false
> - add description/maxItems to interrupts
> - add missing #address-cells/#size-cells properties
> - convert "Note on DMA channel compatible properties" to YAML by listing
> fsl,ssi-dma-channel as a valid compatible value
> - fix property ordering in examples: compatible and reg come first
> - add missing newlines in examples
> - trim subject line (remove "bindings")
> ---
> .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
> .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
> .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
> .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> 4 files changed, 397 insertions(+), 204 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> @@ -0,0 +1,140 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Elo DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description:
> + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
> + series chips such as mpc8315, mpc8349, mpc8379 etc.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8313-dma
> + - fsl,mpc8315-dma
> + - fsl,mpc8323-dma
> + - fsl,mpc8347-dma
> + - fsl,mpc8349-dma
> + - fsl,mpc8360-dma
> + - fsl,mpc8377-dma
> + - fsl,mpc8378-dma
> + - fsl,mpc8379-dma
> + - const: fsl,elo-dma
> +
> + reg:
> + maxItems: 1
> + description:
> + DMA General Status Register, i.e. DGSR which contains status for
> + all the 4 DMA channels.
needn't maxItems
items:
- description: DMA ...
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Controller index. 0 for controller @ 0x8100.
> +
> + ranges: true
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + interrupts:
> + maxItems: 1
> + description: Controller interrupt.
Needn't description because no any additional informaiton.
> +
> +required:
> + - compatible
> + - reg
> +
> +patternProperties:
> + "^dma-channel@.*$":
> + type: object
> + additionalProperties: false
> +
> + properties:
> + compatible:
> + oneOf:
> + # native DMA channel
> + - items:
> + - enum:
> + - fsl,mpc8315-dma-channel
> + - fsl,mpc8323-dma-channel
> + - fsl,mpc8347-dma-channel
> + - fsl,mpc8349-dma-channel
> + - fsl,mpc8360-dma-channel
> + - fsl,mpc8377-dma-channel
> + - fsl,mpc8378-dma-channel
> + - fsl,mpc8379-dma-channel
> + - const: fsl,elo-dma-channel
> +
> + # audio DMA channel, see fsl,ssi.yaml
> + - const: fsl,ssi-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + description: DMA channel index starts at 0.
> +
> + interrupts:
> + maxItems: 1
> + description:
> + Per-channel interrupt. Only necessary if no controller interrupt has
> + been provided.
> +
> +additionalProperties: false
Need ref to dma-common.yaml?
> +
> +examples:
> + - |
> + dma@82a8 {
> + compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
> + reg = <0x82a8 4>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x8100 0x1a4>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + cell-index = <0>;
> +
> + dma-channel@0 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0 0x80>;
> + cell-index = <0>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
'8', use predefine MACRO for irq type.
Frank
> + };
> +
> + dma-channel@80 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x80 0x80>;
> + cell-index = <1>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@100 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x100 0x80>;
> + cell-index = <2>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@180 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x180 0x80>;
> + cell-index = <3>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + };
> +
...
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
@ 2025-02-10 19:39 ` Frank Li
0 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:39 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> The devicetree bindings for Freescale DMA engines have so far existed as
> a text file. This patch converts them to YAML, and specifies all the
> compatible strings currently in use in arch/powerpc/boot/dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - remove unnecessary multiline markers
> - fix additionalProperties to always be false
> - add description/maxItems to interrupts
> - add missing #address-cells/#size-cells properties
> - convert "Note on DMA channel compatible properties" to YAML by listing
> fsl,ssi-dma-channel as a valid compatible value
> - fix property ordering in examples: compatible and reg come first
> - add missing newlines in examples
> - trim subject line (remove "bindings")
> ---
> .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
> .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
> .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
> .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> 4 files changed, 397 insertions(+), 204 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> @@ -0,0 +1,140 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Elo DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description:
> + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
> + series chips such as mpc8315, mpc8349, mpc8379 etc.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8313-dma
> + - fsl,mpc8315-dma
> + - fsl,mpc8323-dma
> + - fsl,mpc8347-dma
> + - fsl,mpc8349-dma
> + - fsl,mpc8360-dma
> + - fsl,mpc8377-dma
> + - fsl,mpc8378-dma
> + - fsl,mpc8379-dma
> + - const: fsl,elo-dma
> +
> + reg:
> + maxItems: 1
> + description:
> + DMA General Status Register, i.e. DGSR which contains status for
> + all the 4 DMA channels.
needn't maxItems
items:
- description: DMA ...
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Controller index. 0 for controller @ 0x8100.
> +
> + ranges: true
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + interrupts:
> + maxItems: 1
> + description: Controller interrupt.
Needn't description because no any additional informaiton.
> +
> +required:
> + - compatible
> + - reg
> +
> +patternProperties:
> + "^dma-channel@.*$":
> + type: object
> + additionalProperties: false
> +
> + properties:
> + compatible:
> + oneOf:
> + # native DMA channel
> + - items:
> + - enum:
> + - fsl,mpc8315-dma-channel
> + - fsl,mpc8323-dma-channel
> + - fsl,mpc8347-dma-channel
> + - fsl,mpc8349-dma-channel
> + - fsl,mpc8360-dma-channel
> + - fsl,mpc8377-dma-channel
> + - fsl,mpc8378-dma-channel
> + - fsl,mpc8379-dma-channel
> + - const: fsl,elo-dma-channel
> +
> + # audio DMA channel, see fsl,ssi.yaml
> + - const: fsl,ssi-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + description: DMA channel index starts at 0.
> +
> + interrupts:
> + maxItems: 1
> + description:
> + Per-channel interrupt. Only necessary if no controller interrupt has
> + been provided.
> +
> +additionalProperties: false
Need ref to dma-common.yaml?
> +
> +examples:
> + - |
> + dma@82a8 {
> + compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
> + reg = <0x82a8 4>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x8100 0x1a4>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + cell-index = <0>;
> +
> + dma-channel@0 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0 0x80>;
> + cell-index = <0>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
'8', use predefine MACRO for irq type.
Frank
> + };
> +
> + dma-channel@80 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x80 0x80>;
> + cell-index = <1>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@100 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x100 0x80>;
> + cell-index = <2>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@180 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x180 0x80>;
> + cell-index = <3>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + };
> +
...
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
2025-02-10 19:39 ` Frank Li
@ 2025-02-14 12:35 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-14 12:35 UTC (permalink / raw)
To: Frank Li
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Mon, Feb 10, 2025 at 02:39:13PM -0500, Frank Li wrote:
> On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > The devicetree bindings for Freescale DMA engines have so far existed as
> > a text file. This patch converts them to YAML, and specifies all the
> > compatible strings currently in use in arch/powerpc/boot/dts.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - remove unnecessary multiline markers
> > - fix additionalProperties to always be false
> > - add description/maxItems to interrupts
> > - add missing #address-cells/#size-cells properties
> > - convert "Note on DMA channel compatible properties" to YAML by listing
> > fsl,ssi-dma-channel as a valid compatible value
> > - fix property ordering in examples: compatible and reg come first
> > - add missing newlines in examples
> > - trim subject line (remove "bindings")
> > ---
> > .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
> > .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
> > .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
> > .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> > 4 files changed, 397 insertions(+), 204 deletions(-)
[...]
> > + reg:
> > + maxItems: 1
> > + description:
> > + DMA General Status Register, i.e. DGSR which contains status for
> > + all the 4 DMA channels.
>
> needn't maxItems
> items:
> - description: DMA ...
Good point, I'll do that.
>
> > +
> > + cell-index:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: Controller index. 0 for controller @ 0x8100.
> > +
> > + ranges: true
> > +
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > + description: Controller interrupt.
>
> Needn't description because no any additional informaiton.
True.
>
> > +
> > +required:
> > + - compatible
> > + - reg
[...]
> > +additionalProperties: false
>
> Need ref to dma-common.yaml?
Sounds good, but I'm not sure what to do about the #dma-cells property,
which is required by dma-common.yaml.
There aren't many examples of DMA channels being explicitly declared in
device trees. One example that I could find is the the xilinx_dma.txt
binding:
axi_vdma_0: axivdma@40030000 {
compatible = "xlnx,axi-vdma-1.00.a";
#dma_cells = <1>;
reg = < 0x40030000 0x10000 >;
dma-ranges = <0x00000000 0x00000000 0x40000000>;
xlnx,num-fstores = <0x8>;
xlnx,flush-fsync = <0x1>;
xlnx,addrwidth = <0x20>;
clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
"m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
dma-channel@40030000 {
compatible = "xlnx,axi-vdma-mm2s-channel";
interrupts = < 0 54 4 >;
xlnx,datawidth = <0x40>;
};
dma-channel@40030030 {
compatible = "xlnx,axi-vdma-s2mm-channel";
interrupts = < 0 53 4 >;
xlnx,datawidth = <0x40>;
};
};
...
vdmatest_0: vdmatest@0 {
compatible ="xlnx,axi-vdma-test-1.00.a";
dmas = <&axi_vdma_0 0
&axi_vdma_0 1>;
dma-names = "vdma0", "vdma1";
};
It has #dma_cells (I'm sure #dma-cells was intended) on the controller.
Another example is in arch/powerpc/boot/dts/fsl/p1022si-post.dtsi:
dma@c300 {
dma00: dma-channel@0 {
compatible = "fsl,ssi-dma-channel";
};
dma01: dma-channel@80 {
compatible = "fsl,ssi-dma-channel";
};
};
...
ssi@15000 {
compatible = "fsl,mpc8610-ssi";
cell-index = <0>;
reg = <0x15000 0x100>;
interrupts = <75 2 0 0>;
fsl,playback-dma = <&dma00>;
fsl,capture-dma = <&dma01>;
fsl,fifo-depth = <15>;
};
There, the DMA channels are used directly and without additional
information (i.e. #dma-cells = <0>, althought it isn't specified).
> > + dma-channel@0 {
> > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> > + reg = <0 0x80>;
> > + cell-index = <0>;
> > + interrupt-parent = <&ipic>;
> > + interrupts = <71 8>;
>
> '8', use predefine MACRO for irq type.
Good catch, will do
>
> Frank
Thanks for your review!
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
@ 2025-02-14 12:35 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-14 12:35 UTC (permalink / raw)
To: Frank Li
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Mon, Feb 10, 2025 at 02:39:13PM -0500, Frank Li wrote:
> On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > The devicetree bindings for Freescale DMA engines have so far existed as
> > a text file. This patch converts them to YAML, and specifies all the
> > compatible strings currently in use in arch/powerpc/boot/dts.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - remove unnecessary multiline markers
> > - fix additionalProperties to always be false
> > - add description/maxItems to interrupts
> > - add missing #address-cells/#size-cells properties
> > - convert "Note on DMA channel compatible properties" to YAML by listing
> > fsl,ssi-dma-channel as a valid compatible value
> > - fix property ordering in examples: compatible and reg come first
> > - add missing newlines in examples
> > - trim subject line (remove "bindings")
> > ---
> > .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
> > .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
> > .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
> > .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> > 4 files changed, 397 insertions(+), 204 deletions(-)
[...]
> > + reg:
> > + maxItems: 1
> > + description:
> > + DMA General Status Register, i.e. DGSR which contains status for
> > + all the 4 DMA channels.
>
> needn't maxItems
> items:
> - description: DMA ...
Good point, I'll do that.
>
> > +
> > + cell-index:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description: Controller index. 0 for controller @ 0x8100.
> > +
> > + ranges: true
> > +
> > + "#address-cells":
> > + const: 1
> > +
> > + "#size-cells":
> > + const: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > + description: Controller interrupt.
>
> Needn't description because no any additional informaiton.
True.
>
> > +
> > +required:
> > + - compatible
> > + - reg
[...]
> > +additionalProperties: false
>
> Need ref to dma-common.yaml?
Sounds good, but I'm not sure what to do about the #dma-cells property,
which is required by dma-common.yaml.
There aren't many examples of DMA channels being explicitly declared in
device trees. One example that I could find is the the xilinx_dma.txt
binding:
axi_vdma_0: axivdma@40030000 {
compatible = "xlnx,axi-vdma-1.00.a";
#dma_cells = <1>;
reg = < 0x40030000 0x10000 >;
dma-ranges = <0x00000000 0x00000000 0x40000000>;
xlnx,num-fstores = <0x8>;
xlnx,flush-fsync = <0x1>;
xlnx,addrwidth = <0x20>;
clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
"m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
dma-channel@40030000 {
compatible = "xlnx,axi-vdma-mm2s-channel";
interrupts = < 0 54 4 >;
xlnx,datawidth = <0x40>;
};
dma-channel@40030030 {
compatible = "xlnx,axi-vdma-s2mm-channel";
interrupts = < 0 53 4 >;
xlnx,datawidth = <0x40>;
};
};
...
vdmatest_0: vdmatest@0 {
compatible ="xlnx,axi-vdma-test-1.00.a";
dmas = <&axi_vdma_0 0
&axi_vdma_0 1>;
dma-names = "vdma0", "vdma1";
};
It has #dma_cells (I'm sure #dma-cells was intended) on the controller.
Another example is in arch/powerpc/boot/dts/fsl/p1022si-post.dtsi:
dma@c300 {
dma00: dma-channel@0 {
compatible = "fsl,ssi-dma-channel";
};
dma01: dma-channel@80 {
compatible = "fsl,ssi-dma-channel";
};
};
...
ssi@15000 {
compatible = "fsl,mpc8610-ssi";
cell-index = <0>;
reg = <0x15000 0x100>;
interrupts = <75 2 0 0>;
fsl,playback-dma = <&dma00>;
fsl,capture-dma = <&dma01>;
fsl,fifo-depth = <15>;
};
There, the DMA channels are used directly and without additional
information (i.e. #dma-cells = <0>, althought it isn't specified).
> > + dma-channel@0 {
> > + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> > + reg = <0 0x80>;
> > + cell-index = <0>;
> > + interrupt-parent = <&ipic>;
> > + interrupts = <71 8>;
>
> '8', use predefine MACRO for irq type.
Good catch, will do
>
> Frank
Thanks for your review!
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
2025-02-14 12:35 ` J. Neuschäfer
@ 2025-02-25 12:54 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-25 12:54 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Frank Li, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Fri, Feb 14, 2025 at 12:35:41PM +0000, J. Neuschäfer wrote:
> On Mon, Feb 10, 2025 at 02:39:13PM -0500, Frank Li wrote:
> > On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote:
> > > From: "J. Neuschäfer" <j.ne@posteo.net>
> > >
> > > The devicetree bindings for Freescale DMA engines have so far existed as
> > > a text file. This patch converts them to YAML, and specifies all the
> > > compatible strings currently in use in arch/powerpc/boot/dts.
> > >
> > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > > ---
[...]
> > Need ref to dma-common.yaml?
>
> Sounds good, but I'm not sure what to do about the #dma-cells property,
> which is required by dma-common.yaml.
>
> There aren't many examples of DMA channels being explicitly declared in
> device trees. One example that I could find is the the xilinx_dma.txt
> binding:
>
>
> axi_vdma_0: axivdma@40030000 {
> compatible = "xlnx,axi-vdma-1.00.a";
> #dma_cells = <1>;
> reg = < 0x40030000 0x10000 >;
> dma-ranges = <0x00000000 0x00000000 0x40000000>;
> xlnx,num-fstores = <0x8>;
> xlnx,flush-fsync = <0x1>;
> xlnx,addrwidth = <0x20>;
> clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
> clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
> "m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
> dma-channel@40030000 {
> compatible = "xlnx,axi-vdma-mm2s-channel";
> interrupts = < 0 54 4 >;
> xlnx,datawidth = <0x40>;
> };
> dma-channel@40030030 {
> compatible = "xlnx,axi-vdma-s2mm-channel";
> interrupts = < 0 53 4 >;
> xlnx,datawidth = <0x40>;
> };
> };
>
> ...
>
> vdmatest_0: vdmatest@0 {
> compatible ="xlnx,axi-vdma-test-1.00.a";
> dmas = <&axi_vdma_0 0
> &axi_vdma_0 1>;
> dma-names = "vdma0", "vdma1";
> };
>
> It has #dma_cells (I'm sure #dma-cells was intended) on the controller.
>
>
> Another example is in arch/powerpc/boot/dts/fsl/p1022si-post.dtsi:
>
> dma@c300 {
> dma00: dma-channel@0 {
> compatible = "fsl,ssi-dma-channel";
> };
> dma01: dma-channel@80 {
> compatible = "fsl,ssi-dma-channel";
> };
> };
>
> ...
>
> ssi@15000 {
> compatible = "fsl,mpc8610-ssi";
> cell-index = <0>;
> reg = <0x15000 0x100>;
> interrupts = <75 2 0 0>;
> fsl,playback-dma = <&dma00>;
> fsl,capture-dma = <&dma01>;
> fsl,fifo-depth = <15>;
> };
>
>
> There, the DMA channels are used directly and without additional
> information (i.e. #dma-cells = <0>, althought it isn't specified).
I had another look at dma-common.yaml and it explicitly requires
#dma-cells to have a value of at least 1, so this second idea won't
work.
Best regards,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
@ 2025-02-25 12:54 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-25 12:54 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Frank Li, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Fri, Feb 14, 2025 at 12:35:41PM +0000, J. Neuschäfer wrote:
> On Mon, Feb 10, 2025 at 02:39:13PM -0500, Frank Li wrote:
> > On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer via B4 Relay wrote:
> > > From: "J. Neuschäfer" <j.ne@posteo.net>
> > >
> > > The devicetree bindings for Freescale DMA engines have so far existed as
> > > a text file. This patch converts them to YAML, and specifies all the
> > > compatible strings currently in use in arch/powerpc/boot/dts.
> > >
> > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > > ---
[...]
> > Need ref to dma-common.yaml?
>
> Sounds good, but I'm not sure what to do about the #dma-cells property,
> which is required by dma-common.yaml.
>
> There aren't many examples of DMA channels being explicitly declared in
> device trees. One example that I could find is the the xilinx_dma.txt
> binding:
>
>
> axi_vdma_0: axivdma@40030000 {
> compatible = "xlnx,axi-vdma-1.00.a";
> #dma_cells = <1>;
> reg = < 0x40030000 0x10000 >;
> dma-ranges = <0x00000000 0x00000000 0x40000000>;
> xlnx,num-fstores = <0x8>;
> xlnx,flush-fsync = <0x1>;
> xlnx,addrwidth = <0x20>;
> clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
> clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
> "m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
> dma-channel@40030000 {
> compatible = "xlnx,axi-vdma-mm2s-channel";
> interrupts = < 0 54 4 >;
> xlnx,datawidth = <0x40>;
> };
> dma-channel@40030030 {
> compatible = "xlnx,axi-vdma-s2mm-channel";
> interrupts = < 0 53 4 >;
> xlnx,datawidth = <0x40>;
> };
> };
>
> ...
>
> vdmatest_0: vdmatest@0 {
> compatible ="xlnx,axi-vdma-test-1.00.a";
> dmas = <&axi_vdma_0 0
> &axi_vdma_0 1>;
> dma-names = "vdma0", "vdma1";
> };
>
> It has #dma_cells (I'm sure #dma-cells was intended) on the controller.
>
>
> Another example is in arch/powerpc/boot/dts/fsl/p1022si-post.dtsi:
>
> dma@c300 {
> dma00: dma-channel@0 {
> compatible = "fsl,ssi-dma-channel";
> };
> dma01: dma-channel@80 {
> compatible = "fsl,ssi-dma-channel";
> };
> };
>
> ...
>
> ssi@15000 {
> compatible = "fsl,mpc8610-ssi";
> cell-index = <0>;
> reg = <0x15000 0x100>;
> interrupts = <75 2 0 0>;
> fsl,playback-dma = <&dma00>;
> fsl,capture-dma = <&dma01>;
> fsl,fifo-depth = <15>;
> };
>
>
> There, the DMA channels are used directly and without additional
> information (i.e. #dma-cells = <0>, althought it isn't specified).
I had another look at dma-common.yaml and it explicitly requires
#dma-cells to have a value of at least 1, so this second idea won't
work.
Best regards,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-12 19:38 ` Rob Herring
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-12 19:38 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer wrote:
> The devicetree bindings for Freescale DMA engines have so far existed as
> a text file. This patch converts them to YAML, and specifies all the
> compatible strings currently in use in arch/powerpc/boot/dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - remove unnecessary multiline markers
> - fix additionalProperties to always be false
> - add description/maxItems to interrupts
> - add missing #address-cells/#size-cells properties
> - convert "Note on DMA channel compatible properties" to YAML by listing
> fsl,ssi-dma-channel as a valid compatible value
> - fix property ordering in examples: compatible and reg come first
> - add missing newlines in examples
> - trim subject line (remove "bindings")
> ---
> .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
> .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
> .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
> .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> 4 files changed, 397 insertions(+), 204 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> @@ -0,0 +1,140 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Elo DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description:
> + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
> + series chips such as mpc8315, mpc8349, mpc8379 etc.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8313-dma
> + - fsl,mpc8315-dma
> + - fsl,mpc8323-dma
> + - fsl,mpc8347-dma
> + - fsl,mpc8349-dma
> + - fsl,mpc8360-dma
> + - fsl,mpc8377-dma
> + - fsl,mpc8378-dma
> + - fsl,mpc8379-dma
> + - const: fsl,elo-dma
> +
> + reg:
> + maxItems: 1
> + description:
> + DMA General Status Register, i.e. DGSR which contains status for
> + all the 4 DMA channels.
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Controller index. 0 for controller @ 0x8100.
> +
> + ranges: true
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + interrupts:
> + maxItems: 1
> + description: Controller interrupt.
> +
> +required:
> + - compatible
> + - reg
> +
> +patternProperties:
> + "^dma-channel@.*$":
You need to define the unit-address format.
> + type: object
> + additionalProperties: false
> +
> + properties:
> + compatible:
> + oneOf:
> + # native DMA channel
> + - items:
> + - enum:
> + - fsl,mpc8315-dma-channel
> + - fsl,mpc8323-dma-channel
> + - fsl,mpc8347-dma-channel
> + - fsl,mpc8349-dma-channel
> + - fsl,mpc8360-dma-channel
> + - fsl,mpc8377-dma-channel
> + - fsl,mpc8378-dma-channel
> + - fsl,mpc8379-dma-channel
> + - const: fsl,elo-dma-channel
> +
> + # audio DMA channel, see fsl,ssi.yaml
> + - const: fsl,ssi-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + description: DMA channel index starts at 0.
> +
> + interrupts:
> + maxItems: 1
> + description:
> + Per-channel interrupt. Only necessary if no controller interrupt has
> + been provided.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dma@82a8 {
dma-controller@...
> + compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
> + reg = <0x82a8 4>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x8100 0x1a4>;
> + interrupt-parent = <&ipic>;
Drop interrupt-parent everywhere.
> + interrupts = <71 8>;
> + cell-index = <0>;
> +
> + dma-channel@0 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0 0x80>;
> + cell-index = <0>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@80 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x80 0x80>;
> + cell-index = <1>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@100 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x100 0x80>;
> + cell-index = <2>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@180 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x180 0x80>;
> + cell-index = <3>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + };
> +
> +...
Similar comments on the others.
Rob
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma to YAML
@ 2025-02-12 19:38 ` Rob Herring
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-12 19:38 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:22PM +0100, J. Neuschäfer wrote:
> The devicetree bindings for Freescale DMA engines have so far existed as
> a text file. This patch converts them to YAML, and specifies all the
> compatible strings currently in use in arch/powerpc/boot/dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - remove unnecessary multiline markers
> - fix additionalProperties to always be false
> - add description/maxItems to interrupts
> - add missing #address-cells/#size-cells properties
> - convert "Note on DMA channel compatible properties" to YAML by listing
> fsl,ssi-dma-channel as a valid compatible value
> - fix property ordering in examples: compatible and reg come first
> - add missing newlines in examples
> - trim subject line (remove "bindings")
> ---
> .../devicetree/bindings/dma/fsl,elo-dma.yaml | 140 ++++++++++++++
> .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 123 +++++++++++++
> .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 134 ++++++++++++++
> .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> 4 files changed, 397 insertions(+), 204 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..3d8be9973fb98891a73cb701c1f983a63f444837
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> @@ -0,0 +1,140 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Elo DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description:
> + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
> + series chips such as mpc8315, mpc8349, mpc8379 etc.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8313-dma
> + - fsl,mpc8315-dma
> + - fsl,mpc8323-dma
> + - fsl,mpc8347-dma
> + - fsl,mpc8349-dma
> + - fsl,mpc8360-dma
> + - fsl,mpc8377-dma
> + - fsl,mpc8378-dma
> + - fsl,mpc8379-dma
> + - const: fsl,elo-dma
> +
> + reg:
> + maxItems: 1
> + description:
> + DMA General Status Register, i.e. DGSR which contains status for
> + all the 4 DMA channels.
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Controller index. 0 for controller @ 0x8100.
> +
> + ranges: true
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> + interrupts:
> + maxItems: 1
> + description: Controller interrupt.
> +
> +required:
> + - compatible
> + - reg
> +
> +patternProperties:
> + "^dma-channel@.*$":
You need to define the unit-address format.
> + type: object
> + additionalProperties: false
> +
> + properties:
> + compatible:
> + oneOf:
> + # native DMA channel
> + - items:
> + - enum:
> + - fsl,mpc8315-dma-channel
> + - fsl,mpc8323-dma-channel
> + - fsl,mpc8347-dma-channel
> + - fsl,mpc8349-dma-channel
> + - fsl,mpc8360-dma-channel
> + - fsl,mpc8377-dma-channel
> + - fsl,mpc8378-dma-channel
> + - fsl,mpc8379-dma-channel
> + - const: fsl,elo-dma-channel
> +
> + # audio DMA channel, see fsl,ssi.yaml
> + - const: fsl,ssi-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + description: DMA channel index starts at 0.
> +
> + interrupts:
> + maxItems: 1
> + description:
> + Per-channel interrupt. Only necessary if no controller interrupt has
> + been provided.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dma@82a8 {
dma-controller@...
> + compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
> + reg = <0x82a8 4>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x8100 0x1a4>;
> + interrupt-parent = <&ipic>;
Drop interrupt-parent everywhere.
> + interrupts = <71 8>;
> + cell-index = <0>;
> +
> + dma-channel@0 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0 0x80>;
> + cell-index = <0>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@80 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x80 0x80>;
> + cell-index = <1>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@100 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x100 0x80>;
> + cell-index = <2>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> +
> + dma-channel@180 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + reg = <0x180 0x80>;
> + cell-index = <3>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + };
> +
> +...
Similar comments on the others.
Rob
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Formalise the binding for the PCI controllers in the Freescale MPC8xxx
chip family. Information about PCI-X-specific properties was taken from
fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
xpedite5200_xmon.dts.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
- regroup compatible strings, list single-item values in one enum
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
2 files changed, 115 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
+
+description: |
+ Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
+ See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
+
+maintainers:
+ - J. Neuschäfer <j.neuschaefer@gmx.net>
+
+allOf:
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,mpc8314-pcie
+ - fsl,mpc8349-pci
+ - fsl,mpc8540-pci
+ - fsl,mpc8548-pcie
+ - fsl,mpc8641-pcie
+ - items:
+ - enum:
+ - fsl,mpc8308-pcie
+ - fsl,mpc8315-pcie
+ - fsl,mpc8377-pcie
+ - fsl,mpc8378-pcie
+ - const: fsl,mpc8314-pcie
+ - items:
+ - const: fsl,mpc8360-pci
+ - const: fsl,mpc8349-pci
+ - items:
+ - const: fsl,mpc8540-pcix
+ - const: fsl,mpc8540-pci
+
+ reg:
+ minItems: 1
+ items:
+ - description: internal registers
+ - description: config space access registers
+
+ clock-frequency: true
+
+ interrupts:
+ items:
+ - description: Consolidated PCI interrupt
+
+ fsl,pci-agent-force-enum:
+ type: boolean
+ description:
+ Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
+ prevented from enumerating the bus. The PrPMC form-factor requires all
+ mezzanines to be PCI-X Agents, but one per system may still enumerate the
+ bus.
+
+ This property allows a PCI-X bridge to be used for bus enumeration
+ despite being strapped into Agent mode.
+
+required:
+ - reg
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ pcie@e0009000 {
+ compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe0009000 0x00001000>;
+ ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ bus-range = <0 255>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
+ clock-frequency = <0>;
+ };
+
+ - |
+ pci@ef008000 {
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ reg = <0xef008000 0x1000>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ clock-frequency = <33333333>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = </* IDSEL */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+ interrupts-extended = <&mpic 24 2>;
+ bus-range = <0 0>;
+ fsl,pci-agent-force-enum;
+ };
+
+
+...
diff --git a/Documentation/devicetree/bindings/pci/fsl,pci.txt b/Documentation/devicetree/bindings/pci/fsl,pci.txt
deleted file mode 100644
index d8ac4a768e7e65b465f83308cc918ec471309dcf..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/pci/fsl,pci.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Bus Enumeration by Freescale PCI-X Agent
-
-Typically any Freescale PCI-X bridge hardware strapped into Agent mode
-is prevented from enumerating the bus. The PrPMC form-factor requires
-all mezzanines to be PCI-X Agents, but one per system may still
-enumerate the bus.
-
-The property defined below will allow a PCI-X bridge to be used for bus
-enumeration despite being strapped into Agent mode.
-
-Required properties:
-- fsl,pci-agent-force-enum : There is no value associated with this
- property. The property itself is treated as a boolean.
-
-Example:
-
- /* PCI-X bridge known to be PrPMC Monarch */
- pci0: pci@ef008000 {
- fsl,pci-agent-force-enum;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
- device_type = "pci";
- ...
- ...
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Formalise the binding for the PCI controllers in the Freescale MPC8xxx
chip family. Information about PCI-X-specific properties was taken from
fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
xpedite5200_xmon.dts.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
- regroup compatible strings, list single-item values in one enum
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
2 files changed, 115 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
+
+description: |
+ Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
+ See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
+
+maintainers:
+ - J. Neuschäfer <j.neuschaefer@gmx.net>
+
+allOf:
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,mpc8314-pcie
+ - fsl,mpc8349-pci
+ - fsl,mpc8540-pci
+ - fsl,mpc8548-pcie
+ - fsl,mpc8641-pcie
+ - items:
+ - enum:
+ - fsl,mpc8308-pcie
+ - fsl,mpc8315-pcie
+ - fsl,mpc8377-pcie
+ - fsl,mpc8378-pcie
+ - const: fsl,mpc8314-pcie
+ - items:
+ - const: fsl,mpc8360-pci
+ - const: fsl,mpc8349-pci
+ - items:
+ - const: fsl,mpc8540-pcix
+ - const: fsl,mpc8540-pci
+
+ reg:
+ minItems: 1
+ items:
+ - description: internal registers
+ - description: config space access registers
+
+ clock-frequency: true
+
+ interrupts:
+ items:
+ - description: Consolidated PCI interrupt
+
+ fsl,pci-agent-force-enum:
+ type: boolean
+ description:
+ Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
+ prevented from enumerating the bus. The PrPMC form-factor requires all
+ mezzanines to be PCI-X Agents, but one per system may still enumerate the
+ bus.
+
+ This property allows a PCI-X bridge to be used for bus enumeration
+ despite being strapped into Agent mode.
+
+required:
+ - reg
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ pcie@e0009000 {
+ compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe0009000 0x00001000>;
+ ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ bus-range = <0 255>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
+ clock-frequency = <0>;
+ };
+
+ - |
+ pci@ef008000 {
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ reg = <0xef008000 0x1000>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ clock-frequency = <33333333>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = </* IDSEL */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+ interrupts-extended = <&mpic 24 2>;
+ bus-range = <0 0>;
+ fsl,pci-agent-force-enum;
+ };
+
+
+...
diff --git a/Documentation/devicetree/bindings/pci/fsl,pci.txt b/Documentation/devicetree/bindings/pci/fsl,pci.txt
deleted file mode 100644
index d8ac4a768e7e65b465f83308cc918ec471309dcf..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/pci/fsl,pci.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Bus Enumeration by Freescale PCI-X Agent
-
-Typically any Freescale PCI-X bridge hardware strapped into Agent mode
-is prevented from enumerating the bus. The PrPMC form-factor requires
-all mezzanines to be PCI-X Agents, but one per system may still
-enumerate the bus.
-
-The property defined below will allow a PCI-X bridge to be used for bus
-enumeration despite being strapped into Agent mode.
-
-Required properties:
-- fsl,pci-agent-force-enum : There is no value associated with this
- property. The property itself is treated as a boolean.
-
-Example:
-
- /* PCI-X bridge known to be PrPMC Monarch */
- pci0: pci@ef008000 {
- fsl,pci-agent-force-enum;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
- device_type = "pci";
- ...
- ...
- };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Formalise the binding for the PCI controllers in the Freescale MPC8xxx
chip family. Information about PCI-X-specific properties was taken from
fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
xpedite5200_xmon.dts.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
- regroup compatible strings, list single-item values in one enum
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
2 files changed, 115 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
+
+description: |
+ Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
+ See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
+
+maintainers:
+ - J. Neuschäfer <j.neuschaefer@gmx.net>
+
+allOf:
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,mpc8314-pcie
+ - fsl,mpc8349-pci
+ - fsl,mpc8540-pci
+ - fsl,mpc8548-pcie
+ - fsl,mpc8641-pcie
+ - items:
+ - enum:
+ - fsl,mpc8308-pcie
+ - fsl,mpc8315-pcie
+ - fsl,mpc8377-pcie
+ - fsl,mpc8378-pcie
+ - const: fsl,mpc8314-pcie
+ - items:
+ - const: fsl,mpc8360-pci
+ - const: fsl,mpc8349-pci
+ - items:
+ - const: fsl,mpc8540-pcix
+ - const: fsl,mpc8540-pci
+
+ reg:
+ minItems: 1
+ items:
+ - description: internal registers
+ - description: config space access registers
+
+ clock-frequency: true
+
+ interrupts:
+ items:
+ - description: Consolidated PCI interrupt
+
+ fsl,pci-agent-force-enum:
+ type: boolean
+ description:
+ Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
+ prevented from enumerating the bus. The PrPMC form-factor requires all
+ mezzanines to be PCI-X Agents, but one per system may still enumerate the
+ bus.
+
+ This property allows a PCI-X bridge to be used for bus enumeration
+ despite being strapped into Agent mode.
+
+required:
+ - reg
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ pcie@e0009000 {
+ compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe0009000 0x00001000>;
+ ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ bus-range = <0 255>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
+ 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
+ clock-frequency = <0>;
+ };
+
+ - |
+ pci@ef008000 {
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ reg = <0xef008000 0x1000>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ clock-frequency = <33333333>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = </* IDSEL */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+ interrupts-extended = <&mpic 24 2>;
+ bus-range = <0 0>;
+ fsl,pci-agent-force-enum;
+ };
+
+
+...
diff --git a/Documentation/devicetree/bindings/pci/fsl,pci.txt b/Documentation/devicetree/bindings/pci/fsl,pci.txt
deleted file mode 100644
index d8ac4a768e7e65b465f83308cc918ec471309dcf..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/pci/fsl,pci.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Bus Enumeration by Freescale PCI-X Agent
-
-Typically any Freescale PCI-X bridge hardware strapped into Agent mode
-is prevented from enumerating the bus. The PrPMC form-factor requires
-all mezzanines to be PCI-X Agents, but one per system may still
-enumerate the bus.
-
-The property defined below will allow a PCI-X bridge to be used for bus
-enumeration despite being strapped into Agent mode.
-
-Required properties:
-- fsl,pci-agent-force-enum : There is no value associated with this
- property. The property itself is treated as a boolean.
-
-Example:
-
- /* PCI-X bridge known to be PrPMC Monarch */
- pci0: pci@ef008000 {
- fsl,pci-agent-force-enum;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
- device_type = "pci";
- ...
- ...
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-07 23:44 ` Rob Herring (Arm)
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-07 23:44 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Richard Weinberger, linux-pci, Nicholas Piggin, Herbert Xu,
Christophe Leroy, Mark Brown, Vignesh Raghavendra,
Krzysztof Kozlowski, linux-crypto, imx, Manivannan Sadhasivam,
linuxppc-dev, linux-spi, Krzysztof Wilczyński, linux-kernel,
Miquel Raynal, J. Neuschäfer, Vinod Koul, Michael Ellerman,
Krzysztof Kozlowski, Wim Van Sebroeck, Niklas Cassel, linux-ide,
Lorenzo Pieralisi, Naveen N Rao, Madhavan Srinivasan,
Damien Le Moal, devicetree, dmaengine, Scott Wood, Guenter Roeck,
David S. Miller, Bjorn Helgaas, Conor Dooley, linux-watchdog,
Lee Jones, linux-mtd
On Fri, 07 Feb 2025 22:30:23 +0100, J. Neuschäfer wrote:
> Formalise the binding for the PCI controllers in the Freescale MPC8xxx
> chip family. Information about PCI-X-specific properties was taken from
> fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
> xpedite5200_xmon.dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
> - regroup compatible strings, list single-item values in one enum
> - trim subject line (remove "binding")
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
> Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
> 2 files changed, 115 insertions(+), 27 deletions(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml references a file that doesn't exist: Documentation/devicetree/bindings/pci/fsl,pci.txt
Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml: Documentation/devicetree/bindings/pci/fsl,pci.txt
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250207-ppcyaml-v2-6-8137b0c42526@posteo.net
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
@ 2025-02-07 23:44 ` Rob Herring (Arm)
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-07 23:44 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Richard Weinberger, linux-pci, Nicholas Piggin, Herbert Xu,
Christophe Leroy, Mark Brown, Vignesh Raghavendra,
Krzysztof Kozlowski, linux-crypto, imx, Manivannan Sadhasivam,
linuxppc-dev, linux-spi, Krzysztof Wilczyński, linux-kernel,
Miquel Raynal, J. Neuschäfer, Vinod Koul, Michael Ellerman,
Krzysztof Kozlowski, Wim Van Sebroeck, Niklas Cassel, linux-ide,
Lorenzo Pieralisi, Naveen N Rao, Madhavan Srinivasan,
Damien Le Moal, devicetree, dmaengine, Scott Wood, Guenter Roeck,
David S. Miller, Bjorn Helgaas, Conor Dooley, linux-watchdog,
Lee Jones, linux-mtd
On Fri, 07 Feb 2025 22:30:23 +0100, J. Neuschäfer wrote:
> Formalise the binding for the PCI controllers in the Freescale MPC8xxx
> chip family. Information about PCI-X-specific properties was taken from
> fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
> xpedite5200_xmon.dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
> - regroup compatible strings, list single-item values in one enum
> - trim subject line (remove "binding")
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
> Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
> 2 files changed, 115 insertions(+), 27 deletions(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml references a file that doesn't exist: Documentation/devicetree/bindings/pci/fsl,pci.txt
Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml: Documentation/devicetree/bindings/pci/fsl,pci.txt
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250207-ppcyaml-v2-6-8137b0c42526@posteo.net
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
` (2 preceding siblings ...)
(?)
@ 2025-02-08 1:26 ` kernel test robot
-1 siblings, 0 replies; 117+ messages in thread
From: kernel test robot @ 2025-02-08 1:26 UTC (permalink / raw)
To: J. Neuschäfer via B4 Relay, devicetree, linuxppc-dev,
Krzysztof Kozlowski
Cc: oe-kbuild-all, imx, Scott Wood, Madhavan Srinivasan,
Michael Ellerman, Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Rob Herring, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide
Hi Neuschäfer,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 2014c95afecee3e76ca4a56956a936e23283f05b]
url: https://github.com/intel-lab-lkp/linux/commits/J-Neusch-fer-via-B4-Relay/dt-bindings-powerpc-Add-Freescale-NXP-MPC83xx-SoCs/20250208-053519
base: 2014c95afecee3e76ca4a56956a936e23283f05b
patch link: https://lore.kernel.org/r/20250207-ppcyaml-v2-6-8137b0c42526%40posteo.net
patch subject: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
reproduce: (https://download.01.org/0day-ci/archive/20250208/202502080922.nK85none-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502080922.nK85none-lkp@intel.com/
All warnings (new ones prefixed by >>):
Warning: Documentation/arch/powerpc/cxl.rst references a file that doesn't exist: Documentation/ABI/testing/sysfs-class-cxl
>> Warning: Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml references a file that doesn't exist: Documentation/devicetree/bindings/pci/fsl,pci.txt
Warning: Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml references a file that doesn't exist: Documentation/devicetree/bindings/mfd/siliconmitus,sm5703.yaml
Warning: Documentation/hwmon/g762.rst references a file that doesn't exist: Documentation/devicetree/bindings/hwmon/g762.txt
Warning: Documentation/translations/ja_JP/SubmittingPatches references a file that doesn't exist: linux-2.6.12-vanilla/Documentation/dontdiff
Warning: Documentation/translations/zh_CN/admin-guide/README.rst references a file that doesn't exist: Documentation/dev-tools/kgdb.rst
Warning: Documentation/translations/zh_CN/dev-tools/gdb-kernel-debugging.rst references a file that doesn't exist: Documentation/dev-tools/gdb-kernel-debugging.rst
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-09 0:06 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-09 0:06 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:23PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Formalise the binding for the PCI controllers in the Freescale MPC8xxx
> chip family. Information about PCI-X-specific properties was taken from
> fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
> xpedite5200_xmon.dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
> - regroup compatible strings, list single-item values in one enum
> - trim subject line (remove "binding")
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
> Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
> 2 files changed, 115 insertions(+), 27 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
> +
> +description: |
> + Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
> + See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
This is obviously a bit wrong; I ended up putting the information from
fsl,pci.txt entirely under the fsl,pci-agent-force-enum property, but
forgot to remove the reference to the old txt file.
> +properties:
[...]
> + fsl,pci-agent-force-enum:
> + type: boolean
> + description:
> + Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
> + prevented from enumerating the bus. The PrPMC form-factor requires all
> + mezzanines to be PCI-X Agents, but one per system may still enumerate the
> + bus.
> +
> + This property allows a PCI-X bridge to be used for bus enumeration
> + despite being strapped into Agent mode.
> +
> +required:
> + - reg
> + - compatible
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
@ 2025-02-09 0:06 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-09 0:06 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:23PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Formalise the binding for the PCI controllers in the Freescale MPC8xxx
> chip family. Information about PCI-X-specific properties was taken from
> fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
> xpedite5200_xmon.dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
> - regroup compatible strings, list single-item values in one enum
> - trim subject line (remove "binding")
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
> Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
> 2 files changed, 115 insertions(+), 27 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
> +
> +description: |
> + Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
> + See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
This is obviously a bit wrong; I ended up putting the information from
fsl,pci.txt entirely under the fsl,pci-agent-force-enum property, but
forgot to remove the reference to the old txt file.
> +properties:
[...]
> + fsl,pci-agent-force-enum:
> + type: boolean
> + description:
> + Typically any Freescale PCI-X bridge hardware strapped into Agent mode is
> + prevented from enumerating the bus. The PrPMC form-factor requires all
> + mezzanines to be PCI-X Agents, but one per system may still enumerate the
> + bus.
> +
> + This property allows a PCI-X bridge to be used for bus enumeration
> + despite being strapped into Agent mode.
> +
> +required:
> + - reg
> + - compatible
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
2025-02-09 0:06 ` J. Neuschäfer
@ 2025-02-10 21:25 ` Rob Herring
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-10 21:25 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Sun, Feb 09, 2025 at 12:06:59AM +0000, J. Neuschäfer wrote:
> On Fri, Feb 07, 2025 at 10:30:23PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > Formalise the binding for the PCI controllers in the Freescale MPC8xxx
> > chip family. Information about PCI-X-specific properties was taken from
> > fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
> > xpedite5200_xmon.dts.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
> > - regroup compatible strings, list single-item values in one enum
> > - trim subject line (remove "binding")
> > - fix property order to comply with dts coding style
> > ---
> > .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
> > Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
> > 2 files changed, 115 insertions(+), 27 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> > @@ -0,0 +1,115 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +
> > +$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
> > +
> > +description: |
> > + Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
> > + See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
>
> This is obviously a bit wrong; I ended up putting the information from
> fsl,pci.txt entirely under the fsl,pci-agent-force-enum property, but
> forgot to remove the reference to the old txt file.
Looks fine other than that.
Rob
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie to YAML
@ 2025-02-10 21:25 ` Rob Herring
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-10 21:25 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Sun, Feb 09, 2025 at 12:06:59AM +0000, J. Neuschäfer wrote:
> On Fri, Feb 07, 2025 at 10:30:23PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > Formalise the binding for the PCI controllers in the Freescale MPC8xxx
> > chip family. Information about PCI-X-specific properties was taken from
> > fsl,pci.txt. The examples were taken from mpc8315erdb.dts and
> > xpedite5200_xmon.dts.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - merge fsl,pci.txt into fsl,mpc8xxx-pci.yaml
> > - regroup compatible strings, list single-item values in one enum
> > - trim subject line (remove "binding")
> > - fix property order to comply with dts coding style
> > ---
> > .../devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml | 115 +++++++++++++++++++++
> > Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 -----
> > 2 files changed, 115 insertions(+), 27 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..57c5503cec47e6e90ed2b09835bfad10309db927
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/fsl,mpc8xxx-pci.yaml
> > @@ -0,0 +1,115 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +
> > +$id: http://devicetree.org/schemas/pci/fsl,mpc8xxx-pci.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Freescale MPC83xx PCI/PCI-X/PCIe controllers
> > +
> > +description: |
> > + Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs.
> > + See also: Documentation/devicetree/bindings/pci/fsl,pci.txt
>
> This is obviously a bit wrong; I ended up putting the information from
> fsl,pci.txt entirely under the fsl,pci-agent-force-enum property, but
> forgot to remove the reference to the old txt file.
Looks fine other than that.
Rob
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 07/12] dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Convert mpc83xx-wdt.txt to YAML to enable automatic schema validation.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 ---------
.../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 ++++++++++++++++++++++
2 files changed, 64 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt
deleted file mode 100644
index a384ff5b3ce8c62d813fc23d72f74e2158ff543e..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx)
-
-Required properties:
-- compatible: Shall contain one of the following:
- "mpc83xx_wdt" for an mpc83xx
- "fsl,mpc8610-wdt" for an mpc86xx
- "fsl,mpc823-wdt" for an mpc8xx
-- reg: base physical address and length of the area hosting the
- watchdog registers.
- On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
- On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
- On the 8xx, "General System Interface Unit" area: <0x0 0x10>
-
-Optional properties:
-- reg: additional physical address and length (4) of location of the
- Reset Status Register (called RSTRSCR on the mpc86xx)
- On the 83xx, it is located at offset 0x910
- On the 86xx, it is located at offset 0xe0094
- On the 8xx, it is located at offset 0x288
-
-Example:
- WDT: watchdog@0 {
- compatible = "fsl,mpc823-wdt";
- reg = <0x0 0x10 0x288 0x4>;
- };
diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..09e6dcf5bf186e4d15ee84f03ce64dd53155198d
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx)
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ enum:
+ - mpc83xx_wdt # for an mpc83xx
+ - fsl,mpc8610-wdt # for an mpc86xx
+ - fsl,mpc823-wdt # for an mpc8xx
+
+ device_type:
+ const: watchdog
+
+ reg:
+ minItems: 1
+ items:
+ - description: |
+ Base physical address and length of the area hosting the watchdog
+ registers.
+
+ On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
+ On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
+ On the 8xx, "General System Interface Unit" area: <0x0 0x10>
+
+ - description: |
+ Additional optional physical address and length (4) of location of
+ the Reset Status Register (called RSTRSCR on the mpc86xx)
+
+ On the 83xx, it is located at offset 0x910
+ On the 86xx, it is located at offset 0xe0094
+ On the 8xx, it is located at offset 0x288
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: watchdog.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ WDT: watchdog@0 {
+ compatible = "fsl,mpc823-wdt";
+ reg = <0x0 0x10 0x288 0x4>;
+ };
+
+ - |
+ wdt: watchdog@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ device_type = "watchdog";
+ };
+
+...
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 07/12] dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert mpc83xx-wdt.txt to YAML to enable automatic schema validation.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 ---------
.../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 ++++++++++++++++++++++
2 files changed, 64 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt
deleted file mode 100644
index a384ff5b3ce8c62d813fc23d72f74e2158ff543e..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx)
-
-Required properties:
-- compatible: Shall contain one of the following:
- "mpc83xx_wdt" for an mpc83xx
- "fsl,mpc8610-wdt" for an mpc86xx
- "fsl,mpc823-wdt" for an mpc8xx
-- reg: base physical address and length of the area hosting the
- watchdog registers.
- On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
- On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
- On the 8xx, "General System Interface Unit" area: <0x0 0x10>
-
-Optional properties:
-- reg: additional physical address and length (4) of location of the
- Reset Status Register (called RSTRSCR on the mpc86xx)
- On the 83xx, it is located at offset 0x910
- On the 86xx, it is located at offset 0xe0094
- On the 8xx, it is located at offset 0x288
-
-Example:
- WDT: watchdog@0 {
- compatible = "fsl,mpc823-wdt";
- reg = <0x0 0x10 0x288 0x4>;
- };
diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..09e6dcf5bf186e4d15ee84f03ce64dd53155198d
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx)
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ enum:
+ - mpc83xx_wdt # for an mpc83xx
+ - fsl,mpc8610-wdt # for an mpc86xx
+ - fsl,mpc823-wdt # for an mpc8xx
+
+ device_type:
+ const: watchdog
+
+ reg:
+ minItems: 1
+ items:
+ - description: |
+ Base physical address and length of the area hosting the watchdog
+ registers.
+
+ On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
+ On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
+ On the 8xx, "General System Interface Unit" area: <0x0 0x10>
+
+ - description: |
+ Additional optional physical address and length (4) of location of
+ the Reset Status Register (called RSTRSCR on the mpc86xx)
+
+ On the 83xx, it is located at offset 0x910
+ On the 86xx, it is located at offset 0xe0094
+ On the 8xx, it is located at offset 0x288
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: watchdog.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ WDT: watchdog@0 {
+ compatible = "fsl,mpc823-wdt";
+ reg = <0x0 0x10 0x288 0x4>;
+ };
+
+ - |
+ wdt: watchdog@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ device_type = "watchdog";
+ };
+
+...
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 07/12] dt-bindings: watchdog: Convert mpc8xxx-wdt to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert mpc83xx-wdt.txt to YAML to enable automatic schema validation.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- trim subject line (remove "binding")
- fix property order to comply with dts coding style
---
.../devicetree/bindings/watchdog/mpc8xxx-wdt.txt | 25 ---------
.../devicetree/bindings/watchdog/mpc8xxx-wdt.yaml | 64 ++++++++++++++++++++++
2 files changed, 64 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt
deleted file mode 100644
index a384ff5b3ce8c62d813fc23d72f74e2158ff543e..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx)
-
-Required properties:
-- compatible: Shall contain one of the following:
- "mpc83xx_wdt" for an mpc83xx
- "fsl,mpc8610-wdt" for an mpc86xx
- "fsl,mpc823-wdt" for an mpc8xx
-- reg: base physical address and length of the area hosting the
- watchdog registers.
- On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
- On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
- On the 8xx, "General System Interface Unit" area: <0x0 0x10>
-
-Optional properties:
-- reg: additional physical address and length (4) of location of the
- Reset Status Register (called RSTRSCR on the mpc86xx)
- On the 83xx, it is located at offset 0x910
- On the 86xx, it is located at offset 0xe0094
- On the 8xx, it is located at offset 0x288
-
-Example:
- WDT: watchdog@0 {
- compatible = "fsl,mpc823-wdt";
- reg = <0x0 0x10 0x288 0x4>;
- };
diff --git a/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..09e6dcf5bf186e4d15ee84f03ce64dd53155198d
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/mpc8xxx-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MPC8xxx watchdog timer (For 83xx, 86xx and 8xx)
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ enum:
+ - mpc83xx_wdt # for an mpc83xx
+ - fsl,mpc8610-wdt # for an mpc86xx
+ - fsl,mpc823-wdt # for an mpc8xx
+
+ device_type:
+ const: watchdog
+
+ reg:
+ minItems: 1
+ items:
+ - description: |
+ Base physical address and length of the area hosting the watchdog
+ registers.
+
+ On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
+ On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
+ On the 8xx, "General System Interface Unit" area: <0x0 0x10>
+
+ - description: |
+ Additional optional physical address and length (4) of location of
+ the Reset Status Register (called RSTRSCR on the mpc86xx)
+
+ On the 83xx, it is located at offset 0x910
+ On the 86xx, it is located at offset 0xe0094
+ On the 8xx, it is located at offset 0x288
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: watchdog.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ WDT: watchdog@0 {
+ compatible = "fsl,mpc823-wdt";
+ reg = <0x0 0x10 0x288 0x4>;
+ };
+
+ - |
+ wdt: watchdog@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ device_type = "watchdog";
+ };
+
+...
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread
* [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
contollers. Convert them to YAML.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- add missing end-of-document ("...") markers
- add missing constraints to interrupts, fsl,espi-num-chipselects,
fsl,csbef and fsl,csaft properties
- remove unnecessary type from clock-frequency property
- fix property order to comply with dts coding style
---
.../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
3 files changed, 137 insertions(+), 62 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ const: fsl,mpc8536-espi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,espi-num-chipselects:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 4 ]
+ description: The number of the chipselect signals.
+
+ fsl,csbef:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+ description: Chip select assertion time in bits before frame starts
+
+ fsl,csaft:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+ description: Chip select negation time in bits after frame ends
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - fsl,espi-num-chipselects
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@110000 {
+ compatible = "fsl,mpc8536-espi";
+ reg = <0x110000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <53 0x2>;
+ interrupt-parent = <&mpic>;
+ fsl,espi-num-chipselects = <4>;
+ fsl,csbef = <1>;
+ fsl,csaft = <1>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/spi/fsl,spi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..db65c0560c32f32324a2aaaf53c0044a4b56f3d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/fsl,spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale SPI (Serial Peripheral Interface) controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ enum:
+ - fsl,spi
+ - aeroflexgaisler,spictrl
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ QE SPI subblock index.
+ 0: QE subblock SPI1
+ 1: QE subblock SPI2
+
+ mode:
+ description: SPI operation mode
+ enum:
+ - cpu
+ - cpu-qe
+
+ interrupts:
+ maxItems: 1
+
+ clock-frequency:
+ description: input clock frequency to non FSL_SOC cores
+
+ cs-gpios: true
+
+ fsl,spisel_boot:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used
+ as chip select for a slave device. Use reg = <number of gpios> in the
+ corresponding child node, i.e. 0 if the cs-gpios property is not present.
+
+required:
+ - compatible
+ - reg
+ - mode
+ - interrupts
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@4c0 {
+ compatible = "fsl,spi";
+ reg = <0x4c0 0x40>;
+ cell-index = <0>;
+ interrupts = <82 0>;
+ interrupt-parent = <&intc>;
+ mode = "cpu";
+ cs-gpios = <&gpio 18 1 // device reg=<0>
+ &gpio 19 1>; // device reg=<1>
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/spi/fsl-spi.txt b/Documentation/devicetree/bindings/spi/fsl-spi.txt
deleted file mode 100644
index 0654380eb7515d8bda80eea1486e77b939ac38d8..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/spi/fsl-spi.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-* SPI (Serial Peripheral Interface)
-
-Required properties:
-- cell-index : QE SPI subblock index.
- 0: QE subblock SPI1
- 1: QE subblock SPI2
-- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
-- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
-- reg : Offset and length of the register set for the device
-- interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
-- clock-frequency : input clock frequency to non FSL_SOC cores
-
-Optional properties:
-- cs-gpios : specifies the gpio pins to be used for chipselects.
- The gpios will be referred to as reg = <index> in the SPI child nodes.
- If unspecified, a single SPI device without a chip select can be used.
-- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
- SPISEL_BOOT signal is used as chip select for a slave device. Use
- reg = <number of gpios> in the corresponding child node, i.e. 0 if
- the cs-gpios property is not present.
-
-Example:
- spi@4c0 {
- cell-index = <0>;
- compatible = "fsl,spi";
- reg = <4c0 40>;
- interrupts = <82 0>;
- interrupt-parent = <700>;
- mode = "cpu";
- cs-gpios = <&gpio 18 1 // device reg=<0>
- &gpio 19 1>; // device reg=<1>
- };
-
-
-* eSPI (Enhanced Serial Peripheral Interface)
-
-Required properties:
-- compatible : should be "fsl,mpc8536-espi".
-- reg : Offset and length of the register set for the device.
-- interrupts : should contain eSPI interrupt, the device has one interrupt.
-- fsl,espi-num-chipselects : the number of the chipselect signals.
-
-Optional properties:
-- fsl,csbef: chip select assertion time in bits before frame starts
-- fsl,csaft: chip select negation time in bits after frame ends
-
-Example:
- spi@110000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc8536-espi";
- reg = <0x110000 0x1000>;
- interrupts = <53 0x2>;
- interrupt-parent = <&mpic>;
- fsl,espi-num-chipselects = <4>;
- fsl,csbef = <1>;
- fsl,csaft = <1>;
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
contollers. Convert them to YAML.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- add missing end-of-document ("...") markers
- add missing constraints to interrupts, fsl,espi-num-chipselects,
fsl,csbef and fsl,csaft properties
- remove unnecessary type from clock-frequency property
- fix property order to comply with dts coding style
---
.../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
3 files changed, 137 insertions(+), 62 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ const: fsl,mpc8536-espi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,espi-num-chipselects:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 4 ]
+ description: The number of the chipselect signals.
+
+ fsl,csbef:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+ description: Chip select assertion time in bits before frame starts
+
+ fsl,csaft:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+ description: Chip select negation time in bits after frame ends
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - fsl,espi-num-chipselects
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@110000 {
+ compatible = "fsl,mpc8536-espi";
+ reg = <0x110000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <53 0x2>;
+ interrupt-parent = <&mpic>;
+ fsl,espi-num-chipselects = <4>;
+ fsl,csbef = <1>;
+ fsl,csaft = <1>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/spi/fsl,spi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..db65c0560c32f32324a2aaaf53c0044a4b56f3d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/fsl,spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale SPI (Serial Peripheral Interface) controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ enum:
+ - fsl,spi
+ - aeroflexgaisler,spictrl
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ QE SPI subblock index.
+ 0: QE subblock SPI1
+ 1: QE subblock SPI2
+
+ mode:
+ description: SPI operation mode
+ enum:
+ - cpu
+ - cpu-qe
+
+ interrupts:
+ maxItems: 1
+
+ clock-frequency:
+ description: input clock frequency to non FSL_SOC cores
+
+ cs-gpios: true
+
+ fsl,spisel_boot:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used
+ as chip select for a slave device. Use reg = <number of gpios> in the
+ corresponding child node, i.e. 0 if the cs-gpios property is not present.
+
+required:
+ - compatible
+ - reg
+ - mode
+ - interrupts
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@4c0 {
+ compatible = "fsl,spi";
+ reg = <0x4c0 0x40>;
+ cell-index = <0>;
+ interrupts = <82 0>;
+ interrupt-parent = <&intc>;
+ mode = "cpu";
+ cs-gpios = <&gpio 18 1 // device reg=<0>
+ &gpio 19 1>; // device reg=<1>
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/spi/fsl-spi.txt b/Documentation/devicetree/bindings/spi/fsl-spi.txt
deleted file mode 100644
index 0654380eb7515d8bda80eea1486e77b939ac38d8..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/spi/fsl-spi.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-* SPI (Serial Peripheral Interface)
-
-Required properties:
-- cell-index : QE SPI subblock index.
- 0: QE subblock SPI1
- 1: QE subblock SPI2
-- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
-- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
-- reg : Offset and length of the register set for the device
-- interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
-- clock-frequency : input clock frequency to non FSL_SOC cores
-
-Optional properties:
-- cs-gpios : specifies the gpio pins to be used for chipselects.
- The gpios will be referred to as reg = <index> in the SPI child nodes.
- If unspecified, a single SPI device without a chip select can be used.
-- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
- SPISEL_BOOT signal is used as chip select for a slave device. Use
- reg = <number of gpios> in the corresponding child node, i.e. 0 if
- the cs-gpios property is not present.
-
-Example:
- spi@4c0 {
- cell-index = <0>;
- compatible = "fsl,spi";
- reg = <4c0 40>;
- interrupts = <82 0>;
- interrupt-parent = <700>;
- mode = "cpu";
- cs-gpios = <&gpio 18 1 // device reg=<0>
- &gpio 19 1>; // device reg=<1>
- };
-
-
-* eSPI (Enhanced Serial Peripheral Interface)
-
-Required properties:
-- compatible : should be "fsl,mpc8536-espi".
-- reg : Offset and length of the register set for the device.
-- interrupts : should contain eSPI interrupt, the device has one interrupt.
-- fsl,espi-num-chipselects : the number of the chipselect signals.
-
-Optional properties:
-- fsl,csbef: chip select assertion time in bits before frame starts
-- fsl,csaft: chip select negation time in bits after frame ends
-
-Example:
- spi@110000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc8536-espi";
- reg = <0x110000 0x1000>;
- interrupts = <53 0x2>;
- interrupt-parent = <&mpic>;
- fsl,espi-num-chipselects = <4>;
- fsl,csbef = <1>;
- fsl,csaft = <1>;
- };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
contollers. Convert them to YAML.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- add missing end-of-document ("...") markers
- add missing constraints to interrupts, fsl,espi-num-chipselects,
fsl,csbef and fsl,csaft properties
- remove unnecessary type from clock-frequency property
- fix property order to comply with dts coding style
---
.../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
3 files changed, 137 insertions(+), 62 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ const: fsl,mpc8536-espi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,espi-num-chipselects:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 4 ]
+ description: The number of the chipselect signals.
+
+ fsl,csbef:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+ description: Chip select assertion time in bits before frame starts
+
+ fsl,csaft:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 15
+ description: Chip select negation time in bits after frame ends
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - fsl,espi-num-chipselects
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@110000 {
+ compatible = "fsl,mpc8536-espi";
+ reg = <0x110000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <53 0x2>;
+ interrupt-parent = <&mpic>;
+ fsl,espi-num-chipselects = <4>;
+ fsl,csbef = <1>;
+ fsl,csaft = <1>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/spi/fsl,spi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..db65c0560c32f32324a2aaaf53c0044a4b56f3d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/fsl,spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale SPI (Serial Peripheral Interface) controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ enum:
+ - fsl,spi
+ - aeroflexgaisler,spictrl
+
+ reg:
+ maxItems: 1
+
+ cell-index:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ QE SPI subblock index.
+ 0: QE subblock SPI1
+ 1: QE subblock SPI2
+
+ mode:
+ description: SPI operation mode
+ enum:
+ - cpu
+ - cpu-qe
+
+ interrupts:
+ maxItems: 1
+
+ clock-frequency:
+ description: input clock frequency to non FSL_SOC cores
+
+ cs-gpios: true
+
+ fsl,spisel_boot:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used
+ as chip select for a slave device. Use reg = <number of gpios> in the
+ corresponding child node, i.e. 0 if the cs-gpios property is not present.
+
+required:
+ - compatible
+ - reg
+ - mode
+ - interrupts
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@4c0 {
+ compatible = "fsl,spi";
+ reg = <0x4c0 0x40>;
+ cell-index = <0>;
+ interrupts = <82 0>;
+ interrupt-parent = <&intc>;
+ mode = "cpu";
+ cs-gpios = <&gpio 18 1 // device reg=<0>
+ &gpio 19 1>; // device reg=<1>
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/spi/fsl-spi.txt b/Documentation/devicetree/bindings/spi/fsl-spi.txt
deleted file mode 100644
index 0654380eb7515d8bda80eea1486e77b939ac38d8..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/spi/fsl-spi.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-* SPI (Serial Peripheral Interface)
-
-Required properties:
-- cell-index : QE SPI subblock index.
- 0: QE subblock SPI1
- 1: QE subblock SPI2
-- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
-- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
-- reg : Offset and length of the register set for the device
-- interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
-- clock-frequency : input clock frequency to non FSL_SOC cores
-
-Optional properties:
-- cs-gpios : specifies the gpio pins to be used for chipselects.
- The gpios will be referred to as reg = <index> in the SPI child nodes.
- If unspecified, a single SPI device without a chip select can be used.
-- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
- SPISEL_BOOT signal is used as chip select for a slave device. Use
- reg = <number of gpios> in the corresponding child node, i.e. 0 if
- the cs-gpios property is not present.
-
-Example:
- spi@4c0 {
- cell-index = <0>;
- compatible = "fsl,spi";
- reg = <4c0 40>;
- interrupts = <82 0>;
- interrupt-parent = <700>;
- mode = "cpu";
- cs-gpios = <&gpio 18 1 // device reg=<0>
- &gpio 19 1>; // device reg=<1>
- };
-
-
-* eSPI (Enhanced Serial Peripheral Interface)
-
-Required properties:
-- compatible : should be "fsl,mpc8536-espi".
-- reg : Offset and length of the register set for the device.
-- interrupts : should contain eSPI interrupt, the device has one interrupt.
-- fsl,espi-num-chipselects : the number of the chipselect signals.
-
-Optional properties:
-- fsl,csbef: chip select assertion time in bits before frame starts
-- fsl,csaft: chip select negation time in bits after frame ends
-
-Example:
- spi@110000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,mpc8536-espi";
- reg = <0x110000 0x1000>;
- interrupts = <53 0x2>;
- interrupt-parent = <&mpic>;
- fsl,espi-num-chipselects = <4>;
- fsl,csbef = <1>;
- fsl,csaft = <1>;
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-10 19:42 ` Frank Li
-1 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:42 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:25PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
> contollers. Convert them to YAML.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - add missing end-of-document ("...") markers
> - add missing constraints to interrupts, fsl,espi-num-chipselects,
> fsl,csbef and fsl,csaft properties
> - remove unnecessary type from clock-frequency property
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
> 3 files changed, 137 insertions(+), 62 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,mpc8536-espi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,espi-num-chipselects:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: The number of the chipselect signals.
> +
> + fsl,csbef:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select assertion time in bits before frame starts
> +
> + fsl,csaft:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select negation time in bits after frame ends
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - fsl,espi-num-chipselects
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@110000 {
> + compatible = "fsl,mpc8536-espi";
> + reg = <0x110000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <53 0x2>;
Use predefine's irq type macro.
> + interrupt-parent = <&mpic>;
> + fsl,espi-num-chipselects = <4>;
> + fsl,csbef = <1>;
> + fsl,csaft = <1>;
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/spi/fsl,spi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..db65c0560c32f32324a2aaaf53c0044a4b56f3d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,spi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SPI (Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,spi
> + - aeroflexgaisler,spictrl
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + QE SPI subblock index.
> + 0: QE subblock SPI1
> + 1: QE subblock SPI2
> +
> + mode:
> + description: SPI operation mode
> + enum:
> + - cpu
> + - cpu-qe
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-frequency:
> + description: input clock frequency to non FSL_SOC cores
> +
> + cs-gpios: true
> +
> + fsl,spisel_boot:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used
> + as chip select for a slave device. Use reg = <number of gpios> in the
> + corresponding child node, i.e. 0 if the cs-gpios property is not present.
> +
> +required:
> + - compatible
> + - reg
> + - mode
> + - interrupts
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@4c0 {
> + compatible = "fsl,spi";
> + reg = <0x4c0 0x40>;
> + cell-index = <0>;
> + interrupts = <82 0>;
> + interrupt-parent = <&intc>;
> + mode = "cpu";
> + cs-gpios = <&gpio 18 1 // device reg=<0>
> + &gpio 19 1>; // device reg=<1>
use predefine gpio level macro
Frank
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/spi/fsl-spi.txt b/Documentation/devicetree/bindings/spi/fsl-spi.txt
> deleted file mode 100644
> index 0654380eb7515d8bda80eea1486e77b939ac38d8..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/spi/fsl-spi.txt
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -* SPI (Serial Peripheral Interface)
> -
> -Required properties:
> -- cell-index : QE SPI subblock index.
> - 0: QE subblock SPI1
> - 1: QE subblock SPI2
> -- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
> -- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
> -- reg : Offset and length of the register set for the device
> -- interrupts : <a b> where a is the interrupt number and b is a
> - field that represents an encoding of the sense and level
> - information for the interrupt. This should be encoded based on
> - the information in section 2) depending on the type of interrupt
> - controller you have.
> -- clock-frequency : input clock frequency to non FSL_SOC cores
> -
> -Optional properties:
> -- cs-gpios : specifies the gpio pins to be used for chipselects.
> - The gpios will be referred to as reg = <index> in the SPI child nodes.
> - If unspecified, a single SPI device without a chip select can be used.
> -- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
> - SPISEL_BOOT signal is used as chip select for a slave device. Use
> - reg = <number of gpios> in the corresponding child node, i.e. 0 if
> - the cs-gpios property is not present.
> -
> -Example:
> - spi@4c0 {
> - cell-index = <0>;
> - compatible = "fsl,spi";
> - reg = <4c0 40>;
> - interrupts = <82 0>;
> - interrupt-parent = <700>;
> - mode = "cpu";
> - cs-gpios = <&gpio 18 1 // device reg=<0>
> - &gpio 19 1>; // device reg=<1>
> - };
> -
> -
> -* eSPI (Enhanced Serial Peripheral Interface)
> -
> -Required properties:
> -- compatible : should be "fsl,mpc8536-espi".
> -- reg : Offset and length of the register set for the device.
> -- interrupts : should contain eSPI interrupt, the device has one interrupt.
> -- fsl,espi-num-chipselects : the number of the chipselect signals.
> -
> -Optional properties:
> -- fsl,csbef: chip select assertion time in bits before frame starts
> -- fsl,csaft: chip select negation time in bits after frame ends
> -
> -Example:
> - spi@110000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "fsl,mpc8536-espi";
> - reg = <0x110000 0x1000>;
> - interrupts = <53 0x2>;
> - interrupt-parent = <&mpic>;
> - fsl,espi-num-chipselects = <4>;
> - fsl,csbef = <1>;
> - fsl,csaft = <1>;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
@ 2025-02-10 19:42 ` Frank Li
0 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:42 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:25PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
> contollers. Convert them to YAML.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - add missing end-of-document ("...") markers
> - add missing constraints to interrupts, fsl,espi-num-chipselects,
> fsl,csbef and fsl,csaft properties
> - remove unnecessary type from clock-frequency property
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
> 3 files changed, 137 insertions(+), 62 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,mpc8536-espi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,espi-num-chipselects:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: The number of the chipselect signals.
> +
> + fsl,csbef:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select assertion time in bits before frame starts
> +
> + fsl,csaft:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select negation time in bits after frame ends
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - fsl,espi-num-chipselects
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@110000 {
> + compatible = "fsl,mpc8536-espi";
> + reg = <0x110000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <53 0x2>;
Use predefine's irq type macro.
> + interrupt-parent = <&mpic>;
> + fsl,espi-num-chipselects = <4>;
> + fsl,csbef = <1>;
> + fsl,csaft = <1>;
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/spi/fsl,spi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..db65c0560c32f32324a2aaaf53c0044a4b56f3d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,spi.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,spi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale SPI (Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + enum:
> + - fsl,spi
> + - aeroflexgaisler,spictrl
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + QE SPI subblock index.
> + 0: QE subblock SPI1
> + 1: QE subblock SPI2
> +
> + mode:
> + description: SPI operation mode
> + enum:
> + - cpu
> + - cpu-qe
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-frequency:
> + description: input clock frequency to non FSL_SOC cores
> +
> + cs-gpios: true
> +
> + fsl,spisel_boot:
> + $ref: /schemas/types.yaml#/definitions/flag
> + description:
> + For the MPC8306 and MPC8309, specifies that the SPISEL_BOOT signal is used
> + as chip select for a slave device. Use reg = <number of gpios> in the
> + corresponding child node, i.e. 0 if the cs-gpios property is not present.
> +
> +required:
> + - compatible
> + - reg
> + - mode
> + - interrupts
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@4c0 {
> + compatible = "fsl,spi";
> + reg = <0x4c0 0x40>;
> + cell-index = <0>;
> + interrupts = <82 0>;
> + interrupt-parent = <&intc>;
> + mode = "cpu";
> + cs-gpios = <&gpio 18 1 // device reg=<0>
> + &gpio 19 1>; // device reg=<1>
use predefine gpio level macro
Frank
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/spi/fsl-spi.txt b/Documentation/devicetree/bindings/spi/fsl-spi.txt
> deleted file mode 100644
> index 0654380eb7515d8bda80eea1486e77b939ac38d8..0000000000000000000000000000000000000000
> --- a/Documentation/devicetree/bindings/spi/fsl-spi.txt
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -* SPI (Serial Peripheral Interface)
> -
> -Required properties:
> -- cell-index : QE SPI subblock index.
> - 0: QE subblock SPI1
> - 1: QE subblock SPI2
> -- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
> -- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
> -- reg : Offset and length of the register set for the device
> -- interrupts : <a b> where a is the interrupt number and b is a
> - field that represents an encoding of the sense and level
> - information for the interrupt. This should be encoded based on
> - the information in section 2) depending on the type of interrupt
> - controller you have.
> -- clock-frequency : input clock frequency to non FSL_SOC cores
> -
> -Optional properties:
> -- cs-gpios : specifies the gpio pins to be used for chipselects.
> - The gpios will be referred to as reg = <index> in the SPI child nodes.
> - If unspecified, a single SPI device without a chip select can be used.
> -- fsl,spisel_boot : for the MPC8306 and MPC8309, specifies that the
> - SPISEL_BOOT signal is used as chip select for a slave device. Use
> - reg = <number of gpios> in the corresponding child node, i.e. 0 if
> - the cs-gpios property is not present.
> -
> -Example:
> - spi@4c0 {
> - cell-index = <0>;
> - compatible = "fsl,spi";
> - reg = <4c0 40>;
> - interrupts = <82 0>;
> - interrupt-parent = <700>;
> - mode = "cpu";
> - cs-gpios = <&gpio 18 1 // device reg=<0>
> - &gpio 19 1>; // device reg=<1>
> - };
> -
> -
> -* eSPI (Enhanced Serial Peripheral Interface)
> -
> -Required properties:
> -- compatible : should be "fsl,mpc8536-espi".
> -- reg : Offset and length of the register set for the device.
> -- interrupts : should contain eSPI interrupt, the device has one interrupt.
> -- fsl,espi-num-chipselects : the number of the chipselect signals.
> -
> -Optional properties:
> -- fsl,csbef: chip select assertion time in bits before frame starts
> -- fsl,csaft: chip select negation time in bits after frame ends
> -
> -Example:
> - spi@110000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "fsl,mpc8536-espi";
> - reg = <0x110000 0x1000>;
> - interrupts = <53 0x2>;
> - interrupt-parent = <&mpic>;
> - fsl,espi-num-chipselects = <4>;
> - fsl,csbef = <1>;
> - fsl,csaft = <1>;
> - };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-12 19:43 ` Rob Herring
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-12 19:43 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:25PM +0100, J. Neuschäfer wrote:
> fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
> contollers. Convert them to YAML.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - add missing end-of-document ("...") markers
> - add missing constraints to interrupts, fsl,espi-num-chipselects,
> fsl,csbef and fsl,csaft properties
> - remove unnecessary type from clock-frequency property
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
> 3 files changed, 137 insertions(+), 62 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,mpc8536-espi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,espi-num-chipselects:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: The number of the chipselect signals.
> +
> + fsl,csbef:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select assertion time in bits before frame starts
> +
> + fsl,csaft:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select negation time in bits after frame ends
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - fsl,espi-num-chipselects
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@110000 {
> + compatible = "fsl,mpc8536-espi";
> + reg = <0x110000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <53 0x2>;
> + interrupt-parent = <&mpic>;
Drop interrupt-parent. Otherwise,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> + fsl,espi-num-chipselects = <4>;
> + fsl,csbef = <1>;
> + fsl,csaft = <1>;
> + };
> +
> +...
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings to YAML
@ 2025-02-12 19:43 ` Rob Herring
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-12 19:43 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:25PM +0100, J. Neuschäfer wrote:
> fsl-spi.txt contains the bindings for the fsl,spi and fsl,espi
> contollers. Convert them to YAML.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - add missing end-of-document ("...") markers
> - add missing constraints to interrupts, fsl,espi-num-chipselects,
> fsl,csbef and fsl,csaft properties
> - remove unnecessary type from clock-frequency property
> - fix property order to comply with dts coding style
> ---
> .../devicetree/bindings/spi/fsl,espi.yaml | 64 +++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl,spi.yaml | 73 ++++++++++++++++++++++
> Documentation/devicetree/bindings/spi/fsl-spi.txt | 62 ------------------
> 3 files changed, 137 insertions(+), 62 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/fsl,espi.yaml b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..c504b7957dde39086ef7d7a7550d6169cf5ec407
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/fsl,espi.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/fsl,espi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale eSPI (Enhanced Serial Peripheral Interface) controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,mpc8536-espi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + fsl,espi-num-chipselects:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 4 ]
> + description: The number of the chipselect signals.
> +
> + fsl,csbef:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select assertion time in bits before frame starts
> +
> + fsl,csaft:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 15
> + description: Chip select negation time in bits after frame ends
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - fsl,espi-num-chipselects
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi@110000 {
> + compatible = "fsl,mpc8536-espi";
> + reg = <0x110000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <53 0x2>;
> + interrupt-parent = <&mpic>;
Drop interrupt-parent. Otherwise,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> + fsl,espi-num-chipselects = <4>;
> + fsl,csbef = <1>;
> + fsl,csaft = <1>;
> + };
> +
> +...
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Convert the Freescale localbus controller bindings from text form to
YAML. The updated list of compatible strings reflects current usage
in arch/powerpc/boot/dts/, except that many existing device trees
erroneously specify "simple-bus" in addition to fsl,*elbc.
Changes compared to the txt version:
- removed the board-control (fsl,mpc8272ads-bcsr) node because it only
appears in this example and nowhere else
- added a new example with NAND flash
- updated list of compatible strings
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- fix order of properties in examples, according to dts coding style
- move to Documentation/devicetree/bindings/memory-controllers
- clarify the commit message a tiny bit
- remove unnecessary multiline markers (|)
- define address format in patternProperties
- trim subject line (remove "binding")
- remove use of "simple-bus", because it's technically incorrect
---
.../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
.../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
2 files changed, 146 insertions(+), 43 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..7bc05e3b9ac74125e5786748df57f6cc1255a62d
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml
@@ -0,0 +1,146 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Enhanced Local Bus Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ $nodename:
+ pattern: "^localbus@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8313-elbc
+ - fsl,mpc8315-elbc
+ - fsl,mpc8377-elbc
+ - fsl,mpc8378-elbc
+ - fsl,mpc8379-elbc
+ - fsl,mpc8536-elbc
+ - fsl,mpc8569-elbc
+ - fsl,mpc8572-elbc
+ - fsl,p1020-elbc
+ - fsl,p1021-elbc
+ - fsl,p1023-elbc
+ - fsl,p2020-elbc
+ - fsl,p2041-elbc
+ - fsl,p3041-elbc
+ - fsl,p4080-elbc
+ - fsl,p5020-elbc
+ - fsl,p5040-elbc
+ - const: fsl,elbc
+
+ - items:
+ - const: fsl,mpc8272-localbus
+ - const: fsl,pq2-localbus
+
+ - items:
+ - enum:
+ - fsl,mpc8247-localbus
+ - fsl,mpc8248-localbus
+ - fsl,mpc8360-localbus
+ - const: fsl,pq2pro-localbus
+
+ - items:
+ - enum:
+ - fsl,mpc8540-localbus
+ - fsl,mpc8544-lbc
+ - fsl,mpc8544-localbus
+ - fsl,mpc8548-lbc
+ - fsl,mpc8548-localbus
+ - fsl,mpc8560-localbus
+ - fsl,mpc8568-localbus
+ - const: fsl,pq3-localbus
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#address-cells":
+ enum: [2, 3]
+ description:
+ The first cell is the chipselect number, and the remaining cells are the
+ offset into the chipselect.
+
+ "#size-cells":
+ enum: [1, 2]
+ description:
+ Either one or two, depending on how large each chipselect can be.
+
+ ranges:
+ description:
+ Each range corresponds to a single chipselect, and covers the entire
+ access window as configured.
+
+patternProperties:
+ # format: name@chipselect,address
+ "^.*@[0-9a-f]+,[0-9a-f]+$":
+ type: object
+
+additionalProperties: false
+
+examples:
+ - |
+ localbus@f0010100 {
+ compatible = "fsl,mpc8272-localbus",
+ "fsl,pq2-localbus";
+ reg = <0xf0010100 0x40>;
+ ranges = <0x0 0x0 0xfe000000 0x02000000
+ 0x1 0x0 0xf4500000 0x00008000
+ 0x2 0x0 0xfd810000 0x00010000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ flash@0,0 {
+ compatible = "jedec-flash";
+ reg = <0x0 0x0 0x2000000>;
+ bank-width = <4>;
+ device-width = <1>;
+ };
+
+ simple-periph@2,0 {
+ compatible = "fsl,elbc-gpcm-uio";
+ reg = <0x2 0x0 0x10000>;
+ elbc-gpcm-br = <0xfd810800>;
+ elbc-gpcm-or = <0xffff09f7>;
+ };
+ };
+
+ - |
+ localbus@e0005000 {
+ compatible = "fsl,mpc8315-elbc", "fsl,elbc";
+ reg = <0xe0005000 0x1000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00002000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x800000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt b/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
deleted file mode 100644
index 1c80fcedebb52049721fbd61c4dd4c57133bd47c..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-* Chipselect/Local Bus
-
-Properties:
-- name : Should be localbus
-- #address-cells : Should be either two or three. The first cell is the
- chipselect number, and the remaining cells are the
- offset into the chipselect.
-- #size-cells : Either one or two, depending on how large each chipselect
- can be.
-- ranges : Each range corresponds to a single chipselect, and cover
- the entire access window as configured.
-
-Example:
- localbus@f0010100 {
- compatible = "fsl,mpc8272-localbus",
- "fsl,pq2-localbus";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0xf0010100 0x40>;
-
- ranges = <0x0 0x0 0xfe000000 0x02000000
- 0x1 0x0 0xf4500000 0x00008000
- 0x2 0x0 0xfd810000 0x00010000>;
-
- flash@0,0 {
- compatible = "jedec-flash";
- reg = <0x0 0x0 0x2000000>;
- bank-width = <4>;
- device-width = <1>;
- };
-
- board-control@1,0 {
- reg = <0x1 0x0 0x20>;
- compatible = "fsl,mpc8272ads-bcsr";
- };
-
- simple-periph@2,0 {
- compatible = "fsl,elbc-gpcm-uio";
- reg = <0x2 0x0 0x10000>;
- elbc-gpcm-br = <0xfd810800>;
- elbc-gpcm-or = <0xffff09f7>;
- };
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale localbus controller bindings from text form to
YAML. The updated list of compatible strings reflects current usage
in arch/powerpc/boot/dts/, except that many existing device trees
erroneously specify "simple-bus" in addition to fsl,*elbc.
Changes compared to the txt version:
- removed the board-control (fsl,mpc8272ads-bcsr) node because it only
appears in this example and nowhere else
- added a new example with NAND flash
- updated list of compatible strings
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- fix order of properties in examples, according to dts coding style
- move to Documentation/devicetree/bindings/memory-controllers
- clarify the commit message a tiny bit
- remove unnecessary multiline markers (|)
- define address format in patternProperties
- trim subject line (remove "binding")
- remove use of "simple-bus", because it's technically incorrect
---
.../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
.../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
2 files changed, 146 insertions(+), 43 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..7bc05e3b9ac74125e5786748df57f6cc1255a62d
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml
@@ -0,0 +1,146 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Enhanced Local Bus Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ $nodename:
+ pattern: "^localbus@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8313-elbc
+ - fsl,mpc8315-elbc
+ - fsl,mpc8377-elbc
+ - fsl,mpc8378-elbc
+ - fsl,mpc8379-elbc
+ - fsl,mpc8536-elbc
+ - fsl,mpc8569-elbc
+ - fsl,mpc8572-elbc
+ - fsl,p1020-elbc
+ - fsl,p1021-elbc
+ - fsl,p1023-elbc
+ - fsl,p2020-elbc
+ - fsl,p2041-elbc
+ - fsl,p3041-elbc
+ - fsl,p4080-elbc
+ - fsl,p5020-elbc
+ - fsl,p5040-elbc
+ - const: fsl,elbc
+
+ - items:
+ - const: fsl,mpc8272-localbus
+ - const: fsl,pq2-localbus
+
+ - items:
+ - enum:
+ - fsl,mpc8247-localbus
+ - fsl,mpc8248-localbus
+ - fsl,mpc8360-localbus
+ - const: fsl,pq2pro-localbus
+
+ - items:
+ - enum:
+ - fsl,mpc8540-localbus
+ - fsl,mpc8544-lbc
+ - fsl,mpc8544-localbus
+ - fsl,mpc8548-lbc
+ - fsl,mpc8548-localbus
+ - fsl,mpc8560-localbus
+ - fsl,mpc8568-localbus
+ - const: fsl,pq3-localbus
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#address-cells":
+ enum: [2, 3]
+ description:
+ The first cell is the chipselect number, and the remaining cells are the
+ offset into the chipselect.
+
+ "#size-cells":
+ enum: [1, 2]
+ description:
+ Either one or two, depending on how large each chipselect can be.
+
+ ranges:
+ description:
+ Each range corresponds to a single chipselect, and covers the entire
+ access window as configured.
+
+patternProperties:
+ # format: name@chipselect,address
+ "^.*@[0-9a-f]+,[0-9a-f]+$":
+ type: object
+
+additionalProperties: false
+
+examples:
+ - |
+ localbus@f0010100 {
+ compatible = "fsl,mpc8272-localbus",
+ "fsl,pq2-localbus";
+ reg = <0xf0010100 0x40>;
+ ranges = <0x0 0x0 0xfe000000 0x02000000
+ 0x1 0x0 0xf4500000 0x00008000
+ 0x2 0x0 0xfd810000 0x00010000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ flash@0,0 {
+ compatible = "jedec-flash";
+ reg = <0x0 0x0 0x2000000>;
+ bank-width = <4>;
+ device-width = <1>;
+ };
+
+ simple-periph@2,0 {
+ compatible = "fsl,elbc-gpcm-uio";
+ reg = <0x2 0x0 0x10000>;
+ elbc-gpcm-br = <0xfd810800>;
+ elbc-gpcm-or = <0xffff09f7>;
+ };
+ };
+
+ - |
+ localbus@e0005000 {
+ compatible = "fsl,mpc8315-elbc", "fsl,elbc";
+ reg = <0xe0005000 0x1000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00002000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x800000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt b/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
deleted file mode 100644
index 1c80fcedebb52049721fbd61c4dd4c57133bd47c..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-* Chipselect/Local Bus
-
-Properties:
-- name : Should be localbus
-- #address-cells : Should be either two or three. The first cell is the
- chipselect number, and the remaining cells are the
- offset into the chipselect.
-- #size-cells : Either one or two, depending on how large each chipselect
- can be.
-- ranges : Each range corresponds to a single chipselect, and cover
- the entire access window as configured.
-
-Example:
- localbus@f0010100 {
- compatible = "fsl,mpc8272-localbus",
- "fsl,pq2-localbus";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0xf0010100 0x40>;
-
- ranges = <0x0 0x0 0xfe000000 0x02000000
- 0x1 0x0 0xf4500000 0x00008000
- 0x2 0x0 0xfd810000 0x00010000>;
-
- flash@0,0 {
- compatible = "jedec-flash";
- reg = <0x0 0x0 0x2000000>;
- bank-width = <4>;
- device-width = <1>;
- };
-
- board-control@1,0 {
- reg = <0x1 0x0 0x20>;
- compatible = "fsl,mpc8272ads-bcsr";
- };
-
- simple-periph@2,0 {
- compatible = "fsl,elbc-gpcm-uio";
- reg = <0x2 0x0 0x10000>;
- elbc-gpcm-br = <0xfd810800>;
- elbc-gpcm-or = <0xffff09f7>;
- };
- };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Convert the Freescale localbus controller bindings from text form to
YAML. The updated list of compatible strings reflects current usage
in arch/powerpc/boot/dts/, except that many existing device trees
erroneously specify "simple-bus" in addition to fsl,*elbc.
Changes compared to the txt version:
- removed the board-control (fsl,mpc8272ads-bcsr) node because it only
appears in this example and nowhere else
- added a new example with NAND flash
- updated list of compatible strings
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- fix order of properties in examples, according to dts coding style
- move to Documentation/devicetree/bindings/memory-controllers
- clarify the commit message a tiny bit
- remove unnecessary multiline markers (|)
- define address format in patternProperties
- trim subject line (remove "binding")
- remove use of "simple-bus", because it's technically incorrect
---
.../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
.../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
2 files changed, 146 insertions(+), 43 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..7bc05e3b9ac74125e5786748df57f6cc1255a62d
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.yaml
@@ -0,0 +1,146 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Enhanced Local Bus Controller
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ $nodename:
+ pattern: "^localbus@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8313-elbc
+ - fsl,mpc8315-elbc
+ - fsl,mpc8377-elbc
+ - fsl,mpc8378-elbc
+ - fsl,mpc8379-elbc
+ - fsl,mpc8536-elbc
+ - fsl,mpc8569-elbc
+ - fsl,mpc8572-elbc
+ - fsl,p1020-elbc
+ - fsl,p1021-elbc
+ - fsl,p1023-elbc
+ - fsl,p2020-elbc
+ - fsl,p2041-elbc
+ - fsl,p3041-elbc
+ - fsl,p4080-elbc
+ - fsl,p5020-elbc
+ - fsl,p5040-elbc
+ - const: fsl,elbc
+
+ - items:
+ - const: fsl,mpc8272-localbus
+ - const: fsl,pq2-localbus
+
+ - items:
+ - enum:
+ - fsl,mpc8247-localbus
+ - fsl,mpc8248-localbus
+ - fsl,mpc8360-localbus
+ - const: fsl,pq2pro-localbus
+
+ - items:
+ - enum:
+ - fsl,mpc8540-localbus
+ - fsl,mpc8544-lbc
+ - fsl,mpc8544-localbus
+ - fsl,mpc8548-lbc
+ - fsl,mpc8548-localbus
+ - fsl,mpc8560-localbus
+ - fsl,mpc8568-localbus
+ - const: fsl,pq3-localbus
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#address-cells":
+ enum: [2, 3]
+ description:
+ The first cell is the chipselect number, and the remaining cells are the
+ offset into the chipselect.
+
+ "#size-cells":
+ enum: [1, 2]
+ description:
+ Either one or two, depending on how large each chipselect can be.
+
+ ranges:
+ description:
+ Each range corresponds to a single chipselect, and covers the entire
+ access window as configured.
+
+patternProperties:
+ # format: name@chipselect,address
+ "^.*@[0-9a-f]+,[0-9a-f]+$":
+ type: object
+
+additionalProperties: false
+
+examples:
+ - |
+ localbus@f0010100 {
+ compatible = "fsl,mpc8272-localbus",
+ "fsl,pq2-localbus";
+ reg = <0xf0010100 0x40>;
+ ranges = <0x0 0x0 0xfe000000 0x02000000
+ 0x1 0x0 0xf4500000 0x00008000
+ 0x2 0x0 0xfd810000 0x00010000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ flash@0,0 {
+ compatible = "jedec-flash";
+ reg = <0x0 0x0 0x2000000>;
+ bank-width = <4>;
+ device-width = <1>;
+ };
+
+ simple-periph@2,0 {
+ compatible = "fsl,elbc-gpcm-uio";
+ reg = <0x2 0x0 0x10000>;
+ elbc-gpcm-br = <0xfd810800>;
+ elbc-gpcm-or = <0xffff09f7>;
+ };
+ };
+
+ - |
+ localbus@e0005000 {
+ compatible = "fsl,mpc8315-elbc", "fsl,elbc";
+ reg = <0xe0005000 0x1000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00002000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x800000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt b/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
deleted file mode 100644
index 1c80fcedebb52049721fbd61c4dd4c57133bd47c..0000000000000000000000000000000000000000
--- a/Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-* Chipselect/Local Bus
-
-Properties:
-- name : Should be localbus
-- #address-cells : Should be either two or three. The first cell is the
- chipselect number, and the remaining cells are the
- offset into the chipselect.
-- #size-cells : Either one or two, depending on how large each chipselect
- can be.
-- ranges : Each range corresponds to a single chipselect, and cover
- the entire access window as configured.
-
-Example:
- localbus@f0010100 {
- compatible = "fsl,mpc8272-localbus",
- "fsl,pq2-localbus";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <0xf0010100 0x40>;
-
- ranges = <0x0 0x0 0xfe000000 0x02000000
- 0x1 0x0 0xf4500000 0x00008000
- 0x2 0x0 0xfd810000 0x00010000>;
-
- flash@0,0 {
- compatible = "jedec-flash";
- reg = <0x0 0x0 0x2000000>;
- bank-width = <4>;
- device-width = <1>;
- };
-
- board-control@1,0 {
- reg = <0x1 0x0 0x20>;
- compatible = "fsl,mpc8272ads-bcsr";
- };
-
- simple-periph@2,0 {
- compatible = "fsl,elbc-gpcm-uio";
- reg = <0x2 0x0 0x10000>;
- elbc-gpcm-br = <0xfd810800>;
- elbc-gpcm-or = <0xffff09f7>;
- };
- };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-07 23:44 ` Rob Herring (Arm)
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-07 23:44 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Mark Brown, Damien Le Moal, Conor Dooley, linux-ide,
David S. Miller, linux-crypto, Vinod Koul, dmaengine, Herbert Xu,
linuxppc-dev, linux-spi, J. Neuschäfer, Guenter Roeck,
Nicholas Piggin, Madhavan Srinivasan, Krzysztof Kozlowski,
Krzysztof Wilczyński, Bjorn Helgaas, Naveen N Rao,
Vignesh Raghavendra, imx, Niklas Cassel, Scott Wood,
Michael Ellerman, Richard Weinberger, Lorenzo Pieralisi,
Lee Jones, linux-watchdog, devicetree, Krzysztof Kozlowski,
linux-mtd, Manivannan Sadhasivam, Christophe Leroy,
Wim Van Sebroeck, linux-kernel, Miquel Raynal, linux-pci
On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
> Convert the Freescale localbus controller bindings from text form to
> YAML. The updated list of compatible strings reflects current usage
> in arch/powerpc/boot/dts/, except that many existing device trees
> erroneously specify "simple-bus" in addition to fsl,*elbc.
>
> Changes compared to the txt version:
> - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> appears in this example and nowhere else
> - added a new example with NAND flash
> - updated list of compatible strings
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - fix order of properties in examples, according to dts coding style
> - move to Documentation/devicetree/bindings/memory-controllers
> - clarify the commit message a tiny bit
> - remove unnecessary multiline markers (|)
> - define address format in patternProperties
> - trim subject line (remove "binding")
> - remove use of "simple-bus", because it's technically incorrect
> ---
> .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
> .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
> 2 files changed, 146 insertions(+), 43 deletions(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/display/ssd1289fb.txt references a file that doesn't exist: Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
Documentation/devicetree/bindings/display/ssd1289fb.txt: Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250207-ppcyaml-v2-9-8137b0c42526@posteo.net
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-07 23:44 ` Rob Herring (Arm)
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-07 23:44 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Mark Brown, Damien Le Moal, Conor Dooley, linux-ide,
David S. Miller, linux-crypto, Vinod Koul, dmaengine, Herbert Xu,
linuxppc-dev, linux-spi, J. Neuschäfer, Guenter Roeck,
Nicholas Piggin, Madhavan Srinivasan, Krzysztof Kozlowski,
Krzysztof Wilczyński, Bjorn Helgaas, Naveen N Rao,
Vignesh Raghavendra, imx, Niklas Cassel, Scott Wood,
Michael Ellerman, Richard Weinberger, Lorenzo Pieralisi,
Lee Jones, linux-watchdog, devicetree, Krzysztof Kozlowski,
linux-mtd, Manivannan Sadhasivam, Christophe Leroy,
Wim Van Sebroeck, linux-kernel, Miquel Raynal, linux-pci
On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
> Convert the Freescale localbus controller bindings from text form to
> YAML. The updated list of compatible strings reflects current usage
> in arch/powerpc/boot/dts/, except that many existing device trees
> erroneously specify "simple-bus" in addition to fsl,*elbc.
>
> Changes compared to the txt version:
> - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> appears in this example and nowhere else
> - added a new example with NAND flash
> - updated list of compatible strings
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - fix order of properties in examples, according to dts coding style
> - move to Documentation/devicetree/bindings/memory-controllers
> - clarify the commit message a tiny bit
> - remove unnecessary multiline markers (|)
> - define address format in patternProperties
> - trim subject line (remove "binding")
> - remove use of "simple-bus", because it's technically incorrect
> ---
> .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
> .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
> 2 files changed, 146 insertions(+), 43 deletions(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/display/ssd1289fb.txt references a file that doesn't exist: Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
Documentation/devicetree/bindings/display/ssd1289fb.txt: Documentation/devicetree/bindings/powerpc/fsl/lbc.txt
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250207-ppcyaml-v2-9-8137b0c42526@posteo.net
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-07 23:44 ` Rob Herring (Arm)
@ 2025-02-09 17:28 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-09 17:28 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: J. Neuschäfer, Mark Brown, Damien Le Moal, Conor Dooley,
linux-ide, David S. Miller, linux-crypto, Vinod Koul, dmaengine,
Herbert Xu, linuxppc-dev, linux-spi, J. Neuschäfer,
Guenter Roeck, Nicholas Piggin, Madhavan Srinivasan,
Krzysztof Kozlowski, Krzysztof Wilczyński, Bjorn Helgaas,
Naveen N Rao, Vignesh Raghavendra, imx, Niklas Cassel, Scott Wood,
Michael Ellerman, Richard Weinberger, Lorenzo Pieralisi,
Lee Jones, linux-watchdog, devicetree, Krzysztof Kozlowski,
linux-mtd, Manivannan Sadhasivam, Christophe Leroy,
Wim Van Sebroeck, linux-kernel, Miquel Raynal, linux-pci
On Fri, Feb 07, 2025 at 05:44:59PM -0600, Rob Herring (Arm) wrote:
> On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
[...]
> > .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
> > .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
> > 2 files changed, 146 insertions(+), 43 deletions(-)
[...]
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
I think this is due to how the patches are ordered in the series.
This patch uses fsl,elbc-gpcm-uio and fsl,elbc-fcm-nand in examples, but
comes before the patches that define the corresponding bindings.
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-09 17:28 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-09 17:28 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: J. Neuschäfer, Mark Brown, Damien Le Moal, Conor Dooley,
linux-ide, David S. Miller, linux-crypto, Vinod Koul, dmaengine,
Herbert Xu, linuxppc-dev, linux-spi, J. Neuschäfer,
Guenter Roeck, Nicholas Piggin, Madhavan Srinivasan,
Krzysztof Kozlowski, Krzysztof Wilczyński, Bjorn Helgaas,
Naveen N Rao, Vignesh Raghavendra, imx, Niklas Cassel, Scott Wood,
Michael Ellerman, Richard Weinberger, Lorenzo Pieralisi,
Lee Jones, linux-watchdog, devicetree, Krzysztof Kozlowski,
linux-mtd, Manivannan Sadhasivam, Christophe Leroy,
Wim Van Sebroeck, linux-kernel, Miquel Raynal, linux-pci
On Fri, Feb 07, 2025 at 05:44:59PM -0600, Rob Herring (Arm) wrote:
> On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
[...]
> > .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
> > .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
> > 2 files changed, 146 insertions(+), 43 deletions(-)
[...]
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
I think this is due to how the patches are ordered in the series.
This patch uses fsl,elbc-gpcm-uio and fsl,elbc-fcm-nand in examples, but
comes before the patches that define the corresponding bindings.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-09 17:28 ` J. Neuschäfer
@ 2025-02-09 17:30 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 117+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-09 17:30 UTC (permalink / raw)
To: J. Neuschäfer, Rob Herring (Arm)
Cc: Mark Brown, Damien Le Moal, Conor Dooley, linux-ide,
David S. Miller, linux-crypto, Vinod Koul, dmaengine, Herbert Xu,
linuxppc-dev, linux-spi, J. Neuschäfer, Guenter Roeck,
Nicholas Piggin, Madhavan Srinivasan, Krzysztof Wilczyński,
Bjorn Helgaas, Naveen N Rao, Vignesh Raghavendra, imx,
Niklas Cassel, Scott Wood, Michael Ellerman, Richard Weinberger,
Lorenzo Pieralisi, Lee Jones, linux-watchdog, devicetree,
Krzysztof Kozlowski, linux-mtd, Manivannan Sadhasivam,
Christophe Leroy, Wim Van Sebroeck, linux-kernel, Miquel Raynal,
linux-pci
On 09/02/2025 18:28, J. Neuschäfer wrote:
> On Fri, Feb 07, 2025 at 05:44:59PM -0600, Rob Herring (Arm) wrote:
>> On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
> [...]
>>> .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
>>> .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
>>> 2 files changed, 146 insertions(+), 43 deletions(-)
> [...]
>> dtschema/dtc warnings/errors:
>> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
>> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
>> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
>
> I think this is due to how the patches are ordered in the series.
If that's possible, this should be fixed, e.g. by re-ordering the patches.
> This patch uses fsl,elbc-gpcm-uio and fsl,elbc-fcm-nand in examples, but
> comes before the patches that define the corresponding bindings.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-09 17:30 ` Krzysztof Kozlowski
0 siblings, 0 replies; 117+ messages in thread
From: Krzysztof Kozlowski @ 2025-02-09 17:30 UTC (permalink / raw)
To: J. Neuschäfer, Rob Herring (Arm)
Cc: Mark Brown, Damien Le Moal, Conor Dooley, linux-ide,
David S. Miller, linux-crypto, Vinod Koul, dmaengine, Herbert Xu,
linuxppc-dev, linux-spi, J. Neuschäfer, Guenter Roeck,
Nicholas Piggin, Madhavan Srinivasan, Krzysztof Wilczyński,
Bjorn Helgaas, Naveen N Rao, Vignesh Raghavendra, imx,
Niklas Cassel, Scott Wood, Michael Ellerman, Richard Weinberger,
Lorenzo Pieralisi, Lee Jones, linux-watchdog, devicetree,
Krzysztof Kozlowski, linux-mtd, Manivannan Sadhasivam,
Christophe Leroy, Wim Van Sebroeck, linux-kernel, Miquel Raynal,
linux-pci
On 09/02/2025 18:28, J. Neuschäfer wrote:
> On Fri, Feb 07, 2025 at 05:44:59PM -0600, Rob Herring (Arm) wrote:
>> On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
> [...]
>>> .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
>>> .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
>>> 2 files changed, 146 insertions(+), 43 deletions(-)
> [...]
>> dtschema/dtc warnings/errors:
>> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
>> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
>> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
>
> I think this is due to how the patches are ordered in the series.
If that's possible, this should be fixed, e.g. by re-ordering the patches.
> This patch uses fsl,elbc-gpcm-uio and fsl,elbc-fcm-nand in examples, but
> comes before the patches that define the corresponding bindings.
Best regards,
Krzysztof
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-09 17:30 ` Krzysztof Kozlowski
@ 2025-02-09 17:45 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-09 17:45 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: J. Neuschäfer, Rob Herring (Arm), Mark Brown, Damien Le Moal,
Conor Dooley, linux-ide, David S. Miller, linux-crypto,
Vinod Koul, dmaengine, Herbert Xu, linuxppc-dev, linux-spi,
J. Neuschäfer, Guenter Roeck, Nicholas Piggin,
Madhavan Srinivasan, Krzysztof Wilczyński, Bjorn Helgaas,
Naveen N Rao, Vignesh Raghavendra, imx, Niklas Cassel, Scott Wood,
Michael Ellerman, Richard Weinberger, Lorenzo Pieralisi,
Lee Jones, linux-watchdog, devicetree, Krzysztof Kozlowski,
linux-mtd, Manivannan Sadhasivam, Christophe Leroy,
Wim Van Sebroeck, linux-kernel, Miquel Raynal, linux-pci
On Sun, Feb 09, 2025 at 06:30:44PM +0100, Krzysztof Kozlowski wrote:
> On 09/02/2025 18:28, J. Neuschäfer wrote:
> > On Fri, Feb 07, 2025 at 05:44:59PM -0600, Rob Herring (Arm) wrote:
> >> On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
> > [...]
> >>> .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
> >>> .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
> >>> 2 files changed, 146 insertions(+), 43 deletions(-)
> > [...]
> >> dtschema/dtc warnings/errors:
> >> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
> >> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
> >> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
> >
> > I think this is due to how the patches are ordered in the series.
>
> If that's possible, this should be fixed, e.g. by re-ordering the patches.
Yes, I'll do that for the next iteration
Best regards,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-09 17:45 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-09 17:45 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: J. Neuschäfer, Rob Herring (Arm), Mark Brown, Damien Le Moal,
Conor Dooley, linux-ide, David S. Miller, linux-crypto,
Vinod Koul, dmaengine, Herbert Xu, linuxppc-dev, linux-spi,
J. Neuschäfer, Guenter Roeck, Nicholas Piggin,
Madhavan Srinivasan, Krzysztof Wilczyński, Bjorn Helgaas,
Naveen N Rao, Vignesh Raghavendra, imx, Niklas Cassel, Scott Wood,
Michael Ellerman, Richard Weinberger, Lorenzo Pieralisi,
Lee Jones, linux-watchdog, devicetree, Krzysztof Kozlowski,
linux-mtd, Manivannan Sadhasivam, Christophe Leroy,
Wim Van Sebroeck, linux-kernel, Miquel Raynal, linux-pci
On Sun, Feb 09, 2025 at 06:30:44PM +0100, Krzysztof Kozlowski wrote:
> On 09/02/2025 18:28, J. Neuschäfer wrote:
> > On Fri, Feb 07, 2025 at 05:44:59PM -0600, Rob Herring (Arm) wrote:
> >> On Fri, 07 Feb 2025 22:30:26 +0100, J. Neuschäfer wrote:
> > [...]
> >>> .../bindings/memory-controllers/fsl,elbc.yaml | 146 +++++++++++++++++++++
> >>> .../devicetree/bindings/powerpc/fsl/lbc.txt | 43 ------
> >>> 2 files changed, 146 insertions(+), 43 deletions(-)
> > [...]
> >> dtschema/dtc warnings/errors:
> >> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-0/localbus@f0010100/simple-periph@2,0: failed to match any schema with compatible: ['fsl,elbc-gpcm-uio']
> >> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
> >> Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: /example-1/localbus@e0005000/nand@1,0: failed to match any schema with compatible: ['fsl,mpc8315-fcm-nand', 'fsl,elbc-fcm-nand']
> >
> > I think this is due to how the patches are ordered in the series.
>
> If that's possible, this should be fixed, e.g. by re-ordering the patches.
Yes, I'll do that for the next iteration
Best regards,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-09 20:31 ` Crystal Wood
-1 siblings, 0 replies; 117+ messages in thread
From: Crystal Wood @ 2025-02-09 20:31 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale localbus controller bindings from text form to
> YAML. The updated list of compatible strings reflects current usage
> in arch/powerpc/boot/dts/, except that many existing device trees
> erroneously specify "simple-bus" in addition to fsl,*elbc.
>
> Changes compared to the txt version:
> - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> appears in this example and nowhere else
> - added a new example with NAND flash
> - updated list of compatible strings
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - fix order of properties in examples, according to dts coding style
> - move to Documentation/devicetree/bindings/memory-controllers
> - clarify the commit message a tiny bit
> - remove unnecessary multiline markers (|)
> - define address format in patternProperties
> - trim subject line (remove "binding")
> - remove use of "simple-bus", because it's technically incorrect
While I admit I haven't been following recent developments in this area,
as someone who was involved when "simple-bus" was created (and was on the
ePAPR committee that standardized it) I'm surprised to hear simple-bus
being called "erroneous" or "technically incorrect" here.
For non-NAND devices this bus generally meets the definition of "an
internal I/O bus that cannot be probed for devices" where "devices on the
bus can be accessed directly without additional configuration
required". NAND flash is an exception, but those devices have
compatibles that are specific to the bus controller.
The fact that the address encoding is non-linear is irrelevant; the
addresses can still be translated using the standard "ranges" mechanism.
This seems to be a disconnect between the schema verification and the way
the compatible has previously been defined and used.
And as a practical matter, unless I'm missing something (which I might be
since I haven't been in devicetree-land for nearly a decade), Linux is
relying on simple-bus to probe these devices. There is a driver that
binds to the bus itself but that is just for error interrupts and NAND.
You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
fsl_ifc: populate child devices without relying on simple-bus") and the
subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
nodes of buses and mfd devices")...
I'm curious what the reasoning was for removing simple-bus from IFC. It
seems that the schema verification also played a role in that:
https://www.spinics.net/lists/devicetree/msg220418.html
...but there's also the comment in 985ede63a045eabf3f9d ("dt-bindings:
memory: fsl: convert ifc binding to yaml schema") that "this will help to
enforce the correct probe order between parent device and child devices",
but was that really not already guaranteed by the parent/child
relationship (and again, it should only really matter for NAND except for
the possibility of missing error reports during early boot)?
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8313-elbc
> + - fsl,mpc8315-elbc
> + - fsl,mpc8377-elbc
> + - fsl,mpc8378-elbc
> + - fsl,mpc8379-elbc
> + - fsl,mpc8536-elbc
> + - fsl,mpc8569-elbc
> + - fsl,mpc8572-elbc
> + - fsl,p1020-elbc
> + - fsl,p1021-elbc
> + - fsl,p1023-elbc
> + - fsl,p2020-elbc
> + - fsl,p2041-elbc
> + - fsl,p3041-elbc
> + - fsl,p4080-elbc
> + - fsl,p5020-elbc
> + - fsl,p5040-elbc
> + - const: fsl,elbc
Is it really necessary to list every single chip?
And then it would need to be updated when new ones came out? I know this
particular line of chips is not going to see any new members at this
point, but as far as the general approach goes...
Does the schema validation complain if it sees an extra compatible it
doesn't recognize? If so that's obnoxious.
> +examples:
> + - |
> + localbus@f0010100 {
> + compatible = "fsl,mpc8272-localbus",
> + "fsl,pq2-localbus";
> + reg = <0xf0010100 0x40>;
> + ranges = <0x0 0x0 0xfe000000 0x02000000
> + 0x1 0x0 0xf4500000 0x00008000
> + 0x2 0x0 0xfd810000 0x00010000>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + flash@0,0 {
> + compatible = "jedec-flash";
> + reg = <0x0 0x0 0x2000000>;
> + bank-width = <4>;
> + device-width = <1>;
> + };
> +
> + simple-periph@2,0 {
> + compatible = "fsl,elbc-gpcm-uio";
> + reg = <0x2 0x0 0x10000>;
> + elbc-gpcm-br = <0xfd810800>;
> + elbc-gpcm-or = <0xffff09f7>;
> + };
I know this isn't new, but... since we're using this as an example,
where is the documentation for this fsl,elbc-gpcm-uio and
elbc-gpcm-br/or? What exactly is a simple-periph?
There are no in-tree device trees that use this either. The bcsr
node was actually a much more normal example, despite that particular
platform having been removed. There are other bcsr nodes that still
exist that could be used instead.
-Crystal
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-09 20:31 ` Crystal Wood
0 siblings, 0 replies; 117+ messages in thread
From: Crystal Wood @ 2025-02-09 20:31 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Convert the Freescale localbus controller bindings from text form to
> YAML. The updated list of compatible strings reflects current usage
> in arch/powerpc/boot/dts/, except that many existing device trees
> erroneously specify "simple-bus" in addition to fsl,*elbc.
>
> Changes compared to the txt version:
> - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> appears in this example and nowhere else
> - added a new example with NAND flash
> - updated list of compatible strings
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - fix order of properties in examples, according to dts coding style
> - move to Documentation/devicetree/bindings/memory-controllers
> - clarify the commit message a tiny bit
> - remove unnecessary multiline markers (|)
> - define address format in patternProperties
> - trim subject line (remove "binding")
> - remove use of "simple-bus", because it's technically incorrect
While I admit I haven't been following recent developments in this area,
as someone who was involved when "simple-bus" was created (and was on the
ePAPR committee that standardized it) I'm surprised to hear simple-bus
being called "erroneous" or "technically incorrect" here.
For non-NAND devices this bus generally meets the definition of "an
internal I/O bus that cannot be probed for devices" where "devices on the
bus can be accessed directly without additional configuration
required". NAND flash is an exception, but those devices have
compatibles that are specific to the bus controller.
The fact that the address encoding is non-linear is irrelevant; the
addresses can still be translated using the standard "ranges" mechanism.
This seems to be a disconnect between the schema verification and the way
the compatible has previously been defined and used.
And as a practical matter, unless I'm missing something (which I might be
since I haven't been in devicetree-land for nearly a decade), Linux is
relying on simple-bus to probe these devices. There is a driver that
binds to the bus itself but that is just for error interrupts and NAND.
You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
fsl_ifc: populate child devices without relying on simple-bus") and the
subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
nodes of buses and mfd devices")...
I'm curious what the reasoning was for removing simple-bus from IFC. It
seems that the schema verification also played a role in that:
https://www.spinics.net/lists/devicetree/msg220418.html
...but there's also the comment in 985ede63a045eabf3f9d ("dt-bindings:
memory: fsl: convert ifc binding to yaml schema") that "this will help to
enforce the correct probe order between parent device and child devices",
but was that really not already guaranteed by the parent/child
relationship (and again, it should only really matter for NAND except for
the possibility of missing error reports during early boot)?
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8313-elbc
> + - fsl,mpc8315-elbc
> + - fsl,mpc8377-elbc
> + - fsl,mpc8378-elbc
> + - fsl,mpc8379-elbc
> + - fsl,mpc8536-elbc
> + - fsl,mpc8569-elbc
> + - fsl,mpc8572-elbc
> + - fsl,p1020-elbc
> + - fsl,p1021-elbc
> + - fsl,p1023-elbc
> + - fsl,p2020-elbc
> + - fsl,p2041-elbc
> + - fsl,p3041-elbc
> + - fsl,p4080-elbc
> + - fsl,p5020-elbc
> + - fsl,p5040-elbc
> + - const: fsl,elbc
Is it really necessary to list every single chip?
And then it would need to be updated when new ones came out? I know this
particular line of chips is not going to see any new members at this
point, but as far as the general approach goes...
Does the schema validation complain if it sees an extra compatible it
doesn't recognize? If so that's obnoxious.
> +examples:
> + - |
> + localbus@f0010100 {
> + compatible = "fsl,mpc8272-localbus",
> + "fsl,pq2-localbus";
> + reg = <0xf0010100 0x40>;
> + ranges = <0x0 0x0 0xfe000000 0x02000000
> + 0x1 0x0 0xf4500000 0x00008000
> + 0x2 0x0 0xfd810000 0x00010000>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + flash@0,0 {
> + compatible = "jedec-flash";
> + reg = <0x0 0x0 0x2000000>;
> + bank-width = <4>;
> + device-width = <1>;
> + };
> +
> + simple-periph@2,0 {
> + compatible = "fsl,elbc-gpcm-uio";
> + reg = <0x2 0x0 0x10000>;
> + elbc-gpcm-br = <0xfd810800>;
> + elbc-gpcm-or = <0xffff09f7>;
> + };
I know this isn't new, but... since we're using this as an example,
where is the documentation for this fsl,elbc-gpcm-uio and
elbc-gpcm-br/or? What exactly is a simple-periph?
There are no in-tree device trees that use this either. The bcsr
node was actually a much more normal example, despite that particular
platform having been removed. There are other bcsr nodes that still
exist that could be used instead.
-Crystal
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-09 20:31 ` Crystal Wood
@ 2025-02-09 20:49 ` Crystal Wood
-1 siblings, 0 replies; 117+ messages in thread
From: Crystal Wood @ 2025-02-09 20:49 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Sun, Feb 09, 2025 at 02:31:35PM -0600, Crystal Wood wrote:
> On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > + simple-periph@2,0 {
> > + compatible = "fsl,elbc-gpcm-uio";
> > + reg = <0x2 0x0 0x10000>;
> > + elbc-gpcm-br = <0xfd810800>;
> > + elbc-gpcm-or = <0xffff09f7>;
> > + };
>
> I know this isn't new, but... since we're using this as an example,
> where is the documentation for this fsl,elbc-gpcm-uio and
> elbc-gpcm-br/or? What exactly is a simple-periph?
>
> There are no in-tree device trees that use this either. The bcsr
> node was actually a much more normal example, despite that particular
> platform having been removed. There are other bcsr nodes that still
> exist that could be used instead.
OK, I noticed patch 10 after I sent this :-P
Seems I didn't like it too much when it was new either:
https://lkml.org/lkml/2014/12/9/530
And it's still a bad example for how GPCM devices on this bus should
normally be represented.
-Crystal
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-09 20:49 ` Crystal Wood
0 siblings, 0 replies; 117+ messages in thread
From: Crystal Wood @ 2025-02-09 20:49 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Sun, Feb 09, 2025 at 02:31:35PM -0600, Crystal Wood wrote:
> On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > + simple-periph@2,0 {
> > + compatible = "fsl,elbc-gpcm-uio";
> > + reg = <0x2 0x0 0x10000>;
> > + elbc-gpcm-br = <0xfd810800>;
> > + elbc-gpcm-or = <0xffff09f7>;
> > + };
>
> I know this isn't new, but... since we're using this as an example,
> where is the documentation for this fsl,elbc-gpcm-uio and
> elbc-gpcm-br/or? What exactly is a simple-periph?
>
> There are no in-tree device trees that use this either. The bcsr
> node was actually a much more normal example, despite that particular
> platform having been removed. There are other bcsr nodes that still
> exist that could be used instead.
OK, I noticed patch 10 after I sent this :-P
Seems I didn't like it too much when it was new either:
https://lkml.org/lkml/2014/12/9/530
And it's still a bad example for how GPCM devices on this bus should
normally be represented.
-Crystal
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-09 20:31 ` Crystal Wood
@ 2025-02-10 11:31 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-10 11:31 UTC (permalink / raw)
To: Crystal Wood
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Sun, Feb 09, 2025 at 02:31:34PM -0600, Crystal Wood wrote:
> On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > Convert the Freescale localbus controller bindings from text form to
> > YAML. The updated list of compatible strings reflects current usage
> > in arch/powerpc/boot/dts/, except that many existing device trees
> > erroneously specify "simple-bus" in addition to fsl,*elbc.
> >
> > Changes compared to the txt version:
> > - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> > appears in this example and nowhere else
> > - added a new example with NAND flash
> > - updated list of compatible strings
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - fix order of properties in examples, according to dts coding style
> > - move to Documentation/devicetree/bindings/memory-controllers
> > - clarify the commit message a tiny bit
> > - remove unnecessary multiline markers (|)
> > - define address format in patternProperties
> > - trim subject line (remove "binding")
> > - remove use of "simple-bus", because it's technically incorrect
>
> While I admit I haven't been following recent developments in this area,
> as someone who was involved when "simple-bus" was created (and was on the
> ePAPR committee that standardized it) I'm surprised to hear simple-bus
> being called "erroneous" or "technically incorrect" here.
It is quite possible that my understanding of it is incomplete or wrong.
>
> For non-NAND devices this bus generally meets the definition of "an
> internal I/O bus that cannot be probed for devices" where "devices on the
> bus can be accessed directly without additional configuration
> required". NAND flash is an exception, but those devices have
> compatibles that are specific to the bus controller.
>
> The fact that the address encoding is non-linear is irrelevant; the
> addresses can still be translated using the standard "ranges" mechanism.
> This seems to be a disconnect between the schema verification and the way
> the compatible has previously been defined and used.
This is what led me to my assumptions: The simple-bus validation logic
in dtc complains about unit addresses such as nand@1,0 which are quite
appropriate for the eLBC.
>
> And as a practical matter, unless I'm missing something (which I might be
> since I haven't been in devicetree-land for nearly a decade), Linux is
> relying on simple-bus to probe these devices. There is a driver that
> binds to the bus itself but that is just for error interrupts and NAND.
As of now, yes, that's correct. Without simple-bus, a current Linux
kernel doesn't find the device nodes inside such a localbus.
>
> You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
> fsl_ifc: populate child devices without relying on simple-bus") and the
> subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
> nodes of buses and mfd devices")...
I have prepared such a patch, based on the same assumptions:
[PATCH] powerpc/fsl_lbc: Explicitly populate bus
https://lore.kernel.org/lkml/20250209-localbus-v1-1-efcd780153a0@posteo.net/
>
> I'm curious what the reasoning was for removing simple-bus from IFC. It
> seems that the schema verification also played a role in that:
> https://www.spinics.net/lists/devicetree/msg220418.html
Yes, that's the same as my reasoning.
>
> ...but there's also the comment in 985ede63a045eabf3f9d ("dt-bindings:
> memory: fsl: convert ifc binding to yaml schema") that "this will help to
> enforce the correct probe order between parent device and child devices",
> but was that really not already guaranteed by the parent/child
> relationship (and again, it should only really matter for NAND except for
> the possibility of missing error reports during early boot)?
I'm inclined to agree with you, but it's somewhat beyond my skill level.
I'll let Li Yang or Rob Herring comment on that.
>
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - fsl,mpc8313-elbc
> > + - fsl,mpc8315-elbc
> > + - fsl,mpc8377-elbc
> > + - fsl,mpc8378-elbc
> > + - fsl,mpc8379-elbc
> > + - fsl,mpc8536-elbc
> > + - fsl,mpc8569-elbc
> > + - fsl,mpc8572-elbc
> > + - fsl,p1020-elbc
> > + - fsl,p1021-elbc
> > + - fsl,p1023-elbc
> > + - fsl,p2020-elbc
> > + - fsl,p2041-elbc
> > + - fsl,p3041-elbc
> > + - fsl,p4080-elbc
> > + - fsl,p5020-elbc
> > + - fsl,p5040-elbc
> > + - const: fsl,elbc
>
> Is it really necessary to list every single chip?
>
> And then it would need to be updated when new ones came out? I know this
> particular line of chips is not going to see any new members at this
> point, but as far as the general approach goes...
As far as I'm aware, this reflects common practice today.
>
> Does the schema validation complain if it sees an extra compatible it
> doesn't recognize? If so that's obnoxious.
Yes.
>
> > +examples:
> > + - |
> > + localbus@f0010100 {
> > + compatible = "fsl,mpc8272-localbus",
> > + "fsl,pq2-localbus";
> > + reg = <0xf0010100 0x40>;
> > + ranges = <0x0 0x0 0xfe000000 0x02000000
> > + 0x1 0x0 0xf4500000 0x00008000
> > + 0x2 0x0 0xfd810000 0x00010000>;
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > +
> > + flash@0,0 {
> > + compatible = "jedec-flash";
> > + reg = <0x0 0x0 0x2000000>;
> > + bank-width = <4>;
> > + device-width = <1>;
> > + };
> > +
> > + simple-periph@2,0 {
> > + compatible = "fsl,elbc-gpcm-uio";
> > + reg = <0x2 0x0 0x10000>;
> > + elbc-gpcm-br = <0xfd810800>;
> > + elbc-gpcm-or = <0xffff09f7>;
> > + };
>
> I know this isn't new, but... since we're using this as an example,
> where is the documentation for this fsl,elbc-gpcm-uio and
> elbc-gpcm-br/or? What exactly is a simple-periph?
fsl,elbc-gpcm-uio is handled in the following patch
(dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio).
simple-periph is something I haven't thought about, because this whole
example comes from the old txt-format binding. The whole purpose of
fsl,elbc-gpcm-uio is to allow userspace drivers to interact with
localbus devices, so that doesn't make the intention any clearer, either.
>
> There are no in-tree device trees that use this either. The bcsr
> node was actually a much more normal example, despite that particular
> platform having been removed. There are other bcsr nodes that still
> exist that could be used instead.
Ah, fsl,mpc8568mds-bcsr for example, good point. I'll add it back.
>
> -Crystal
Thank you for reaching out!
Best regards,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-10 11:31 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-10 11:31 UTC (permalink / raw)
To: Crystal Wood
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Sun, Feb 09, 2025 at 02:31:34PM -0600, Crystal Wood wrote:
> On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > Convert the Freescale localbus controller bindings from text form to
> > YAML. The updated list of compatible strings reflects current usage
> > in arch/powerpc/boot/dts/, except that many existing device trees
> > erroneously specify "simple-bus" in addition to fsl,*elbc.
> >
> > Changes compared to the txt version:
> > - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> > appears in this example and nowhere else
> > - added a new example with NAND flash
> > - updated list of compatible strings
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - fix order of properties in examples, according to dts coding style
> > - move to Documentation/devicetree/bindings/memory-controllers
> > - clarify the commit message a tiny bit
> > - remove unnecessary multiline markers (|)
> > - define address format in patternProperties
> > - trim subject line (remove "binding")
> > - remove use of "simple-bus", because it's technically incorrect
>
> While I admit I haven't been following recent developments in this area,
> as someone who was involved when "simple-bus" was created (and was on the
> ePAPR committee that standardized it) I'm surprised to hear simple-bus
> being called "erroneous" or "technically incorrect" here.
It is quite possible that my understanding of it is incomplete or wrong.
>
> For non-NAND devices this bus generally meets the definition of "an
> internal I/O bus that cannot be probed for devices" where "devices on the
> bus can be accessed directly without additional configuration
> required". NAND flash is an exception, but those devices have
> compatibles that are specific to the bus controller.
>
> The fact that the address encoding is non-linear is irrelevant; the
> addresses can still be translated using the standard "ranges" mechanism.
> This seems to be a disconnect between the schema verification and the way
> the compatible has previously been defined and used.
This is what led me to my assumptions: The simple-bus validation logic
in dtc complains about unit addresses such as nand@1,0 which are quite
appropriate for the eLBC.
>
> And as a practical matter, unless I'm missing something (which I might be
> since I haven't been in devicetree-land for nearly a decade), Linux is
> relying on simple-bus to probe these devices. There is a driver that
> binds to the bus itself but that is just for error interrupts and NAND.
As of now, yes, that's correct. Without simple-bus, a current Linux
kernel doesn't find the device nodes inside such a localbus.
>
> You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
> fsl_ifc: populate child devices without relying on simple-bus") and the
> subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
> nodes of buses and mfd devices")...
I have prepared such a patch, based on the same assumptions:
[PATCH] powerpc/fsl_lbc: Explicitly populate bus
https://lore.kernel.org/lkml/20250209-localbus-v1-1-efcd780153a0@posteo.net/
>
> I'm curious what the reasoning was for removing simple-bus from IFC. It
> seems that the schema verification also played a role in that:
> https://www.spinics.net/lists/devicetree/msg220418.html
Yes, that's the same as my reasoning.
>
> ...but there's also the comment in 985ede63a045eabf3f9d ("dt-bindings:
> memory: fsl: convert ifc binding to yaml schema") that "this will help to
> enforce the correct probe order between parent device and child devices",
> but was that really not already guaranteed by the parent/child
> relationship (and again, it should only really matter for NAND except for
> the possibility of missing error reports during early boot)?
I'm inclined to agree with you, but it's somewhat beyond my skill level.
I'll let Li Yang or Rob Herring comment on that.
>
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - fsl,mpc8313-elbc
> > + - fsl,mpc8315-elbc
> > + - fsl,mpc8377-elbc
> > + - fsl,mpc8378-elbc
> > + - fsl,mpc8379-elbc
> > + - fsl,mpc8536-elbc
> > + - fsl,mpc8569-elbc
> > + - fsl,mpc8572-elbc
> > + - fsl,p1020-elbc
> > + - fsl,p1021-elbc
> > + - fsl,p1023-elbc
> > + - fsl,p2020-elbc
> > + - fsl,p2041-elbc
> > + - fsl,p3041-elbc
> > + - fsl,p4080-elbc
> > + - fsl,p5020-elbc
> > + - fsl,p5040-elbc
> > + - const: fsl,elbc
>
> Is it really necessary to list every single chip?
>
> And then it would need to be updated when new ones came out? I know this
> particular line of chips is not going to see any new members at this
> point, but as far as the general approach goes...
As far as I'm aware, this reflects common practice today.
>
> Does the schema validation complain if it sees an extra compatible it
> doesn't recognize? If so that's obnoxious.
Yes.
>
> > +examples:
> > + - |
> > + localbus@f0010100 {
> > + compatible = "fsl,mpc8272-localbus",
> > + "fsl,pq2-localbus";
> > + reg = <0xf0010100 0x40>;
> > + ranges = <0x0 0x0 0xfe000000 0x02000000
> > + 0x1 0x0 0xf4500000 0x00008000
> > + 0x2 0x0 0xfd810000 0x00010000>;
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > +
> > + flash@0,0 {
> > + compatible = "jedec-flash";
> > + reg = <0x0 0x0 0x2000000>;
> > + bank-width = <4>;
> > + device-width = <1>;
> > + };
> > +
> > + simple-periph@2,0 {
> > + compatible = "fsl,elbc-gpcm-uio";
> > + reg = <0x2 0x0 0x10000>;
> > + elbc-gpcm-br = <0xfd810800>;
> > + elbc-gpcm-or = <0xffff09f7>;
> > + };
>
> I know this isn't new, but... since we're using this as an example,
> where is the documentation for this fsl,elbc-gpcm-uio and
> elbc-gpcm-br/or? What exactly is a simple-periph?
fsl,elbc-gpcm-uio is handled in the following patch
(dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio).
simple-periph is something I haven't thought about, because this whole
example comes from the old txt-format binding. The whole purpose of
fsl,elbc-gpcm-uio is to allow userspace drivers to interact with
localbus devices, so that doesn't make the intention any clearer, either.
>
> There are no in-tree device trees that use this either. The bcsr
> node was actually a much more normal example, despite that particular
> platform having been removed. There are other bcsr nodes that still
> exist that could be used instead.
Ah, fsl,mpc8568mds-bcsr for example, good point. I'll add it back.
>
> -Crystal
Thank you for reaching out!
Best regards,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-09 20:31 ` Crystal Wood
@ 2025-02-10 21:53 ` Rob Herring
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-10 21:53 UTC (permalink / raw)
To: Crystal Wood
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Sun, Feb 09, 2025 at 02:31:34PM -0600, Crystal Wood wrote:
> On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > Convert the Freescale localbus controller bindings from text form to
> > YAML. The updated list of compatible strings reflects current usage
> > in arch/powerpc/boot/dts/, except that many existing device trees
> > erroneously specify "simple-bus" in addition to fsl,*elbc.
> >
> > Changes compared to the txt version:
> > - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> > appears in this example and nowhere else
> > - added a new example with NAND flash
> > - updated list of compatible strings
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - fix order of properties in examples, according to dts coding style
> > - move to Documentation/devicetree/bindings/memory-controllers
> > - clarify the commit message a tiny bit
> > - remove unnecessary multiline markers (|)
> > - define address format in patternProperties
> > - trim subject line (remove "binding")
> > - remove use of "simple-bus", because it's technically incorrect
>
> While I admit I haven't been following recent developments in this area,
> as someone who was involved when "simple-bus" was created (and was on the
> ePAPR committee that standardized it) I'm surprised to hear simple-bus
> being called "erroneous" or "technically incorrect" here.
Erroneous because the binding did not say "simple-bus" was used. Not
uncommon with the old .txt bindings.
Generally, if a bus has control registers or resources like clocks, then
we tend not to call them 'simple-bus'. And '"specific-bus",
"simple-bus"' gives some problems around what driver if any do you
bind to.
If you have chip selects, then you have config registers for those.
Not really "simple" if you ask me. That being said, you could keep
'simple-bus' here. I would tend to err on making the schema match the
actual .dts rather than updating the .dts files on older platforms like
these.
> For non-NAND devices this bus generally meets the definition of "an
> internal I/O bus that cannot be probed for devices" where "devices on the
> bus can be accessed directly without additional configuration
> required". NAND flash is an exception, but those devices have
> compatibles that are specific to the bus controller.
NAND bindings have evolved quite a bit if you haven't been paying
attention.
> The fact that the address encoding is non-linear is irrelevant; the
> addresses can still be translated using the standard "ranges" mechanism.
> This seems to be a disconnect between the schema verification and the way
> the compatible has previously been defined and used.
>
> And as a practical matter, unless I'm missing something (which I might be
> since I haven't been in devicetree-land for nearly a decade), Linux is
> relying on simple-bus to probe these devices. There is a driver that
> binds to the bus itself but that is just for error interrupts and NAND.
>
> You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
> fsl_ifc: populate child devices without relying on simple-bus") and the
> subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
> nodes of buses and mfd devices")...
>
> I'm curious what the reasoning was for removing simple-bus from IFC. It
> seems that the schema verification also played a role in that:
> https://www.spinics.net/lists/devicetree/msg220418.html
If a kernel change is needed to support changed .dts files, then we
shouldn't be doing that here (being mature platforms). That would mean
new DTB will not work with existing kernels.
>
> ...but there's also the comment in 985ede63a045eabf3f9d ("dt-bindings:
> memory: fsl: convert ifc binding to yaml schema") that "this will help to
> enforce the correct probe order between parent device and child devices",
> but was that really not already guaranteed by the parent/child
> relationship (and again, it should only really matter for NAND except for
> the possibility of missing error reports during early boot)?
>
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - fsl,mpc8313-elbc
> > + - fsl,mpc8315-elbc
> > + - fsl,mpc8377-elbc
> > + - fsl,mpc8378-elbc
> > + - fsl,mpc8379-elbc
> > + - fsl,mpc8536-elbc
> > + - fsl,mpc8569-elbc
> > + - fsl,mpc8572-elbc
> > + - fsl,p1020-elbc
> > + - fsl,p1021-elbc
> > + - fsl,p1023-elbc
> > + - fsl,p2020-elbc
> > + - fsl,p2041-elbc
> > + - fsl,p3041-elbc
> > + - fsl,p4080-elbc
> > + - fsl,p5020-elbc
> > + - fsl,p5040-elbc
> > + - const: fsl,elbc
>
> Is it really necessary to list every single chip?
Yes. If they exist, they have to be documented.
>
> And then it would need to be updated when new ones came out? I know this
> particular line of chips is not going to see any new members at this
> point, but as far as the general approach goes...
>
> Does the schema validation complain if it sees an extra compatible it
> doesn't recognize? If so that's obnoxious.
Yes.
More annoying is having to boot and debug typos:
compatible = "foo,bar", "simplebus";
Rob
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-10 21:53 ` Rob Herring
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-10 21:53 UTC (permalink / raw)
To: Crystal Wood
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Sun, Feb 09, 2025 at 02:31:34PM -0600, Crystal Wood wrote:
> On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > Convert the Freescale localbus controller bindings from text form to
> > YAML. The updated list of compatible strings reflects current usage
> > in arch/powerpc/boot/dts/, except that many existing device trees
> > erroneously specify "simple-bus" in addition to fsl,*elbc.
> >
> > Changes compared to the txt version:
> > - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> > appears in this example and nowhere else
> > - added a new example with NAND flash
> > - updated list of compatible strings
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - fix order of properties in examples, according to dts coding style
> > - move to Documentation/devicetree/bindings/memory-controllers
> > - clarify the commit message a tiny bit
> > - remove unnecessary multiline markers (|)
> > - define address format in patternProperties
> > - trim subject line (remove "binding")
> > - remove use of "simple-bus", because it's technically incorrect
>
> While I admit I haven't been following recent developments in this area,
> as someone who was involved when "simple-bus" was created (and was on the
> ePAPR committee that standardized it) I'm surprised to hear simple-bus
> being called "erroneous" or "technically incorrect" here.
Erroneous because the binding did not say "simple-bus" was used. Not
uncommon with the old .txt bindings.
Generally, if a bus has control registers or resources like clocks, then
we tend not to call them 'simple-bus'. And '"specific-bus",
"simple-bus"' gives some problems around what driver if any do you
bind to.
If you have chip selects, then you have config registers for those.
Not really "simple" if you ask me. That being said, you could keep
'simple-bus' here. I would tend to err on making the schema match the
actual .dts rather than updating the .dts files on older platforms like
these.
> For non-NAND devices this bus generally meets the definition of "an
> internal I/O bus that cannot be probed for devices" where "devices on the
> bus can be accessed directly without additional configuration
> required". NAND flash is an exception, but those devices have
> compatibles that are specific to the bus controller.
NAND bindings have evolved quite a bit if you haven't been paying
attention.
> The fact that the address encoding is non-linear is irrelevant; the
> addresses can still be translated using the standard "ranges" mechanism.
> This seems to be a disconnect between the schema verification and the way
> the compatible has previously been defined and used.
>
> And as a practical matter, unless I'm missing something (which I might be
> since I haven't been in devicetree-land for nearly a decade), Linux is
> relying on simple-bus to probe these devices. There is a driver that
> binds to the bus itself but that is just for error interrupts and NAND.
>
> You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
> fsl_ifc: populate child devices without relying on simple-bus") and the
> subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
> nodes of buses and mfd devices")...
>
> I'm curious what the reasoning was for removing simple-bus from IFC. It
> seems that the schema verification also played a role in that:
> https://www.spinics.net/lists/devicetree/msg220418.html
If a kernel change is needed to support changed .dts files, then we
shouldn't be doing that here (being mature platforms). That would mean
new DTB will not work with existing kernels.
>
> ...but there's also the comment in 985ede63a045eabf3f9d ("dt-bindings:
> memory: fsl: convert ifc binding to yaml schema") that "this will help to
> enforce the correct probe order between parent device and child devices",
> but was that really not already guaranteed by the parent/child
> relationship (and again, it should only really matter for NAND except for
> the possibility of missing error reports during early boot)?
>
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - fsl,mpc8313-elbc
> > + - fsl,mpc8315-elbc
> > + - fsl,mpc8377-elbc
> > + - fsl,mpc8378-elbc
> > + - fsl,mpc8379-elbc
> > + - fsl,mpc8536-elbc
> > + - fsl,mpc8569-elbc
> > + - fsl,mpc8572-elbc
> > + - fsl,p1020-elbc
> > + - fsl,p1021-elbc
> > + - fsl,p1023-elbc
> > + - fsl,p2020-elbc
> > + - fsl,p2041-elbc
> > + - fsl,p3041-elbc
> > + - fsl,p4080-elbc
> > + - fsl,p5020-elbc
> > + - fsl,p5040-elbc
> > + - const: fsl,elbc
>
> Is it really necessary to list every single chip?
Yes. If they exist, they have to be documented.
>
> And then it would need to be updated when new ones came out? I know this
> particular line of chips is not going to see any new members at this
> point, but as far as the general approach goes...
>
> Does the schema validation complain if it sees an extra compatible it
> doesn't recognize? If so that's obnoxious.
Yes.
More annoying is having to boot and debug typos:
compatible = "foo,bar", "simplebus";
Rob
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-10 21:53 ` Rob Herring
@ 2025-02-16 15:59 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-16 15:59 UTC (permalink / raw)
To: Rob Herring
Cc: Crystal Wood, j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Mon, Feb 10, 2025 at 03:53:24PM -0600, Rob Herring wrote:
> On Sun, Feb 09, 2025 at 02:31:34PM -0600, Crystal Wood wrote:
> > On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > > From: "J. Neuschäfer" <j.ne@posteo.net>
> > >
> > > Convert the Freescale localbus controller bindings from text form to
> > > YAML. The updated list of compatible strings reflects current usage
> > > in arch/powerpc/boot/dts/, except that many existing device trees
> > > erroneously specify "simple-bus" in addition to fsl,*elbc.
> > >
> > > Changes compared to the txt version:
> > > - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> > > appears in this example and nowhere else
> > > - added a new example with NAND flash
> > > - updated list of compatible strings
> > >
> > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > > ---
> > >
> > > V2:
> > > - fix order of properties in examples, according to dts coding style
> > > - move to Documentation/devicetree/bindings/memory-controllers
> > > - clarify the commit message a tiny bit
> > > - remove unnecessary multiline markers (|)
> > > - define address format in patternProperties
> > > - trim subject line (remove "binding")
> > > - remove use of "simple-bus", because it's technically incorrect
> >
> > While I admit I haven't been following recent developments in this area,
> > as someone who was involved when "simple-bus" was created (and was on the
> > ePAPR committee that standardized it) I'm surprised to hear simple-bus
> > being called "erroneous" or "technically incorrect" here.
>
> Erroneous because the binding did not say "simple-bus" was used. Not
> uncommon with the old .txt bindings.
>
> Generally, if a bus has control registers or resources like clocks, then
> we tend not to call them 'simple-bus'. And '"specific-bus",
> "simple-bus"' gives some problems around what driver if any do you
> bind to.
[...]
> > You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
> > fsl_ifc: populate child devices without relying on simple-bus") and the
> > subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
> > nodes of buses and mfd devices")...
> >
> > I'm curious what the reasoning was for removing simple-bus from IFC. It
> > seems that the schema verification also played a role in that:
> > https://www.spinics.net/lists/devicetree/msg220418.html
>
> If a kernel change is needed to support changed .dts files, then we
> shouldn't be doing that here (being mature platforms). That would mean
> new DTB will not work with existing kernels.
Alright, I'll keep simple-bus in the eLBC binding for historical
compatibility.
Thank you both for your discussion.
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-16 15:59 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-16 15:59 UTC (permalink / raw)
To: Rob Herring
Cc: Crystal Wood, j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd, Li Yang, John Ogness
On Mon, Feb 10, 2025 at 03:53:24PM -0600, Rob Herring wrote:
> On Sun, Feb 09, 2025 at 02:31:34PM -0600, Crystal Wood wrote:
> > On Fri, Feb 07, 2025 at 10:30:26PM +0100, J. Neuschäfer via B4 Relay wrote:
> > > From: "J. Neuschäfer" <j.ne@posteo.net>
> > >
> > > Convert the Freescale localbus controller bindings from text form to
> > > YAML. The updated list of compatible strings reflects current usage
> > > in arch/powerpc/boot/dts/, except that many existing device trees
> > > erroneously specify "simple-bus" in addition to fsl,*elbc.
> > >
> > > Changes compared to the txt version:
> > > - removed the board-control (fsl,mpc8272ads-bcsr) node because it only
> > > appears in this example and nowhere else
> > > - added a new example with NAND flash
> > > - updated list of compatible strings
> > >
> > > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > > ---
> > >
> > > V2:
> > > - fix order of properties in examples, according to dts coding style
> > > - move to Documentation/devicetree/bindings/memory-controllers
> > > - clarify the commit message a tiny bit
> > > - remove unnecessary multiline markers (|)
> > > - define address format in patternProperties
> > > - trim subject line (remove "binding")
> > > - remove use of "simple-bus", because it's technically incorrect
> >
> > While I admit I haven't been following recent developments in this area,
> > as someone who was involved when "simple-bus" was created (and was on the
> > ePAPR committee that standardized it) I'm surprised to hear simple-bus
> > being called "erroneous" or "technically incorrect" here.
>
> Erroneous because the binding did not say "simple-bus" was used. Not
> uncommon with the old .txt bindings.
>
> Generally, if a bus has control registers or resources like clocks, then
> we tend not to call them 'simple-bus'. And '"specific-bus",
> "simple-bus"' gives some problems around what driver if any do you
> bind to.
[...]
> > You'd probably need something like commit 3e25f800afb82bd9e5f8 ("memory:
> > fsl_ifc: populate child devices without relying on simple-bus") and the
> > subsequent fix in dd8adc713b1656 ("memory: fsl_ifc: populate child
> > nodes of buses and mfd devices")...
> >
> > I'm curious what the reasoning was for removing simple-bus from IFC. It
> > seems that the schema verification also played a role in that:
> > https://www.spinics.net/lists/devicetree/msg220418.html
>
> If a kernel change is needed to support changed .dts files, then we
> shouldn't be doing that here (being mature platforms). That would mean
> new DTB will not work with existing kernels.
Alright, I'll keep simple-bus in the eLBC binding for historical
compatibility.
Thank you both for your discussion.
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
2025-02-10 21:53 ` Rob Herring
@ 2025-02-23 23:45 ` Crystal Wood
-1 siblings, 0 replies; 117+ messages in thread
From: Crystal Wood @ 2025-02-23 23:45 UTC (permalink / raw)
To: Rob Herring
Cc: j.ne, devicetree, linuxppc-dev, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, linux-kernel, linux-mtd
On Mon, Feb 10, 2025 at 03:53:24PM -0600, Rob Herring wrote:
> Generally, if a bus has control registers or resources like clocks, then
> we tend not to call them 'simple-bus'. And '"specific-bus",
> "simple-bus"' gives some problems around what driver if any do you
> bind to.
Isn't the general idea that you bind to the first one in the list that
you have a driver for, since it goes from most to least specific?
> If you have chip selects, then you have config registers for those.
> Not really "simple" if you ask me. That being said, you could keep
> 'simple-bus' here. I would tend to err on making the schema match the
> actual .dts rather than updating the .dts files on older platforms like
> these.
By that definition I wonder how much truly qualifies. Even with
IMMR/CCSR, firmware needs to at least set the base register (which is
itself inside CCSR, so there's no way to avoid relying on knowledge of
what the firmware did, except on 8xx). Though I acknowledge that eLBC is
a stretch, with FCM and UPM being exceptions. FCM didn't exist in the
original LBC, and UPM was... kind of considered a fringe use case
until someone hooked NAND up to it. :-P
The point back then wasn't that such registers don't exist, but that the
OS can use the devices without having to care. But of course, there's
subjectivity there about what the OS might care about (e.g. UPM).
FWIW, on these chips (especially the later ones) there were all sorts of
things (in general, not specifically LBC-related) that firmware had to
set up to present a coherent system to the OS. Not all the choices made
there were great, but if we tried to describe all the gory details from
the start I'm sure we would have made an even bigger mess of it.
> > For non-NAND devices this bus generally meets the definition of "an
> > internal I/O bus that cannot be probed for devices" where "devices on the
> > bus can be accessed directly without additional configuration
> > required". NAND flash is an exception, but those devices have
> > compatibles that are specific to the bus controller.
>
> NAND bindings have evolved quite a bit if you haven't been paying
> attention.
I haven't, as I acknowledged... but I was describing how eLBC does it,
and just meant that we're not binding to drivers that don't know about
the bus in that case. The NAND control registers are part of eLBC/IFC,
not a separate block (the reg in the NAND node itself is just the SRAM
used as a buffer). I'm not sure what that would be expected to look like
these days.
-Crystal
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc to YAML
@ 2025-02-23 23:45 ` Crystal Wood
0 siblings, 0 replies; 117+ messages in thread
From: Crystal Wood @ 2025-02-23 23:45 UTC (permalink / raw)
To: Rob Herring
Cc: j.ne, devicetree, linuxppc-dev, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, linux-kernel, linux-mtd
On Mon, Feb 10, 2025 at 03:53:24PM -0600, Rob Herring wrote:
> Generally, if a bus has control registers or resources like clocks, then
> we tend not to call them 'simple-bus'. And '"specific-bus",
> "simple-bus"' gives some problems around what driver if any do you
> bind to.
Isn't the general idea that you bind to the first one in the list that
you have a driver for, since it goes from most to least specific?
> If you have chip selects, then you have config registers for those.
> Not really "simple" if you ask me. That being said, you could keep
> 'simple-bus' here. I would tend to err on making the schema match the
> actual .dts rather than updating the .dts files on older platforms like
> these.
By that definition I wonder how much truly qualifies. Even with
IMMR/CCSR, firmware needs to at least set the base register (which is
itself inside CCSR, so there's no way to avoid relying on knowledge of
what the firmware did, except on 8xx). Though I acknowledge that eLBC is
a stretch, with FCM and UPM being exceptions. FCM didn't exist in the
original LBC, and UPM was... kind of considered a fringe use case
until someone hooked NAND up to it. :-P
The point back then wasn't that such registers don't exist, but that the
OS can use the devices without having to care. But of course, there's
subjectivity there about what the OS might care about (e.g. UPM).
FWIW, on these chips (especially the later ones) there were all sorts of
things (in general, not specifically LBC-related) that firmware had to
set up to present a coherent system to the OS. Not all the choices made
there were great, but if we tried to describe all the gory details from
the start I'm sure we would have made an even bigger mess of it.
> > For non-NAND devices this bus generally meets the definition of "an
> > internal I/O bus that cannot be probed for devices" where "devices on the
> > bus can be accessed directly without additional configuration
> > required". NAND flash is an exception, but those devices have
> > compatibles that are specific to the bus controller.
>
> NAND bindings have evolved quite a bit if you haven't been paying
> attention.
I haven't, as I acknowledged... but I was describing how eLBC does it,
and just meant that we're not binding to drivers that don't know about
the bus in that case. The NAND control registers are part of eLBC/IFC,
not a separate block (the reg in the NAND node itself is just the SRAM
used as a buffer). I'm not sure what that would be expected to look like
these days.
-Crystal
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
driver.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- split out from fsl,elbc patch
- add description
- remove "device_type" property
- move to bindings/memory-controllers
---
.../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..381584b400a0ad98c6d9e0b38f2877d44603ed84
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc-gpcm-uio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Userspace I/O interface for Freescale eLBC devices
+
+description:
+ The Freescale Enhanced Local Bus controller (eLBC) supports flexible access
+ to memory devices, through the General-Purpose Chip-select Machine (GPCM).
+ The purpose of this binding is to designate devices attached to eLBC/GPMC for
+ use by userspace.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ const: fsl,elbc-gpcm-uio
+
+ reg:
+ maxItems: 1
+
+ elbc-gpcm-br:
+ description: Base Register (BR) value to set
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ elbc-gpcm-or:
+ description: Option Register (OR) value to set
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ interrupts:
+ maxItems: 1
+
+ uio_name:
+ $ref: /schemas/types.yaml#/definitions/string
+
+required:
+ - compatible
+ - reg
+ - elbc-gpcm-br
+ - elbc-gpcm-or
+
+additionalProperties: false
+
+examples:
+ - |
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ simple-periph@2,0 {
+ compatible = "fsl,elbc-gpcm-uio";
+ reg = <0x2 0x0 0x10000>;
+ elbc-gpcm-br = <0xfd810800>;
+ elbc-gpcm-or = <0xffff09f7>;
+ };
+ };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
driver.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- split out from fsl,elbc patch
- add description
- remove "device_type" property
- move to bindings/memory-controllers
---
.../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..381584b400a0ad98c6d9e0b38f2877d44603ed84
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc-gpcm-uio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Userspace I/O interface for Freescale eLBC devices
+
+description:
+ The Freescale Enhanced Local Bus controller (eLBC) supports flexible access
+ to memory devices, through the General-Purpose Chip-select Machine (GPCM).
+ The purpose of this binding is to designate devices attached to eLBC/GPMC for
+ use by userspace.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ const: fsl,elbc-gpcm-uio
+
+ reg:
+ maxItems: 1
+
+ elbc-gpcm-br:
+ description: Base Register (BR) value to set
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ elbc-gpcm-or:
+ description: Option Register (OR) value to set
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ interrupts:
+ maxItems: 1
+
+ uio_name:
+ $ref: /schemas/types.yaml#/definitions/string
+
+required:
+ - compatible
+ - reg
+ - elbc-gpcm-br
+ - elbc-gpcm-or
+
+additionalProperties: false
+
+examples:
+ - |
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ simple-periph@2,0 {
+ compatible = "fsl,elbc-gpcm-uio";
+ reg = <0x2 0x0 0x10000>;
+ elbc-gpcm-br = <0xfd810800>;
+ elbc-gpcm-or = <0xffff09f7>;
+ };
+ };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
driver.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- split out from fsl,elbc patch
- add description
- remove "device_type" property
- move to bindings/memory-controllers
---
.../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..381584b400a0ad98c6d9e0b38f2877d44603ed84
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc-gpcm-uio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Userspace I/O interface for Freescale eLBC devices
+
+description:
+ The Freescale Enhanced Local Bus controller (eLBC) supports flexible access
+ to memory devices, through the General-Purpose Chip-select Machine (GPCM).
+ The purpose of this binding is to designate devices attached to eLBC/GPMC for
+ use by userspace.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+properties:
+ compatible:
+ const: fsl,elbc-gpcm-uio
+
+ reg:
+ maxItems: 1
+
+ elbc-gpcm-br:
+ description: Base Register (BR) value to set
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ elbc-gpcm-or:
+ description: Option Register (OR) value to set
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ interrupts:
+ maxItems: 1
+
+ uio_name:
+ $ref: /schemas/types.yaml#/definitions/string
+
+required:
+ - compatible
+ - reg
+ - elbc-gpcm-br
+ - elbc-gpcm-or
+
+additionalProperties: false
+
+examples:
+ - |
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ simple-periph@2,0 {
+ compatible = "fsl,elbc-gpcm-uio";
+ reg = <0x2 0x0 0x10000>;
+ elbc-gpcm-br = <0xfd810800>;
+ elbc-gpcm-or = <0xffff09f7>;
+ };
+ };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-10 19:45 ` Frank Li
-1 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:45 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:27PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
> driver.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>
> V2:
> - split out from fsl,elbc patch
> - add description
> - remove "device_type" property
> - move to bindings/memory-controllers
> ---
> .../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..381584b400a0ad98c6d9e0b38f2877d44603ed84
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc-gpcm-uio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Userspace I/O interface for Freescale eLBC devices
> +
> +description:
> + The Freescale Enhanced Local Bus controller (eLBC) supports flexible access
> + to memory devices, through the General-Purpose Chip-select Machine (GPCM).
> + The purpose of this binding is to designate devices attached to eLBC/GPMC for
> + use by userspace.
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,elbc-gpcm-uio
> +
> + reg:
> + maxItems: 1
> +
> + elbc-gpcm-br:
> + description: Base Register (BR) value to set
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + elbc-gpcm-or:
> + description: Option Register (OR) value to set
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + interrupts:
> + maxItems: 1
> +
> + uio_name:
> + $ref: /schemas/types.yaml#/definitions/string
> +
> +required:
> + - compatible
> + - reg
> + - elbc-gpcm-br
> + - elbc-gpcm-or
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + simple-periph@2,0 {
> + compatible = "fsl,elbc-gpcm-uio";
> + reg = <0x2 0x0 0x10000>;
> + elbc-gpcm-br = <0xfd810800>;
> + elbc-gpcm-or = <0xffff09f7>;
> + };
> + };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
@ 2025-02-10 19:45 ` Frank Li
0 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:45 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:27PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
> driver.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>
> V2:
> - split out from fsl,elbc patch
> - add description
> - remove "device_type" property
> - move to bindings/memory-controllers
> ---
> .../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..381584b400a0ad98c6d9e0b38f2877d44603ed84
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl,elbc-gpcm-uio.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/fsl,elbc-gpcm-uio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Userspace I/O interface for Freescale eLBC devices
> +
> +description:
> + The Freescale Enhanced Local Bus controller (eLBC) supports flexible access
> + to memory devices, through the General-Purpose Chip-select Machine (GPCM).
> + The purpose of this binding is to designate devices attached to eLBC/GPMC for
> + use by userspace.
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +properties:
> + compatible:
> + const: fsl,elbc-gpcm-uio
> +
> + reg:
> + maxItems: 1
> +
> + elbc-gpcm-br:
> + description: Base Register (BR) value to set
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + elbc-gpcm-or:
> + description: Option Register (OR) value to set
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + interrupts:
> + maxItems: 1
> +
> + uio_name:
> + $ref: /schemas/types.yaml#/definitions/string
> +
> +required:
> + - compatible
> + - reg
> + - elbc-gpcm-br
> + - elbc-gpcm-or
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + simple-periph@2,0 {
> + compatible = "fsl,elbc-gpcm-uio";
> + reg = <0x2 0x0 0x10000>;
> + elbc-gpcm-br = <0xfd810800>;
> + elbc-gpcm-or = <0xffff09f7>;
> + };
> + };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-12 19:44 ` Rob Herring (Arm)
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-12 19:44 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Guenter Roeck, linuxppc-dev, Madhavan Srinivasan, David S. Miller,
J. Neuschäfer, Mark Brown, Manivannan Sadhasivam,
Bjorn Helgaas, Vinod Koul, linux-watchdog, Krzysztof Kozlowski,
Krzysztof Wilczyński, Wim Van Sebroeck, Miquel Raynal,
Lorenzo Pieralisi, devicetree, linux-pci, linux-spi, Naveen N Rao,
Nicholas Piggin, imx, linux-ide, Vignesh Raghavendra, Lee Jones,
linux-kernel, linux-crypto, Krzysztof Kozlowski, linux-mtd,
Conor Dooley, Christophe Leroy, dmaengine, Scott Wood, Herbert Xu,
Niklas Cassel, Michael Ellerman, Richard Weinberger,
Damien Le Moal
On Fri, 07 Feb 2025 22:30:27 +0100, J. Neuschäfer wrote:
> Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
> driver.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc patch
> - add description
> - remove "device_type" property
> - move to bindings/memory-controllers
> ---
> .../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio
@ 2025-02-12 19:44 ` Rob Herring (Arm)
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-12 19:44 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Guenter Roeck, linuxppc-dev, Madhavan Srinivasan, David S. Miller,
J. Neuschäfer, Mark Brown, Manivannan Sadhasivam,
Bjorn Helgaas, Vinod Koul, linux-watchdog, Krzysztof Kozlowski,
Krzysztof Wilczyński, Wim Van Sebroeck, Miquel Raynal,
Lorenzo Pieralisi, devicetree, linux-pci, linux-spi, Naveen N Rao,
Nicholas Piggin, imx, linux-ide, Vignesh Raghavendra, Lee Jones,
linux-kernel, linux-crypto, Krzysztof Kozlowski, linux-mtd,
Conor Dooley, Christophe Leroy, dmaengine, Scott Wood, Herbert Xu,
Niklas Cassel, Michael Ellerman, Richard Weinberger,
Damien Le Moal
On Fri, 07 Feb 2025 22:30:27 +0100, J. Neuschäfer wrote:
> Formalize the binding already supported by the uio_fsl_elbc_gpcm.c
> driver.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc patch
> - add description
> - remove "device_type" property
> - move to bindings/memory-controllers
> ---
> .../memory-controllers/fsl,elbc-gpcm-uio.yaml | 59 ++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
Formalize the binding already supported by the fsl_elbc_nand.c driver
and used in several device trees in arch/powerpc/boot/dts/.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- split out from fsl,elbc binding patch
- constrain #address-cells and #size-cells
- add a general description
- use unevaluatedProperties=false instead of additionalProperties=false
- fix property order to comply with dts coding style
- include raw-nand-chip.yaml instead of nand-chip.yaml
---
.../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NAND flash attached to Freescale eLBC
+
+description:
+ The Freescale Enhanced Local Bus controller (eLBC) contains logic to
+ interface with NAND flash, called the NAND Flash Control Machine (FCM).
+ This binding describes flash attached to an eLBC using the FCM.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+allOf:
+ - $ref: raw-nand-chip.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8313-fcm-nand
+ - fsl,mpc8315-fcm-nand
+ - fsl,mpc8377-fcm-nand
+ - fsl,mpc8378-fcm-nand
+ - fsl,mpc8379-fcm-nand
+ - fsl,mpc8536-fcm-nand
+ - fsl,mpc8569-fcm-nand
+ - fsl,mpc8572-fcm-nand
+ - fsl,p1020-fcm-nand
+ - fsl,p1021-fcm-nand
+ - fsl,p1025-fcm-nand
+ - fsl,p2020-fcm-nand
+ - const: fsl,elbc-fcm-nand
+ - const: fsl,elbc-fcm-nand
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ nand@1,0 {
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Formalize the binding already supported by the fsl_elbc_nand.c driver
and used in several device trees in arch/powerpc/boot/dts/.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- split out from fsl,elbc binding patch
- constrain #address-cells and #size-cells
- add a general description
- use unevaluatedProperties=false instead of additionalProperties=false
- fix property order to comply with dts coding style
- include raw-nand-chip.yaml instead of nand-chip.yaml
---
.../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NAND flash attached to Freescale eLBC
+
+description:
+ The Freescale Enhanced Local Bus controller (eLBC) contains logic to
+ interface with NAND flash, called the NAND Flash Control Machine (FCM).
+ This binding describes flash attached to an eLBC using the FCM.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+allOf:
+ - $ref: raw-nand-chip.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8313-fcm-nand
+ - fsl,mpc8315-fcm-nand
+ - fsl,mpc8377-fcm-nand
+ - fsl,mpc8378-fcm-nand
+ - fsl,mpc8379-fcm-nand
+ - fsl,mpc8536-fcm-nand
+ - fsl,mpc8569-fcm-nand
+ - fsl,mpc8572-fcm-nand
+ - fsl,p1020-fcm-nand
+ - fsl,p1021-fcm-nand
+ - fsl,p1025-fcm-nand
+ - fsl,p2020-fcm-nand
+ - const: fsl,elbc-fcm-nand
+ - const: fsl,elbc-fcm-nand
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ nand@1,0 {
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
Formalize the binding already supported by the fsl_elbc_nand.c driver
and used in several device trees in arch/powerpc/boot/dts/.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- split out from fsl,elbc binding patch
- constrain #address-cells and #size-cells
- add a general description
- use unevaluatedProperties=false instead of additionalProperties=false
- fix property order to comply with dts coding style
- include raw-nand-chip.yaml instead of nand-chip.yaml
---
.../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NAND flash attached to Freescale eLBC
+
+description:
+ The Freescale Enhanced Local Bus controller (eLBC) contains logic to
+ interface with NAND flash, called the NAND Flash Control Machine (FCM).
+ This binding describes flash attached to an eLBC using the FCM.
+
+maintainers:
+ - J. Neuschäfer <j.ne@posteo.net>
+
+allOf:
+ - $ref: raw-nand-chip.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,mpc8313-fcm-nand
+ - fsl,mpc8315-fcm-nand
+ - fsl,mpc8377-fcm-nand
+ - fsl,mpc8378-fcm-nand
+ - fsl,mpc8379-fcm-nand
+ - fsl,mpc8536-fcm-nand
+ - fsl,mpc8569-fcm-nand
+ - fsl,mpc8572-fcm-nand
+ - fsl,p1020-fcm-nand
+ - fsl,p1021-fcm-nand
+ - fsl,p1025-fcm-nand
+ - fsl,p2020-fcm-nand
+ - const: fsl,elbc-fcm-nand
+ - const: fsl,elbc-fcm-nand
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+
+ nand@1,0 {
+ compatible = "fsl,mpc8315-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+ };
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-07 23:45 ` Rob Herring (Arm)
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-07 23:45 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Nicholas Piggin, Naveen N Rao, Vinod Koul, linux-kernel,
J. Neuschäfer, Vignesh Raghavendra, Guenter Roeck,
Michael Ellerman, linux-ide, Krzysztof Kozlowski, linux-watchdog,
Christophe Leroy, Richard Weinberger, Lee Jones,
Madhavan Srinivasan, linux-pci, Mark Brown, imx,
Lorenzo Pieralisi, Conor Dooley, linux-spi, Bjorn Helgaas,
Herbert Xu, Manivannan Sadhasivam, Krzysztof Wilczyński,
Scott Wood, devicetree, Miquel Raynal, Damien Le Moal,
David S. Miller, linux-crypto, dmaengine, linux-mtd, linuxppc-dev,
Krzysztof Kozlowski, Wim Van Sebroeck, Niklas Cassel
On Fri, 07 Feb 2025 22:30:28 +0100, J. Neuschäfer wrote:
> Formalize the binding already supported by the fsl_elbc_nand.c driver
> and used in several device trees in arch/powerpc/boot/dts/.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc binding patch
> - constrain #address-cells and #size-cells
> - add a general description
> - use unevaluatedProperties=false instead of additionalProperties=false
> - fix property order to comply with dts coding style
> - include raw-nand-chip.yaml instead of nand-chip.yaml
> ---
> .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.example.dtb: nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
from schema $id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
from schema $id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250207-ppcyaml-v2-11-8137b0c42526@posteo.net
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
@ 2025-02-07 23:45 ` Rob Herring (Arm)
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring (Arm) @ 2025-02-07 23:45 UTC (permalink / raw)
To: J. Neuschäfer
Cc: Nicholas Piggin, Naveen N Rao, Vinod Koul, linux-kernel,
J. Neuschäfer, Vignesh Raghavendra, Guenter Roeck,
Michael Ellerman, linux-ide, Krzysztof Kozlowski, linux-watchdog,
Christophe Leroy, Richard Weinberger, Lee Jones,
Madhavan Srinivasan, linux-pci, Mark Brown, imx,
Lorenzo Pieralisi, Conor Dooley, linux-spi, Bjorn Helgaas,
Herbert Xu, Manivannan Sadhasivam, Krzysztof Wilczyński,
Scott Wood, devicetree, Miquel Raynal, Damien Le Moal,
David S. Miller, linux-crypto, dmaengine, linux-mtd, linuxppc-dev,
Krzysztof Kozlowski, Wim Van Sebroeck, Niklas Cassel
On Fri, 07 Feb 2025 22:30:28 +0100, J. Neuschäfer wrote:
> Formalize the binding already supported by the fsl_elbc_nand.c driver
> and used in several device trees in arch/powerpc/boot/dts/.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc binding patch
> - constrain #address-cells and #size-cells
> - add a general description
> - use unevaluatedProperties=false instead of additionalProperties=false
> - fix property order to comply with dts coding style
> - include raw-nand-chip.yaml instead of nand-chip.yaml
> ---
> .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.example.dtb: nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
from schema $id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/memory-controllers/fsl,elbc.example.dtb: nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
from schema $id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250207-ppcyaml-v2-11-8137b0c42526@posteo.net
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nandy
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-10 19:47 ` Frank Li
-1 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:47 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:28PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Formalize the binding already supported by the fsl_elbc_nand.c driver
> and used in several device trees in arch/powerpc/boot/dts/.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc binding patch
> - constrain #address-cells and #size-cells
> - add a general description
> - use unevaluatedProperties=false instead of additionalProperties=false
> - fix property order to comply with dts coding style
> - include raw-nand-chip.yaml instead of nand-chip.yaml
> ---
> .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NAND flash attached to Freescale eLBC
> +
> +description:
> + The Freescale Enhanced Local Bus controller (eLBC) contains logic to
> + interface with NAND flash, called the NAND Flash Control Machine (FCM).
> + This binding describes flash attached to an eLBC using the FCM.
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +allOf:
> + - $ref: raw-nand-chip.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8313-fcm-nand
> + - fsl,mpc8315-fcm-nand
> + - fsl,mpc8377-fcm-nand
> + - fsl,mpc8378-fcm-nand
> + - fsl,mpc8379-fcm-nand
> + - fsl,mpc8536-fcm-nand
> + - fsl,mpc8569-fcm-nand
> + - fsl,mpc8572-fcm-nand
> + - fsl,p1020-fcm-nand
> + - fsl,p1021-fcm-nand
> + - fsl,p1025-fcm-nand
> + - fsl,p2020-fcm-nand
> + - const: fsl,elbc-fcm-nand
> + - const: fsl,elbc-fcm-nand
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + nand@1,0 {
> + compatible = "fsl,mpc8315-fcm-nand",
> + "fsl,elbc-fcm-nand";
> + reg = <0x1 0x0 0x2000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
needn't #address-cells and #size-cells because no children nodes.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Frank
> + };
> + };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nandy
@ 2025-02-10 19:47 ` Frank Li
0 siblings, 0 replies; 117+ messages in thread
From: Frank Li @ 2025-02-10 19:47 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:28PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> Formalize the binding already supported by the fsl_elbc_nand.c driver
> and used in several device trees in arch/powerpc/boot/dts/.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc binding patch
> - constrain #address-cells and #size-cells
> - add a general description
> - use unevaluatedProperties=false instead of additionalProperties=false
> - fix property order to comply with dts coding style
> - include raw-nand-chip.yaml instead of nand-chip.yaml
> ---
> .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NAND flash attached to Freescale eLBC
> +
> +description:
> + The Freescale Enhanced Local Bus controller (eLBC) contains logic to
> + interface with NAND flash, called the NAND Flash Control Machine (FCM).
> + This binding describes flash attached to an eLBC using the FCM.
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +allOf:
> + - $ref: raw-nand-chip.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8313-fcm-nand
> + - fsl,mpc8315-fcm-nand
> + - fsl,mpc8377-fcm-nand
> + - fsl,mpc8378-fcm-nand
> + - fsl,mpc8379-fcm-nand
> + - fsl,mpc8536-fcm-nand
> + - fsl,mpc8569-fcm-nand
> + - fsl,mpc8572-fcm-nand
> + - fsl,p1020-fcm-nand
> + - fsl,p1021-fcm-nand
> + - fsl,p1025-fcm-nand
> + - fsl,p2020-fcm-nand
> + - const: fsl,elbc-fcm-nand
> + - const: fsl,elbc-fcm-nand
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + nand@1,0 {
> + compatible = "fsl,mpc8315-fcm-nand",
> + "fsl,elbc-fcm-nand";
> + reg = <0x1 0x0 0x2000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
needn't #address-cells and #size-cells because no children nodes.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Frank
> + };
> + };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-11 0:01 ` Rob Herring
-1 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-11 0:01 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:28PM +0100, J. Neuschäfer wrote:
> Formalize the binding already supported by the fsl_elbc_nand.c driver
> and used in several device trees in arch/powerpc/boot/dts/.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc binding patch
> - constrain #address-cells and #size-cells
> - add a general description
> - use unevaluatedProperties=false instead of additionalProperties=false
> - fix property order to comply with dts coding style
> - include raw-nand-chip.yaml instead of nand-chip.yaml
Why? Doesn't look like you use anything from it. I think the correct
thing to use here is just mtd.yaml to pick up partitions.
> ---
> .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NAND flash attached to Freescale eLBC
> +
> +description:
> + The Freescale Enhanced Local Bus controller (eLBC) contains logic to
> + interface with NAND flash, called the NAND Flash Control Machine (FCM).
> + This binding describes flash attached to an eLBC using the FCM.
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +allOf:
> + - $ref: raw-nand-chip.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8313-fcm-nand
> + - fsl,mpc8315-fcm-nand
> + - fsl,mpc8377-fcm-nand
> + - fsl,mpc8378-fcm-nand
> + - fsl,mpc8379-fcm-nand
> + - fsl,mpc8536-fcm-nand
> + - fsl,mpc8569-fcm-nand
> + - fsl,mpc8572-fcm-nand
> + - fsl,p1020-fcm-nand
> + - fsl,p1021-fcm-nand
> + - fsl,p1025-fcm-nand
> + - fsl,p2020-fcm-nand
> + - const: fsl,elbc-fcm-nand
> + - const: fsl,elbc-fcm-nand
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + nand@1,0 {
> + compatible = "fsl,mpc8315-fcm-nand",
> + "fsl,elbc-fcm-nand";
> + reg = <0x1 0x0 0x2000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> + };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
@ 2025-02-11 0:01 ` Rob Herring
0 siblings, 0 replies; 117+ messages in thread
From: Rob Herring @ 2025-02-11 0:01 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Krzysztof Kozlowski, Conor Dooley,
Damien Le Moal, Niklas Cassel, Herbert Xu, David S. Miller,
Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 10:30:28PM +0100, J. Neuschäfer wrote:
> Formalize the binding already supported by the fsl_elbc_nand.c driver
> and used in several device trees in arch/powerpc/boot/dts/.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
>
> V2:
> - split out from fsl,elbc binding patch
> - constrain #address-cells and #size-cells
> - add a general description
> - use unevaluatedProperties=false instead of additionalProperties=false
> - fix property order to comply with dts coding style
> - include raw-nand-chip.yaml instead of nand-chip.yaml
Why? Doesn't look like you use anything from it. I think the correct
thing to use here is just mtd.yaml to pick up partitions.
> ---
> .../devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml | 68 ++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..1de97bb24fa4a83e2ea5d94ab822dd0e37baa102
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/fsl,elbc-fcm-nand.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NAND flash attached to Freescale eLBC
> +
> +description:
> + The Freescale Enhanced Local Bus controller (eLBC) contains logic to
> + interface with NAND flash, called the NAND Flash Control Machine (FCM).
> + This binding describes flash attached to an eLBC using the FCM.
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +allOf:
> + - $ref: raw-nand-chip.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8313-fcm-nand
> + - fsl,mpc8315-fcm-nand
> + - fsl,mpc8377-fcm-nand
> + - fsl,mpc8378-fcm-nand
> + - fsl,mpc8379-fcm-nand
> + - fsl,mpc8536-fcm-nand
> + - fsl,mpc8569-fcm-nand
> + - fsl,mpc8572-fcm-nand
> + - fsl,p1020-fcm-nand
> + - fsl,p1021-fcm-nand
> + - fsl,p1025-fcm-nand
> + - fsl,p2020-fcm-nand
> + - const: fsl,elbc-fcm-nand
> + - const: fsl,elbc-fcm-nand
> +
> + reg:
> + maxItems: 1
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + localbus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + nand@1,0 {
> + compatible = "fsl,mpc8315-fcm-nand",
> + "fsl,elbc-fcm-nand";
> + reg = <0x1 0x0 0x2000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> + };
>
> --
> 2.48.0.rc1.219.gb6b6757d772
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
2025-02-11 0:01 ` Rob Herring
@ 2025-02-16 17:39 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-16 17:39 UTC (permalink / raw)
To: Rob Herring
Cc: J. Neuschäfer, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Mon, Feb 10, 2025 at 06:01:57PM -0600, Rob Herring wrote:
> On Fri, Feb 07, 2025 at 10:30:28PM +0100, J. Neuschäfer wrote:
> > Formalize the binding already supported by the fsl_elbc_nand.c driver
> > and used in several device trees in arch/powerpc/boot/dts/.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - split out from fsl,elbc binding patch
> > - constrain #address-cells and #size-cells
> > - add a general description
> > - use unevaluatedProperties=false instead of additionalProperties=false
> > - fix property order to comply with dts coding style
> > - include raw-nand-chip.yaml instead of nand-chip.yaml
>
> Why? Doesn't look like you use anything from it. I think the correct
> thing to use here is just mtd.yaml to pick up partitions.
There is one example of properties from nand-chip.yaml being used
on an fsl,elbc-fcm-nand node: arch/powerpc/boot/dts/turris1x.dts
uses nand-ecc-mode and nand-ecc-algo.
Thanks,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand
@ 2025-02-16 17:39 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-16 17:39 UTC (permalink / raw)
To: Rob Herring
Cc: J. Neuschäfer, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Mon, Feb 10, 2025 at 06:01:57PM -0600, Rob Herring wrote:
> On Fri, Feb 07, 2025 at 10:30:28PM +0100, J. Neuschäfer wrote:
> > Formalize the binding already supported by the fsl_elbc_nand.c driver
> > and used in several device trees in arch/powerpc/boot/dts/.
> >
> > Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> > ---
> >
> > V2:
> > - split out from fsl,elbc binding patch
> > - constrain #address-cells and #size-cells
> > - add a general description
> > - use unevaluatedProperties=false instead of additionalProperties=false
> > - fix property order to comply with dts coding style
> > - include raw-nand-chip.yaml instead of nand-chip.yaml
>
> Why? Doesn't look like you use anything from it. I think the correct
> thing to use here is just mtd.yaml to pick up partitions.
There is one example of properties from nand-chip.yaml being used
on an fsl,elbc-fcm-nand node: arch/powerpc/boot/dts/turris1x.dts
uses nand-ecc-mode and nand-ecc-algo.
Thanks,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
(?)
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
In some scenarios, such as under the Freescale eLBC bus, there are raw
NAND chips with a unit address that has a comma in it (cs,offset).
Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
addresses.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- new patch
---
Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
index 092448d7bfc5ccd246ca4b2341464e18722a2d51..1c9e3a40d8f9f77115525e5a6be0951aae001ae0 100644
--- a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
+++ b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
@@ -25,7 +25,7 @@ description: |
properties:
$nodename:
- pattern: "^nand@[a-f0-9]$"
+ pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
reg:
description:
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
In some scenarios, such as under the Freescale eLBC bus, there are raw
NAND chips with a unit address that has a comma in it (cs,offset).
Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
addresses.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- new patch
---
Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
index 092448d7bfc5ccd246ca4b2341464e18722a2d51..1c9e3a40d8f9f77115525e5a6be0951aae001ae0 100644
--- a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
+++ b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
@@ -25,7 +25,7 @@ description: |
properties:
$nodename:
- pattern: "^nand@[a-f0-9]$"
+ pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
reg:
description:
--
2.48.0.rc1.219.gb6b6757d772
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 117+ messages in thread* [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
@ 2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-02-07 21:30 UTC (permalink / raw)
To: devicetree, linuxppc-dev, Krzysztof Kozlowski
Cc: imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
In some scenarios, such as under the Freescale eLBC bus, there are raw
NAND chips with a unit address that has a comma in it (cs,offset).
Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
addresses.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
V2:
- new patch
---
Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
index 092448d7bfc5ccd246ca4b2341464e18722a2d51..1c9e3a40d8f9f77115525e5a6be0951aae001ae0 100644
--- a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
+++ b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
@@ -25,7 +25,7 @@ description: |
properties:
$nodename:
- pattern: "^nand@[a-f0-9]$"
+ pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
reg:
description:
--
2.48.0.rc1.219.gb6b6757d772
^ permalink raw reply related [flat|nested] 117+ messages in thread* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-10 8:27 ` Miquel Raynal
-1 siblings, 0 replies; 117+ messages in thread
From: Miquel Raynal @ 2025-02-10 8:27 UTC (permalink / raw)
To: J. Neuschäfer via B4 Relay
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, j.ne, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
Hello,
On 07/02/2025 at 22:30:29 +01, J. Neuschäfer via B4 Relay <devnull+j.ne.posteo.net@kernel.org> wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> In some scenarios, such as under the Freescale eLBC bus, there are raw
> NAND chips with a unit address that has a comma in it (cs,offset).
> Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
> addresses.
This is super specific to this controller, I'd rather avoid that in the
main (shared) files. I believe you can force another node name in the
controller's binding instead?
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
@ 2025-02-10 8:27 ` Miquel Raynal
0 siblings, 0 replies; 117+ messages in thread
From: Miquel Raynal @ 2025-02-10 8:27 UTC (permalink / raw)
To: J. Neuschäfer via B4 Relay
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, j.ne, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
Hello,
On 07/02/2025 at 22:30:29 +01, J. Neuschäfer via B4 Relay <devnull+j.ne.posteo.net@kernel.org> wrote:
> From: "J. Neuschäfer" <j.ne@posteo.net>
>
> In some scenarios, such as under the Freescale eLBC bus, there are raw
> NAND chips with a unit address that has a comma in it (cs,offset).
> Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
> addresses.
This is super specific to this controller, I'd rather avoid that in the
main (shared) files. I believe you can force another node name in the
controller's binding instead?
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
2025-02-10 8:27 ` Miquel Raynal
@ 2025-02-16 18:12 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-16 18:12 UTC (permalink / raw)
To: Miquel Raynal
Cc: J. Neuschäfer via B4 Relay, devicetree, linuxppc-dev,
Krzysztof Kozlowski, j.ne, imx, Scott Wood, Madhavan Srinivasan,
Michael Ellerman, Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Damien Le Moal,
Niklas Cassel, Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
On Mon, Feb 10, 2025 at 09:27:22AM +0100, Miquel Raynal wrote:
> Hello,
>
> On 07/02/2025 at 22:30:29 +01, J. Neuschäfer via B4 Relay <devnull+j.ne.posteo.net@kernel.org> wrote:
>
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > In some scenarios, such as under the Freescale eLBC bus, there are raw
> > NAND chips with a unit address that has a comma in it (cs,offset).
> > Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
> > addresses.
>
> This is super specific to this controller, I'd rather avoid that in the
> main (shared) files. I believe you can force another node name in the
> controller's binding instead?
It's a bit tricky. AFAICS, when I declare a node name pattern in my
specific binding in addition to the generic binding, the result is that
both of them apply, so I can't relax stricter requirements:
# raw-nand-chip.yaml
properties:
$nodename:
pattern: "^nand@[a-f0-9]$"
# fsl,elbc-fcm-nand.yaml
properties:
$nodename:
pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
# dtc
/.../fsl,elbc-fcm-nand.example.dtb:
nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
from schema $id:
http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
(I changed the second pattern to nand-fail@... and dtc warned about it
mismatching too.)
Perhaps I'm missing a DT-schema trick to override a value/pattern.
Alternatively (pending discussion on patch 11/12), I might end up not
referencing raw-nand-chip.yaml.
Best regards,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
@ 2025-02-16 18:12 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-16 18:12 UTC (permalink / raw)
To: Miquel Raynal
Cc: J. Neuschäfer via B4 Relay, devicetree, linuxppc-dev,
Krzysztof Kozlowski, j.ne, imx, Scott Wood, Madhavan Srinivasan,
Michael Ellerman, Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Damien Le Moal,
Niklas Cassel, Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
On Mon, Feb 10, 2025 at 09:27:22AM +0100, Miquel Raynal wrote:
> Hello,
>
> On 07/02/2025 at 22:30:29 +01, J. Neuschäfer via B4 Relay <devnull+j.ne.posteo.net@kernel.org> wrote:
>
> > From: "J. Neuschäfer" <j.ne@posteo.net>
> >
> > In some scenarios, such as under the Freescale eLBC bus, there are raw
> > NAND chips with a unit address that has a comma in it (cs,offset).
> > Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
> > addresses.
>
> This is super specific to this controller, I'd rather avoid that in the
> main (shared) files. I believe you can force another node name in the
> controller's binding instead?
It's a bit tricky. AFAICS, when I declare a node name pattern in my
specific binding in addition to the generic binding, the result is that
both of them apply, so I can't relax stricter requirements:
# raw-nand-chip.yaml
properties:
$nodename:
pattern: "^nand@[a-f0-9]$"
# fsl,elbc-fcm-nand.yaml
properties:
$nodename:
pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
# dtc
/.../fsl,elbc-fcm-nand.example.dtb:
nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
from schema $id:
http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
(I changed the second pattern to nand-fail@... and dtc warned about it
mismatching too.)
Perhaps I'm missing a DT-schema trick to override a value/pattern.
Alternatively (pending discussion on patch 11/12), I might end up not
referencing raw-nand-chip.yaml.
Best regards,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
2025-02-16 18:12 ` J. Neuschäfer
@ 2025-02-17 9:31 ` Miquel Raynal
-1 siblings, 0 replies; 117+ messages in thread
From: Miquel Raynal @ 2025-02-17 9:31 UTC (permalink / raw)
To: J. Neuschäfer
Cc: J. Neuschäfer via B4 Relay, devicetree, linuxppc-dev,
Krzysztof Kozlowski, imx, Scott Wood, Madhavan Srinivasan,
Michael Ellerman, Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Damien Le Moal,
Niklas Cassel, Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
Hello,
>> > In some scenarios, such as under the Freescale eLBC bus, there are raw
>> > NAND chips with a unit address that has a comma in it (cs,offset).
>> > Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
>> > addresses.
>>
>> This is super specific to this controller, I'd rather avoid that in the
>> main (shared) files. I believe you can force another node name in the
>> controller's binding instead?
>
> It's a bit tricky. AFAICS, when I declare a node name pattern in my
> specific binding in addition to the generic binding, the result is that
> both of them apply, so I can't relax stricter requirements:
>
> # raw-nand-chip.yaml
> properties:
> $nodename:
> pattern: "^nand@[a-f0-9]$"
>
> # fsl,elbc-fcm-nand.yaml
> properties:
> $nodename:
> pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
Well, I guess this is creating a second possible node name.
> # dtc
> /.../fsl,elbc-fcm-nand.example.dtb:
> nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
> from schema $id:
> http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
What about fixing the DT instead?
> (I changed the second pattern to nand-fail@... and dtc warned about it
> mismatching too.)
>
> Perhaps I'm missing a DT-schema trick to override a value/pattern.
>
> Alternatively (pending discussion on patch 11/12), I might end up not
> referencing raw-nand-chip.yaml.
Ok.
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
@ 2025-02-17 9:31 ` Miquel Raynal
0 siblings, 0 replies; 117+ messages in thread
From: Miquel Raynal @ 2025-02-17 9:31 UTC (permalink / raw)
To: J. Neuschäfer
Cc: J. Neuschäfer via B4 Relay, devicetree, linuxppc-dev,
Krzysztof Kozlowski, imx, Scott Wood, Madhavan Srinivasan,
Michael Ellerman, Nicholas Piggin, Christophe Leroy, Naveen N Rao,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Damien Le Moal,
Niklas Cassel, Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, J. Neuschäfer,
Wim Van Sebroeck, Guenter Roeck, Mark Brown, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
Hello,
>> > In some scenarios, such as under the Freescale eLBC bus, there are raw
>> > NAND chips with a unit address that has a comma in it (cs,offset).
>> > Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
>> > addresses.
>>
>> This is super specific to this controller, I'd rather avoid that in the
>> main (shared) files. I believe you can force another node name in the
>> controller's binding instead?
>
> It's a bit tricky. AFAICS, when I declare a node name pattern in my
> specific binding in addition to the generic binding, the result is that
> both of them apply, so I can't relax stricter requirements:
>
> # raw-nand-chip.yaml
> properties:
> $nodename:
> pattern: "^nand@[a-f0-9]$"
>
> # fsl,elbc-fcm-nand.yaml
> properties:
> $nodename:
> pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
Well, I guess this is creating a second possible node name.
> # dtc
> /.../fsl,elbc-fcm-nand.example.dtb:
> nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
> from schema $id:
> http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
What about fixing the DT instead?
> (I changed the second pattern to nand-fail@... and dtc warned about it
> mismatching too.)
>
> Perhaps I'm missing a DT-schema trick to override a value/pattern.
>
> Alternatively (pending discussion on patch 11/12), I might end up not
> referencing raw-nand-chip.yaml.
Ok.
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
2025-02-17 9:31 ` Miquel Raynal
@ 2025-02-17 10:21 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-17 10:21 UTC (permalink / raw)
To: Miquel Raynal
Cc: J. Neuschäfer, J. Neuschäfer via B4 Relay, devicetree,
linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Mon, Feb 17, 2025 at 10:31:08AM +0100, Miquel Raynal wrote:
> Hello,
>
> >> > In some scenarios, such as under the Freescale eLBC bus, there are raw
> >> > NAND chips with a unit address that has a comma in it (cs,offset).
> >> > Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
> >> > addresses.
> >>
> >> This is super specific to this controller, I'd rather avoid that in the
> >> main (shared) files. I believe you can force another node name in the
> >> controller's binding instead?
> >
> > It's a bit tricky. AFAICS, when I declare a node name pattern in my
> > specific binding in addition to the generic binding, the result is that
> > both of them apply, so I can't relax stricter requirements:
> >
> > # raw-nand-chip.yaml
> > properties:
> > $nodename:
> > pattern: "^nand@[a-f0-9]$"
> >
> > # fsl,elbc-fcm-nand.yaml
> > properties:
> > $nodename:
> > pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
>
> Well, I guess this is creating a second possible node name.
>
> > # dtc
> > /.../fsl,elbc-fcm-nand.example.dtb:
> > nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
> > from schema $id:
> > http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
>
> What about fixing the DT instead?
In this particular context under the Freescale eLBC ("enhanced Local Bus
Controller"), nand@1,0 makes complete sense, because it refers to chip
select 1, offset 0. The eLBC binding (which has existed without YAML
formalization for a long time) specifies that each device address
includes a chip select and a base address under that CS.
The alternative of spelling it as nand@100000000 makes readability
strictly worse (IMO).
Due to the conflicting requirements of keeping compatibility with
historic device trees and complying with modern DT conventions,
I'm already ignoring a validation warning from dtc, which suggests to
use nand@100000000 instead of nand@1,0 because the eLBC bus has
historically been specified with compatible = ..., "simple-bus",
so I guess the fsl,elbc-fcm-nand binding can't be perfect anyway.
In any case, I'll drop this patch during further development.
Thank you for your inputs,
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread* Re: [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern
@ 2025-02-17 10:21 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-17 10:21 UTC (permalink / raw)
To: Miquel Raynal
Cc: J. Neuschäfer, J. Neuschäfer via B4 Relay, devicetree,
linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck, Mark Brown,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
On Mon, Feb 17, 2025 at 10:31:08AM +0100, Miquel Raynal wrote:
> Hello,
>
> >> > In some scenarios, such as under the Freescale eLBC bus, there are raw
> >> > NAND chips with a unit address that has a comma in it (cs,offset).
> >> > Relax the $nodename pattern in raw-nand-chip.yaml to allow such unit
> >> > addresses.
> >>
> >> This is super specific to this controller, I'd rather avoid that in the
> >> main (shared) files. I believe you can force another node name in the
> >> controller's binding instead?
> >
> > It's a bit tricky. AFAICS, when I declare a node name pattern in my
> > specific binding in addition to the generic binding, the result is that
> > both of them apply, so I can't relax stricter requirements:
> >
> > # raw-nand-chip.yaml
> > properties:
> > $nodename:
> > pattern: "^nand@[a-f0-9]$"
> >
> > # fsl,elbc-fcm-nand.yaml
> > properties:
> > $nodename:
> > pattern: "^nand@[a-f0-9](,[0-9a-f]*)?$"
>
> Well, I guess this is creating a second possible node name.
>
> > # dtc
> > /.../fsl,elbc-fcm-nand.example.dtb:
> > nand@1,0: $nodename:0: 'nand@1,0' does not match '^nand@[a-f0-9]$'
> > from schema $id:
> > http://devicetree.org/schemas/mtd/fsl,elbc-fcm-nand.yaml#
>
> What about fixing the DT instead?
In this particular context under the Freescale eLBC ("enhanced Local Bus
Controller"), nand@1,0 makes complete sense, because it refers to chip
select 1, offset 0. The eLBC binding (which has existed without YAML
formalization for a long time) specifies that each device address
includes a chip select and a base address under that CS.
The alternative of spelling it as nand@100000000 makes readability
strictly worse (IMO).
Due to the conflicting requirements of keeping compatibility with
historic device trees and complying with modern DT conventions,
I'm already ignoring a validation warning from dtc, which suggests to
use nand@100000000 instead of nand@1,0 because the eLBC bus has
historically been specified with compatible = ..., "simple-bus",
so I guess the fsl,elbc-fcm-nand binding can't be perfect anyway.
In any case, I'll drop this patch during further development.
Thank you for your inputs,
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
@ 2025-02-07 21:38 ` Mark Brown
-1 siblings, 0 replies; 117+ messages in thread
From: Mark Brown @ 2025-02-07 21:38 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
[-- Attachment #1: Type: text/plain, Size: 574 bytes --]
On Fri, Feb 07, 2025 at 10:30:17PM +0100, J. Neuschäfer via B4 Relay wrote:
> This is a spin-off of the series titled
> "powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
> During the development of that series, it became clear that many
> devicetree bindings for Freescale MPC8xxx platforms are still in the old
> plain-text format, or don't exist at all, and in any case don't mention
> all valid compatible strings.
What's the story with dependencies here - why is all this stuff in one
series? Normally I'd expect bindings conversions to be standalone.
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^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-07 21:38 ` Mark Brown
0 siblings, 0 replies; 117+ messages in thread
From: Mark Brown @ 2025-02-07 21:38 UTC (permalink / raw)
To: j.ne
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
J. Neuschäfer, Wim Van Sebroeck, Guenter Roeck,
Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
linux-kernel, linux-ide, linux-crypto, dmaengine, linux-pci,
linux-watchdog, linux-spi, linux-mtd
[-- Attachment #1.1: Type: text/plain, Size: 574 bytes --]
On Fri, Feb 07, 2025 at 10:30:17PM +0100, J. Neuschäfer via B4 Relay wrote:
> This is a spin-off of the series titled
> "powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
> During the development of that series, it became clear that many
> devicetree bindings for Freescale MPC8xxx platforms are still in the old
> plain-text format, or don't exist at all, and in any case don't mention
> all valid compatible strings.
What's the story with dependencies here - why is all this stuff in one
series? Normally I'd expect bindings conversions to be standalone.
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 144 bytes --]
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
2025-02-07 21:38 ` Mark Brown
@ 2025-02-08 2:20 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-08 2:20 UTC (permalink / raw)
To: Mark Brown
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, Wim Van Sebroeck,
Guenter Roeck, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 09:38:05PM +0000, Mark Brown wrote:
> On Fri, Feb 07, 2025 at 10:30:17PM +0100, J. Neuschäfer via B4 Relay wrote:
>
> > This is a spin-off of the series titled
> > "powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
>
> > During the development of that series, it became clear that many
> > devicetree bindings for Freescale MPC8xxx platforms are still in the old
> > plain-text format, or don't exist at all, and in any case don't mention
> > all valid compatible strings.
>
> What's the story with dependencies here - why is all this stuff in one
> series?
The patches are independent of each other, except for the four elbc/nand
patches. They are in the same series because they came up during the
same project and achieve similar goals, but it isn't necessary.
> Normally I'd expect bindings conversions to be standalone.
Noted.
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-08 2:20 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-08 2:20 UTC (permalink / raw)
To: Mark Brown
Cc: j.ne, devicetree, linuxppc-dev, Krzysztof Kozlowski, imx,
Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, Wim Van Sebroeck,
Guenter Roeck, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
On Fri, Feb 07, 2025 at 09:38:05PM +0000, Mark Brown wrote:
> On Fri, Feb 07, 2025 at 10:30:17PM +0100, J. Neuschäfer via B4 Relay wrote:
>
> > This is a spin-off of the series titled
> > "powerpc: MPC83xx cleanup and LANCOM NWAPP2 board".
>
> > During the development of that series, it became clear that many
> > devicetree bindings for Freescale MPC8xxx platforms are still in the old
> > plain-text format, or don't exist at all, and in any case don't mention
> > all valid compatible strings.
>
> What's the story with dependencies here - why is all this stuff in one
> series?
The patches are independent of each other, except for the four elbc/nand
patches. They are in the same series because they came up during the
same project and achieve similar goals, but it isn't necessary.
> Normally I'd expect bindings conversions to be standalone.
Noted.
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
2025-02-08 2:20 ` J. Neuschäfer
@ 2025-02-10 12:59 ` Mark Brown
-1 siblings, 0 replies; 117+ messages in thread
From: Mark Brown @ 2025-02-10 12:59 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
Wim Van Sebroeck, Guenter Roeck, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
[-- Attachment #1: Type: text/plain, Size: 690 bytes --]
On Sat, Feb 08, 2025 at 02:20:47AM +0000, J. Neuschäfer wrote:
> On Fri, Feb 07, 2025 at 09:38:05PM +0000, Mark Brown wrote:
> > What's the story with dependencies here - why is all this stuff in one
> > series?
> The patches are independent of each other, except for the four elbc/nand
> patches. They are in the same series because they came up during the
> same project and achieve similar goals, but it isn't necessary.
Please don't do this, it just makes it harder to merge things since it
makes it look like there's cross tree merges needed when that's not the
case, complicating merging, and puts the entire series in everyone's
inbox which makes things more noisy.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-10 12:59 ` Mark Brown
0 siblings, 0 replies; 117+ messages in thread
From: Mark Brown @ 2025-02-10 12:59 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
Wim Van Sebroeck, Guenter Roeck, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
[-- Attachment #1.1: Type: text/plain, Size: 690 bytes --]
On Sat, Feb 08, 2025 at 02:20:47AM +0000, J. Neuschäfer wrote:
> On Fri, Feb 07, 2025 at 09:38:05PM +0000, Mark Brown wrote:
> > What's the story with dependencies here - why is all this stuff in one
> > series?
> The patches are independent of each other, except for the four elbc/nand
> patches. They are in the same series because they came up during the
> same project and achieve similar goals, but it isn't necessary.
Please don't do this, it just makes it harder to merge things since it
makes it look like there's cross tree merges needed when that's not the
case, complicating merging, and puts the entire series in everyone's
inbox which makes things more noisy.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 144 bytes --]
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
2025-02-10 12:59 ` Mark Brown
@ 2025-02-10 15:57 ` J. Neuschäfer
-1 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-10 15:57 UTC (permalink / raw)
To: Mark Brown
Cc: J. Neuschäfer, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, Wim Van Sebroeck,
Guenter Roeck, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
On Mon, Feb 10, 2025 at 12:59:35PM +0000, Mark Brown wrote:
> On Sat, Feb 08, 2025 at 02:20:47AM +0000, J. Neuschäfer wrote:
> > On Fri, Feb 07, 2025 at 09:38:05PM +0000, Mark Brown wrote:
>
> > > What's the story with dependencies here - why is all this stuff in one
> > > series?
>
> > The patches are independent of each other, except for the four elbc/nand
> > patches. They are in the same series because they came up during the
> > same project and achieve similar goals, but it isn't necessary.
>
> Please don't do this, it just makes it harder to merge things since it
> makes it look like there's cross tree merges needed when that's not the
> case, complicating merging, and puts the entire series in everyone's
> inbox which makes things more noisy.
How should I proceed with this series, in your opinion?
I see potential advantages (less of the issues you describe) and
disadvantages (somewhat harder to track patches) of splitting it up
before sending v3.
(Outside of this series, the conclusion is clear and simple)
J. Neuschäfer
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-10 15:57 ` J. Neuschäfer
0 siblings, 0 replies; 117+ messages in thread
From: J. Neuschäfer @ 2025-02-10 15:57 UTC (permalink / raw)
To: Mark Brown
Cc: J. Neuschäfer, devicetree, linuxppc-dev, Krzysztof Kozlowski,
imx, Scott Wood, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Damien Le Moal, Niklas Cassel,
Herbert Xu, David S. Miller, Lee Jones, Vinod Koul,
Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Bjorn Helgaas, Wim Van Sebroeck,
Guenter Roeck, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, linux-kernel, linux-ide, linux-crypto,
dmaengine, linux-pci, linux-watchdog, linux-spi, linux-mtd
On Mon, Feb 10, 2025 at 12:59:35PM +0000, Mark Brown wrote:
> On Sat, Feb 08, 2025 at 02:20:47AM +0000, J. Neuschäfer wrote:
> > On Fri, Feb 07, 2025 at 09:38:05PM +0000, Mark Brown wrote:
>
> > > What's the story with dependencies here - why is all this stuff in one
> > > series?
>
> > The patches are independent of each other, except for the four elbc/nand
> > patches. They are in the same series because they came up during the
> > same project and achieve similar goals, but it isn't necessary.
>
> Please don't do this, it just makes it harder to merge things since it
> makes it look like there's cross tree merges needed when that's not the
> case, complicating merging, and puts the entire series in everyone's
> inbox which makes things more noisy.
How should I proceed with this series, in your opinion?
I see potential advantages (less of the issues you describe) and
disadvantages (somewhat harder to track patches) of splitting it up
before sending v3.
(Outside of this series, the conclusion is clear and simple)
J. Neuschäfer
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
2025-02-10 15:57 ` J. Neuschäfer
@ 2025-02-10 16:19 ` Mark Brown
-1 siblings, 0 replies; 117+ messages in thread
From: Mark Brown @ 2025-02-10 16:19 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
Wim Van Sebroeck, Guenter Roeck, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
[-- Attachment #1: Type: text/plain, Size: 771 bytes --]
On Mon, Feb 10, 2025 at 03:57:42PM +0000, J. Neuschäfer wrote:
> On Mon, Feb 10, 2025 at 12:59:35PM +0000, Mark Brown wrote:
> > Please don't do this, it just makes it harder to merge things since it
> > makes it look like there's cross tree merges needed when that's not the
> > case, complicating merging, and puts the entire series in everyone's
> > inbox which makes things more noisy.
> How should I proceed with this series, in your opinion?
> I see potential advantages (less of the issues you describe) and
> disadvantages (somewhat harder to track patches) of splitting it up
> before sending v3.
I'd rather that at least the SPI stuff were sent separately (well,
ideally what you've done already is fine and it doesn't need a resend at
all).
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings
@ 2025-02-10 16:19 ` Mark Brown
0 siblings, 0 replies; 117+ messages in thread
From: Mark Brown @ 2025-02-10 16:19 UTC (permalink / raw)
To: J. Neuschäfer
Cc: devicetree, linuxppc-dev, Krzysztof Kozlowski, imx, Scott Wood,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Damien Le Moal, Niklas Cassel, Herbert Xu,
David S. Miller, Lee Jones, Vinod Koul, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
Wim Van Sebroeck, Guenter Roeck, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, linux-kernel, linux-ide,
linux-crypto, dmaengine, linux-pci, linux-watchdog, linux-spi,
linux-mtd
[-- Attachment #1.1: Type: text/plain, Size: 771 bytes --]
On Mon, Feb 10, 2025 at 03:57:42PM +0000, J. Neuschäfer wrote:
> On Mon, Feb 10, 2025 at 12:59:35PM +0000, Mark Brown wrote:
> > Please don't do this, it just makes it harder to merge things since it
> > makes it look like there's cross tree merges needed when that's not the
> > case, complicating merging, and puts the entire series in everyone's
> > inbox which makes things more noisy.
> How should I proceed with this series, in your opinion?
> I see potential advantages (less of the issues you describe) and
> disadvantages (somewhat harder to track patches) of splitting it up
> before sending v3.
I'd rather that at least the SPI stuff were sent separately (well,
ideally what you've done already is fine and it doesn't need a resend at
all).
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 144 bytes --]
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 117+ messages in thread
* Re: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
@ 2025-02-11 16:32 kernel test robot
0 siblings, 0 replies; 117+ messages in thread
From: kernel test robot @ 2025-02-11 16:32 UTC (permalink / raw)
To: oe-kbuild; +Cc: lkp
::::::
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
::::::
BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250207-ppcyaml-v2-3-8137b0c42526@posteo.net>
References: <20250207-ppcyaml-v2-3-8137b0c42526@posteo.net>
TO: "J. Neuschäfer via B4 Relay" <devnull+j.ne.posteo.net@kernel.org>
TO: devicetree@vger.kernel.org
TO: linuxppc-dev@lists.ozlabs.org
TO: Krzysztof Kozlowski <krzk@kernel.org>
CC: imx@lists.linux.dev
CC: Scott Wood <oss@buserror.net>
CC: Madhavan Srinivasan <maddy@linux.ibm.com>
CC: Michael Ellerman <mpe@ellerman.id.au>
CC: Nicholas Piggin <npiggin@gmail.com>
CC: Christophe Leroy <christophe.leroy@csgroup.eu>
CC: Naveen N Rao <naveen@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Conor Dooley <conor+dt@kernel.org>
CC: Damien Le Moal <dlemoal@kernel.org>
CC: Niklas Cassel <cassel@kernel.org>
CC: Herbert Xu <herbert@gondor.apana.org.au>
CC: Lee Jones <lee@kernel.org>
CC: Vinod Koul <vkoul@kernel.org>
CC: Lorenzo Pieralisi <lpieralisi@kernel.org>
CC: "Krzysztof Wilczyński" <kw@linux.com>
CC: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
CC: Bjorn Helgaas <helgaas@kernel.org>
CC: "J. Neuschäfer" <j.neuschaefer@gmx.net>
CC: Wim Van Sebroeck <wim@linux-watchdog.org>
CC: Guenter Roeck <linux@roeck-us.net>
CC: Mark Brown <broonie@kernel.org>
CC: Miquel Raynal <miquel.raynal@bootlin.com>
CC: Richard Weinberger <richard@nod.at>
CC: Vignesh Raghavendra <vigneshr@ti.com>
CC: linux-kernel@vger.kernel.org
CC: linux-ide@vger.kernel.org
Hi Neuschäfer,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 2014c95afecee3e76ca4a56956a936e23283f05b]
url: https://github.com/intel-lab-lkp/linux/commits/J-Neusch-fer-via-B4-Relay/dt-bindings-powerpc-Add-Freescale-NXP-MPC83xx-SoCs/20250208-053519
base: 2014c95afecee3e76ca4a56956a936e23283f05b
patch link: https://lore.kernel.org/r/20250207-ppcyaml-v2-3-8137b0c42526%40posteo.net
patch subject: [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML
:::::: branch date: 4 days ago
:::::: commit date: 4 days ago
config: powerpc-randconfig-051-20250208 (https://download.01.org/0day-ci/archive/20250212/202502120026.WDulIihj-lkp@intel.com/config)
compiler: powerpc-linux-gcc (GCC) 14.2.0
dtschema version: 2024.12.dev6+gc4da38d
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250212/202502120026.WDulIihj-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202502120026.WDulIihj-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8: failed to match any schema with compatible: ['fsl,mpc8323-dma', 'fsl,elo-dma']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8: failed to match any schema with compatible: ['fsl,mpc8323-dma', 'fsl,elo-dma']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@0: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@0: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@80: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@80: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@100: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@100: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@180: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/dma@82a8/dma-channel@180: failed to match any schema with compatible: ['fsl,mpc8323-dma-channel', 'fsl,elo-dma-channel']
>> arch/powerpc/boot/dts/mpc832x_rdb.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/par_io@1400: failed to match any schema with compatible: ['fsl,mpc8323-qe-pario']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: /soc8323@e0000000/par_io@1400/gpio-controller@1448: failed to match any schema with compatible: ['fsl,mpc8323-qe-pario-bank']
arch/powerpc/boot/dts/mpc832x_rdb.dtb: qe@e0100000: compatible: ['fsl,qe'] is too short
from schema $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe.yaml#
arch/powerpc/boot/dts/mpc832x_rdb.dtb: qe@e0100000: interrupt-controller@80: '#address-cells', 'big-endian' do not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe.yaml#
arch/powerpc/boot/dts/mpc832x_rdb.dtb: qe@e0100000: $nodename:0: 'qe@e0100000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
from schema $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe.yaml#
arch/powerpc/boot/dts/mpc832x_rdb.dtb: qe@e0100000: compatible: ['fsl,qe'] does not contain items matching the given schema
--
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8: failed to match any schema with compatible: ['fsl,mpc8360-dma', 'fsl,elo-dma']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8: failed to match any schema with compatible: ['fsl,mpc8360-dma', 'fsl,elo-dma']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@0: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@0: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@80: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@80: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@100: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@100: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@180: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/dma@82a8/dma-channel@180: failed to match any schema with compatible: ['fsl,mpc8360-dma-channel', 'fsl,elo-dma-channel']
>> arch/powerpc/boot/dts/mpc836x_rdk.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/interrupt-controller@700: failed to match any schema with compatible: ['fsl,pq2pro-pic', 'fsl,ipic']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/interrupt-controller@700: failed to match any schema with compatible: ['fsl,pq2pro-pic', 'fsl,ipic']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/gpio-controller@1418: failed to match any schema with compatible: ['fsl,mpc8360-qe-pario-bank', 'fsl,mpc8323-qe-pario-bank']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/gpio-controller@1418: failed to match any schema with compatible: ['fsl,mpc8360-qe-pario-bank', 'fsl,mpc8323-qe-pario-bank']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/gpio-controller@1460: failed to match any schema with compatible: ['fsl,mpc8360-qe-pario-bank', 'fsl,mpc8323-qe-pario-bank']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: /soc@e0000000/gpio-controller@1460: failed to match any schema with compatible: ['fsl,mpc8360-qe-pario-bank', 'fsl,mpc8323-qe-pario-bank']
arch/powerpc/boot/dts/mpc836x_rdk.dtb: qe@100000: interrupt-controller@80: '#address-cells', 'big-endian' do not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe.yaml#
arch/powerpc/boot/dts/mpc836x_rdk.dtb: qe@100000: $nodename:0: 'qe@100000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
--
'fsl,ns16550' is not one of ['nuvoton,npcm845-uart']
'fsl,ns16550' is not one of ['ralink,mt7620a-uart', 'ralink,rt3052-uart', 'ralink,rt3883-uart']
'fsl,ns16550' is not one of ['mediatek,mt7622-btif', 'mediatek,mt7623-btif']
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/mpc8377_rdb.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
>> arch/powerpc/boot/dts/mpc8377_rdb.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/mpc8377_rdb.dtb: sata@18000: 'cell-index' is a required property
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_rdb.dtb: sata@18000: 'sleep' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_rdb.dtb: sata@19000: 'cell-index' is a required property
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_rdb.dtb: sata@19000: 'sleep' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_rdb.dtb: /immr@e0000000/interrupt-controller@700: failed to match any schema with compatible: ['fsl,ipic']
--
'fsl,ns16550' is not one of ['nuvoton,npcm845-uart']
'fsl,ns16550' is not one of ['ralink,mt7620a-uart', 'ralink,rt3052-uart', 'ralink,rt3883-uart']
'fsl,ns16550' is not one of ['mediatek,mt7622-btif', 'mediatek,mt7623-btif']
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/mpc8377_wlan.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
>> arch/powerpc/boot/dts/mpc8377_wlan.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/mpc8377_wlan.dtb: sata@18000: 'cell-index' is a required property
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_wlan.dtb: sata@18000: 'sleep' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_wlan.dtb: sata@19000: 'cell-index' is a required property
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_wlan.dtb: sata@19000: 'sleep' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8377_wlan.dtb: /immr@e0000000/interrupt-controller@700: failed to match any schema with compatible: ['fsl,ipic']
--
'fsl,ns16550' is not one of ['nuvoton,npcm845-uart']
'fsl,ns16550' is not one of ['ralink,mt7620a-uart', 'ralink,rt3052-uart', 'ralink,rt3883-uart']
'fsl,ns16550' is not one of ['mediatek,mt7622-btif', 'mediatek,mt7623-btif']
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/mpc8378_rdb.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
>> arch/powerpc/boot/dts/mpc8378_rdb.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /immr@e0000000/interrupt-controller@700: failed to match any schema with compatible: ['fsl,ipic']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /immr@e0000000/power@b00: failed to match any schema with compatible: ['fsl,mpc8378-pmc', 'fsl,mpc8349-pmc']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /immr@e0000000/power@b00: failed to match any schema with compatible: ['fsl,mpc8378-pmc', 'fsl,mpc8349-pmc']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /pci@e0008500: failed to match any schema with compatible: ['fsl,mpc8349-pci']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /pcie@e0009000: failed to match any schema with compatible: ['fsl,mpc8378-pcie', 'fsl,mpc8314-pcie']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /pcie@e0009000: failed to match any schema with compatible: ['fsl,mpc8378-pcie', 'fsl,mpc8314-pcie']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /pcie@e000a000: failed to match any schema with compatible: ['fsl,mpc8378-pcie', 'fsl,mpc8314-pcie']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: /pcie@e000a000: failed to match any schema with compatible: ['fsl,mpc8378-pcie', 'fsl,mpc8314-pcie']
arch/powerpc/boot/dts/mpc8378_rdb.dtb: leds: 'hdd', 'pwr' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
--
'fsl,ns16550' is not one of ['nuvoton,npcm845-uart']
'fsl,ns16550' is not one of ['ralink,mt7620a-uart', 'ralink,rt3052-uart', 'ralink,rt3883-uart']
'fsl,ns16550' is not one of ['mediatek,mt7622-btif', 'mediatek,mt7623-btif']
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/mpc8379_rdb.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
>> arch/powerpc/boot/dts/mpc8379_rdb.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/mpc8379_rdb.dtb: sata@18000: 'cell-index' is a required property
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8379_rdb.dtb: sata@18000: 'sleep' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8379_rdb.dtb: sata@19000: 'cell-index' is a required property
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8379_rdb.dtb: sata@19000: 'sleep' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/ata/fsl,pq-sata.yaml#
arch/powerpc/boot/dts/mpc8379_rdb.dtb: sata@1a000: 'cell-index' is a required property
--
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@c300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@c300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@c300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@c300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,p2020-l2-cache-controller']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
>> arch/powerpc/boot/dts/turris1x.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/turris1x.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/turris1x.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/turris1x.dtb: localbus@ffe05000: nand@1,0: 'ranges' is a required property
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
--
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xcalibur1501.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
>> arch/powerpc/boot/dts/xcalibur1501.dtb: crypto@30000: interrupts: [[45, 2], [58, 2]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/xcalibur1501.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/pic@40000: failed to match any schema with compatible: ['chrp,open-pic']
arch/powerpc/boot/dts/xcalibur1501.dtb: gpio-leds: 'green', 'heartbeat', 'red', 'yellow' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/leds/leds-gpio.yaml#
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xcalibur1501.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
--
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xpedite5301.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
>> arch/powerpc/boot/dts/xpedite5301.dtb: crypto@30000: interrupts: [[45, 2], [58, 2]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/xpedite5301.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/pic@40000: failed to match any schema with compatible: ['chrp,open-pic']
arch/powerpc/boot/dts/xpedite5301.dtb: gpio-leds: 'green', 'heartbeat', 'red', 'yellow' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/leds/leds-gpio.yaml#
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5301.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
--
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xpedite5330.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
>> arch/powerpc/boot/dts/xpedite5330.dtb: crypto@30000: interrupts: [[45, 2], [58, 2]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/xpedite5330.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/pic@40000: failed to match any schema with compatible: ['chrp,open-pic']
arch/powerpc/boot/dts/xpedite5330.dtb: gpio-leds: 'green', 'heartbeat', 'red', 'yellow' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/leds/leds-gpio.yaml#
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5330.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
--
'fsl,ns16550' is not one of ['mrvl,mmp-uart', 'spacemit,k1-uart']
'fsl,ns16550' is not one of ['nvidia,tegra30-uart', 'nvidia,tegra114-uart', 'nvidia,tegra124-uart', 'nvidia,tegra210-uart', 'nvidia,tegra186-uart', 'nvidia,tegra194-uart', 'nvidia,tegra234-uart']
'ralink,rt2880-uart' was expected
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xpedite5370.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/msi@41600: failed to match any schema with compatible: ['fsl,mpc8572-msi', 'fsl,mpic-msi']
>> arch/powerpc/boot/dts/xpedite5370.dtb: crypto@30000: interrupts: [[45, 2], [58, 2]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/xpedite5370.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/pic@40000: failed to match any schema with compatible: ['chrp,open-pic']
arch/powerpc/boot/dts/xpedite5370.dtb: gpio-leds: 'green', 'heartbeat', 'red', 'yellow' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/leds/leds-gpio.yaml#
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/pme@10000: failed to match any schema with compatible: ['fsl,mpc8572-pme', 'pme8572']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/tlu@2f000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
arch/powerpc/boot/dts/xpedite5370.dtb: /soc8572@ef000000/tlu@15000: failed to match any schema with compatible: ['fsl,mpc8572-tlu', 'fsl_tlu']
--
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,p2020-l2-cache-controller']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: /soc@fef00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/ge_imp3a.dtb: pcie@fef08000: pcie@0:interrupts:0:0: 26 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: usb@2b000: compatible: 'oneOf' conditional failed, one must be fixed:
['fsl,mpc8536-usb2-dr', 'fsl-usb2-dr'] is too long
'fsl,mpc8536-usb2-dr' is not one of ['fsl-usb2-mph', 'fsl-usb2-dr']
'fsl,mpc8536-usb2-dr' is not one of ['fsl-usb2-dr-v2.2', 'fsl-usb2-dr-v2.5']
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: usb@2b000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/usb@2b000: failed to match any schema with compatible: ['fsl,mpc8536-usb2-dr', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8536-guts']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8536ds.dtb: /pci@ffe08000: failed to match any schema with compatible: ['fsl,mpc8540-pci']
--
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: usb@2b000: compatible: 'oneOf' conditional failed, one must be fixed:
['fsl,mpc8536-usb2-dr', 'fsl-usb2-dr'] is too long
'fsl,mpc8536-usb2-dr' is not one of ['fsl-usb2-mph', 'fsl-usb2-dr']
'fsl,mpc8536-usb2-dr' is not one of ['fsl-usb2-dr-v2.2', 'fsl-usb2-dr-v2.5']
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: usb@2b000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/usb@2b000: failed to match any schema with compatible: ['fsl,mpc8536-usb2-dr', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8536-guts']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8536ds_36b.dtb: /pci@fffe08000: failed to match any schema with compatible: ['fsl,mpc8540-pci']
--
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,mpc8568-l2-cache-controller']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
>> arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: crypto@30000: Unevaluated properties are not allowed ('sleep' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/rmu@d3000: failed to match any schema with compatible: ['fsl,srio-rmu']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/rmu@d3000/message-unit@0: failed to match any schema with compatible: ['fsl,srio-msg-unit']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/rmu@d3000/message-unit@100: failed to match any schema with compatible: ['fsl,srio-msg-unit']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/rmu@d3000/doorbell-unit@400: failed to match any schema with compatible: ['fsl,srio-dbell-unit']
arch/powerpc/boot/dts/fsl/mpc8568mds.dtb: /soc8568@e0000000/rmu@d3000/port-write-unit@4e0: failed to match any schema with compatible: ['fsl,srio-port-write-unit']
--
'mediatek,mtk-btif' was expected
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: serial@4600: Unevaluated properties are not allowed ('cell-index', 'compatible', 'device_type' were unexpected)
from schema $id: http://devicetree.org/schemas/serial/8250.yaml#
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,mpc8569-l2-cache-controller']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
>> arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts', 'sleep' were unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/rmu@d3000: failed to match any schema with compatible: ['fsl,srio-rmu']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/rmu@d3000/message-unit@0: failed to match any schema with compatible: ['fsl,srio-msg-unit']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/rmu@d3000/message-unit@100: failed to match any schema with compatible: ['fsl,srio-msg-unit']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/rmu@d3000/doorbell-unit@400: failed to match any schema with compatible: ['fsl,srio-dbell-unit']
arch/powerpc/boot/dts/fsl/mpc8569mds.dtb: /soc@e0000000/rmu@d3000/port-write-unit@4e0: failed to match any schema with compatible: ['fsl,srio-port-write-unit']
--
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/ethernet@24000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/mdio@24520: failed to match any schema with compatible: ['fsl,gianfar-mdio']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0], [71, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/ethernet@25000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/mdio@25520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/ethernet@26000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/mdio@26520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/ethernet@27000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/mdio@27520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
>> arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: /soc8572@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8572ds.dtb: pcie@ffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/ethernet@24000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/mdio@24520: failed to match any schema with compatible: ['fsl,gianfar-mdio']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0], [71, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/ethernet@25000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/mdio@25520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/ethernet@26000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/mdio@26520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/ethernet@27000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/mdio@27520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
>> arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: /soc8572@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8572ds_36b.dtb: pcie@fffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/ethernet@24000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/mdio@24520: failed to match any schema with compatible: ['fsl,gianfar-mdio']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0], [71, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/ethernet@25000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/mdio@25520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/ethernet@26000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/mdio@26520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/ethernet@27000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/mdio@27520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
>> arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: /soc8572@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core0.dtb: pcie@ffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/ethernet@24000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/mdio@24520: failed to match any schema with compatible: ['fsl,gianfar-mdio']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0], [71, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/ethernet@25000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/mdio@25520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/ethernet@26000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/mdio@26520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/ethernet@27000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/mdio@27520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
>> arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,mpc8572-guts']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: /soc8572@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mpc8572ds_camp_core1.dtb: pcie@ffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/mvme2500.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/mvme2500.dtb: sdhc@2e000: Unevaluated properties are not allowed ('non-removable' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/mvme2500.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/mvme2500.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/mvme2500.dtb: localbus@ffe05000: serial@4,0: 'ranges' is a required property
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
--
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_32b.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020mbg-pc_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: usb@23000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_32b.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: usb@23000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: usb@23000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core0.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: usb@23000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb-pc_camp_core1.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: usb@23000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'compatible' were unexpected)
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb-pd.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020rdb_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020utm-pc_32b.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1020utm-pc_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: sdhc@2e000: compatible:0: 'fsl,esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021mds.dtb: sdhc@2e000: compatible: ['fsl,esdhc'] is too short
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021mds.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021mds.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p1021mds.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1021mds.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/mdio@26000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1021-guts']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1021mds.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
--
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: sdhc@2e000: compatible:0: 'fsl,esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: sdhc@2e000: compatible: ['fsl,esdhc'] is too short
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1021-guts']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_32b.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: sdhc@2e000: compatible:0: 'fsl,esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: sdhc@2e000: compatible: ['fsl,esdhc'] is too short
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1021-guts']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1021rdb-pc_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
'fsl-usb2-dr-v1.6' is not one of ['fsl-usb2-dr-v2.2', 'fsl-usb2-dr-v2.5']
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: sdhc@2e000: compatible:0: 'fsl,p1022-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1022-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/mdio@24000: failed to match any schema with compatible: ['fsl,etsec2-mdio']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/ethernet@b0000: failed to match any schema with compatible: ['fsl,etsec2']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/mdio@25000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1022ds_32b.dtb: /soc@ffe00000/ethernet@b1000: failed to match any schema with compatible: ['fsl,etsec2']
--
'fsl-usb2-dr-v1.6' is not one of ['fsl-usb2-dr-v2.2', 'fsl-usb2-dr-v2.5']
from schema $id: http://devicetree.org/schemas/usb/fsl,usb2.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/usb@23000: failed to match any schema with compatible: ['fsl-usb2-dr-v1.6', 'fsl-usb2-dr']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: sdhc@2e000: compatible:0: 'fsl,p1022-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1022-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/mdio@24000: failed to match any schema with compatible: ['fsl,etsec2-mdio']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/ethernet@b0000: failed to match any schema with compatible: ['fsl,etsec2']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/mdio@25000: failed to match any schema with compatible: ['fsl,etsec2-tbi']
arch/powerpc/boot/dts/fsl/p1022ds_36b.dtb: /soc@fffe00000/ethernet@b1000: failed to match any schema with compatible: ['fsl,etsec2']
--
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: sdhc@2e000: compatible:0: 'fsl,p1022-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1022-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1022rdk.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1022rdk.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1022-guts']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,p1022-pmc', 'fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,p1022-pmc', 'fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1022rdk.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,p1022-pmc', 'fsl,mpc8536-pmc', 'fsl,mpc8548-pmc']
--
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1024rdb_32b.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: sdhc@2e000: compatible:0: 'fsl,p1020-esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/sdhc@2e000: failed to match any schema with compatible: ['fsl,p1020-esdhc', 'fsl,esdhc']
>> arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1020-guts']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1024rdb_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: sdhc@2e000: compatible:0: 'fsl,esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: sdhc@2e000: compatible: ['fsl,esdhc'] is too short
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1021-guts']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1025rdb_32b.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: sdhc@2e000: compatible:0: 'fsl,esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: sdhc@2e000: compatible: ['fsl,esdhc'] is too short
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1021-guts']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1025rdb_36b.dtb: pcie@fffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: sdhc@2e000: compatible:0: 'fsl,esdhc' is not one of ['fsl,mpc8536-esdhc', 'fsl,mpc8378-esdhc', 'fsl,p2020-esdhc', 'fsl,p4080-esdhc', 'fsl,t1040-esdhc', 'fsl,t4240-esdhc', 'fsl,ls1012a-esdhc', 'fsl,ls1028a-esdhc', 'fsl,ls1088a-esdhc', 'fsl,ls1043a-esdhc', 'fsl,ls1046a-esdhc', 'fsl,ls2080a-esdhc']
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025twr.dtb: sdhc@2e000: compatible: ['fsl,esdhc'] is too short
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025twr.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
arch/powerpc/boot/dts/fsl/p1025twr.dtb: sdhc@2e000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p1025twr.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p1025twr.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p1021-guts']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p1025twr.dtb: pcie@ffe09000: pcie@0:interrupts:0:0: 16 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/ethernet@24000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/mdio@24520: failed to match any schema with compatible: ['fsl,gianfar-mdio']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: ptp_clock@24e00: interrupts: [[68, 2, 0, 0], [69, 2, 0, 0], [70, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/ethernet@25000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/mdio@25520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/ethernet@26000: failed to match any schema with compatible: ['gianfar']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/mdio@26520: failed to match any schema with compatible: ['fsl,gianfar-tbi']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p2020ds.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p2020ds.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p2020ds.dtb: pcie@ffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@c300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@c300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,p2020-l2-cache-controller']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_32b.dtb: pcie@ffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@c300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@c300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,p2020-l2-cache-controller']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: /soc@fffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p2020rdb-pc_36b.dtb: pcie@fffe08000: pcie@0:interrupts:0:0: 24 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@c300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@c300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/l2-cache-controller@20000: failed to match any schema with compatible: ['fsl,p2020-l2-cache-controller']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@21300: failed to match any schema with compatible: ['fsl,eloplus-dma']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@0: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@80: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@100: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/dma@21300/dma-channel@180: failed to match any schema with compatible: ['fsl,eloplus-dma-channel']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: sdhc@2e000: $nodename:0: 'sdhc@2e000' does not match '^mmc(@.*)?$'
from schema $id: http://devicetree.org/schemas/mmc/fsl,esdhc.yaml#
>> arch/powerpc/boot/dts/fsl/p2020rdb.dtb: crypto@30000: interrupts: [[45, 2, 0, 0], [58, 2, 0, 0]] is too long
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
>> arch/powerpc/boot/dts/fsl/p2020rdb.dtb: crypto@30000: Unevaluated properties are not allowed ('interrupts' was unexpected)
from schema $id: http://devicetree.org/schemas/crypto/fsl,sec2.0.yaml#
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/pic@40000: failed to match any schema with compatible: ['fsl,mpic']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/timer@41100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/message@41400: failed to match any schema with compatible: ['fsl,mpic-v3.1-msgr']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/msi@41600: failed to match any schema with compatible: ['fsl,mpic-msi']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/timer@42100: failed to match any schema with compatible: ['fsl,mpic-global-timer']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/global-utilities@e0000: failed to match any schema with compatible: ['fsl,p2020-guts']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: /soc@ffe00000/power@e0070: failed to match any schema with compatible: ['fsl,mpc8548-pmc']
arch/powerpc/boot/dts/fsl/p2020rdb.dtb: pcie@ffe08000: pcie@0:interrupts:0:0: 26 is not one of [1, 2, 3, 4]
from schema $id: http://devicetree.org/schemas/pci/pci-bus-common.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 117+ messages in thread
end of thread, other threads:[~2025-02-25 13:11 UTC | newest]
Thread overview: 117+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-07 21:30 [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` [PATCH v2 01/12] dt-bindings: powerpc: Add Freescale/NXP MPC83xx SoCs J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` [PATCH v2 02/12] dt-bindings: ata: Convert fsl,pq-sata to YAML J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 23:17 ` Damien Le Moal
2025-02-07 23:17 ` Damien Le Moal
2025-02-07 21:30 ` [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-10 19:30 ` [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAMLy Frank Li
2025-02-10 19:30 ` Frank Li
2025-02-12 19:33 ` [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML Rob Herring
2025-02-12 19:33 ` Rob Herring
2025-02-14 2:04 ` J. Neuschäfer
2025-02-14 2:04 ` J. Neuschäfer
2025-02-07 21:30 ` [PATCH v2 04/12] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` [PATCH v2 05/12] dt-bindings: dma: Convert fsl,elo*-dma " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-10 19:39 ` Frank Li
2025-02-10 19:39 ` Frank Li
2025-02-14 12:35 ` J. Neuschäfer
2025-02-14 12:35 ` J. Neuschäfer
2025-02-25 12:54 ` J. Neuschäfer
2025-02-25 12:54 ` J. Neuschäfer
2025-02-12 19:38 ` Rob Herring
2025-02-12 19:38 ` Rob Herring
2025-02-07 21:30 ` [PATCH v2 06/12] dt-bindings: pci: Convert fsl,mpc83xx-pcie " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 23:44 ` Rob Herring (Arm)
2025-02-07 23:44 ` Rob Herring (Arm)
2025-02-08 1:26 ` kernel test robot
2025-02-09 0:06 ` J. Neuschäfer
2025-02-09 0:06 ` J. Neuschäfer
2025-02-10 21:25 ` Rob Herring
2025-02-10 21:25 ` Rob Herring
2025-02-07 21:30 ` [PATCH v2 07/12] dt-bindings: watchdog: Convert mpc8xxx-wdt " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` [PATCH v2 08/12] dt-bindings: spi: Convert Freescale SPI bindings " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-10 19:42 ` Frank Li
2025-02-10 19:42 ` Frank Li
2025-02-12 19:43 ` Rob Herring
2025-02-12 19:43 ` Rob Herring
2025-02-07 21:30 ` [PATCH v2 09/12] dt-bindings: memory-controllers: Convert fsl,elbc " J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 23:44 ` Rob Herring (Arm)
2025-02-07 23:44 ` Rob Herring (Arm)
2025-02-09 17:28 ` J. Neuschäfer
2025-02-09 17:28 ` J. Neuschäfer
2025-02-09 17:30 ` Krzysztof Kozlowski
2025-02-09 17:30 ` Krzysztof Kozlowski
2025-02-09 17:45 ` J. Neuschäfer
2025-02-09 17:45 ` J. Neuschäfer
2025-02-09 20:31 ` Crystal Wood
2025-02-09 20:31 ` Crystal Wood
2025-02-09 20:49 ` Crystal Wood
2025-02-09 20:49 ` Crystal Wood
2025-02-10 11:31 ` J. Neuschäfer
2025-02-10 11:31 ` J. Neuschäfer
2025-02-10 21:53 ` Rob Herring
2025-02-10 21:53 ` Rob Herring
2025-02-16 15:59 ` J. Neuschäfer
2025-02-16 15:59 ` J. Neuschäfer
2025-02-23 23:45 ` Crystal Wood
2025-02-23 23:45 ` Crystal Wood
2025-02-07 21:30 ` [PATCH v2 10/12] dt-bindings: memory-controllers: Add fsl,elbc-gpcm-uio J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-10 19:45 ` Frank Li
2025-02-10 19:45 ` Frank Li
2025-02-12 19:44 ` Rob Herring (Arm)
2025-02-12 19:44 ` Rob Herring (Arm)
2025-02-07 21:30 ` [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 23:45 ` Rob Herring (Arm)
2025-02-07 23:45 ` Rob Herring (Arm)
2025-02-10 19:47 ` [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nandy Frank Li
2025-02-10 19:47 ` Frank Li
2025-02-11 0:01 ` [PATCH v2 11/12] dt-bindings: nand: Add fsl,elbc-fcm-nand Rob Herring
2025-02-11 0:01 ` Rob Herring
2025-02-16 17:39 ` J. Neuschäfer
2025-02-16 17:39 ` J. Neuschäfer
2025-02-07 21:30 ` [PATCH v2 12/12] dt-bindings: mtd: raw-nand-chip: Relax node name pattern J. Neuschäfer
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-07 21:30 ` J. Neuschäfer via B4 Relay
2025-02-10 8:27 ` Miquel Raynal
2025-02-10 8:27 ` Miquel Raynal
2025-02-16 18:12 ` J. Neuschäfer
2025-02-16 18:12 ` J. Neuschäfer
2025-02-17 9:31 ` Miquel Raynal
2025-02-17 9:31 ` Miquel Raynal
2025-02-17 10:21 ` J. Neuschäfer
2025-02-17 10:21 ` J. Neuschäfer
2025-02-07 21:38 ` [PATCH v2 00/12] YAML conversion of several Freescale/PowerPC DT bindings Mark Brown
2025-02-07 21:38 ` Mark Brown
2025-02-08 2:20 ` J. Neuschäfer
2025-02-08 2:20 ` J. Neuschäfer
2025-02-10 12:59 ` Mark Brown
2025-02-10 12:59 ` Mark Brown
2025-02-10 15:57 ` J. Neuschäfer
2025-02-10 15:57 ` J. Neuschäfer
2025-02-10 16:19 ` Mark Brown
2025-02-10 16:19 ` Mark Brown
-- strict thread matches above, loose matches on Subject: below --
2025-02-11 16:32 [PATCH v2 03/12] dt-bindings: crypto: Convert fsl,sec-2.0 to YAML kernel test robot
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