From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01FD01865EE; Thu, 13 Feb 2025 15:27:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739460461; cv=none; b=ButfcALjMW9Ppk8n3/39ebs2lAi9EUedu1tPsWP/7wSjLnXUhvXQFU0FwHS2tW/LBPX5bjCHYTWY5Zwll3izW2URniC/4YOX9Bgp4lBOyyLZM6hwE47RM2wlo8hP2LRgyQflceeDpaGsnKupnhryinU3WAiPZRC/96EAWtlNYo8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739460461; c=relaxed/simple; bh=jHP7Vn6r4r0ynvHYOsUhf5wDYmEL6qbTcCDr003JfOc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HsRQQtfyjkL4ex5yVFbLV1o+OD2HLY6kgUP1IkrqyqHKMlGWbZZO50Gmmm/ghQNf7iC6oGgeueIgQqbTeyzU1C3Fwo2WVgAISN5G6xOfU8fdWwB3dg5qXYjZNzkZpn2Nup6cyF1LO26MCUWVQqgt9/fIhSrh1qzNzwPmIBhH6hI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=gvcK518J; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="gvcK518J" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C084FC4CEE7; Thu, 13 Feb 2025 15:27:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1739460460; bh=jHP7Vn6r4r0ynvHYOsUhf5wDYmEL6qbTcCDr003JfOc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gvcK518JQgUmVIaqkQs78Z9fKoVSjX6fixr15l0Z1usitlrmVrtlTgUAy7rAggma8 yy4hP8J+GMxB0wfiYFNWEj6sgXahQmXbSluCsqvUIw9YQA1lT7Q8N7Bbnemfe/x9rG /54zkntKrPaUIwqhswtVpc+7cwWZ6nyyn0ToaVbQ= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Daniele Ceraolo Spurio , John Harrison , Matthew Brost , Rodrigo Vivi Subject: [PATCH 6.6 100/273] drm/i915/guc: Debug print LRC state entries only if the context is pinned Date: Thu, 13 Feb 2025 15:27:52 +0100 Message-ID: <20250213142411.294368912@linuxfoundation.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250213142407.354217048@linuxfoundation.org> References: <20250213142407.354217048@linuxfoundation.org> User-Agent: quilt/0.68 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Daniele Ceraolo Spurio commit 57965269896313e1629a518d3971ad55f599b792 upstream. After the context is unpinned the backing memory can also be unpinned, so any accesses via the lrc_reg_state pointer can end up in unmapped memory. To avoid that, make sure to only access that memory if the context is pinned when printing its info. v2: fix newline alignment Fixes: 28ff6520a34d ("drm/i915/guc: Update GuC debugfs to support new GuC") Signed-off-by: Daniele Ceraolo Spurio Cc: John Harrison Cc: Matthew Brost Cc: # v5.15+ Reviewed-by: John Harrison Link: https://patchwork.freedesktop.org/patch/msgid/20250115001334.3875347-1-daniele.ceraolospurio@intel.com (cherry picked from commit 5bea40687c5cf2a33bf04e9110eb2e2b80222ef5) Signed-off-by: Rodrigo Vivi Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -5154,12 +5154,20 @@ static inline void guc_log_context(struc { drm_printf(p, "GuC lrc descriptor %u:\n", ce->guc_id.id); drm_printf(p, "\tHW Context Desc: 0x%08x\n", ce->lrc.lrca); - drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n", - ce->ring->head, - ce->lrc_reg_state[CTX_RING_HEAD]); - drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n", - ce->ring->tail, - ce->lrc_reg_state[CTX_RING_TAIL]); + if (intel_context_pin_if_active(ce)) { + drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n", + ce->ring->head, + ce->lrc_reg_state[CTX_RING_HEAD]); + drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n", + ce->ring->tail, + ce->lrc_reg_state[CTX_RING_TAIL]); + intel_context_unpin(ce); + } else { + drm_printf(p, "\t\tLRC Head: Internal %u, Memory not pinned\n", + ce->ring->head); + drm_printf(p, "\t\tLRC Tail: Internal %u, Memory not pinned\n", + ce->ring->tail); + } drm_printf(p, "\t\tContext Pin Count: %u\n", atomic_read(&ce->pin_count)); drm_printf(p, "\t\tGuC ID Ref Count: %u\n",