From: kernel test robot <lkp@intel.com>
To: Akhil R <akhilrajeev@nvidia.com>,
herbert@gondor.apana.org.au, davem@davemloft.net,
thierry.reding@gmail.com, jonathanh@nvidia.com,
linux-crypto@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
Akhil R <akhilrajeev@nvidia.com>
Subject: Re: [PATCH v2 06/10] crypto: tegra: Fix HASH intermediate result handling
Date: Thu, 13 Feb 2025 18:04:59 +0800 [thread overview]
Message-ID: <202502131717.CFOwEfqA-lkp@intel.com> (raw)
In-Reply-To: <20250211171713.65770-7-akhilrajeev@nvidia.com>
Hi Akhil,
kernel test robot noticed the following build warnings:
[auto build test WARNING on herbert-crypto-2.6/master]
[also build test WARNING on herbert-cryptodev-2.6/master linus/master v6.14-rc2 next-20250213]
[cannot apply to tegra/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Akhil-R/crypto-tegra-Use-separate-buffer-for-setkey/20250212-012434
base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git master
patch link: https://lore.kernel.org/r/20250211171713.65770-7-akhilrajeev%40nvidia.com
patch subject: [PATCH v2 06/10] crypto: tegra: Fix HASH intermediate result handling
config: i386-buildonly-randconfig-002-20250213 (https://download.01.org/0day-ci/archive/20250213/202502131717.CFOwEfqA-lkp@intel.com/config)
compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250213/202502131717.CFOwEfqA-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502131717.CFOwEfqA-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from drivers/crypto/tegra/tegra-se-hash.c:8:
In file included from include/linux/dma-mapping.h:8:
In file included from include/linux/scatterlist.h:8:
In file included from include/linux/mm.h:2223:
include/linux/vmstat.h:518:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion]
518 | return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_"
| ~~~~~~~~~~~ ^ ~~~
>> drivers/crypto/tegra/tegra-se-hash.c:343:22: warning: format specifies type 'unsigned long' but the argument has type 'ssize_t' (aka 'int') [-Wformat]
342 | dev_dbg(se->dev, "msg len %llu msg left %llu sz %lu cfg %#x",
| ~~~
| %zd
343 | msg_len, msg_left, rctx->datbuf.size, rctx->config);
| ^~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:165:39: note: expanded from macro 'dev_dbg'
165 | dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__)
| ~~~ ^~~~~~~~~~~
include/linux/dynamic_debug.h:274:19: note: expanded from macro 'dynamic_dev_dbg'
274 | dev, fmt, ##__VA_ARGS__)
| ~~~ ^~~~~~~~~~~
include/linux/dynamic_debug.h:250:59: note: expanded from macro '_dynamic_func_call'
250 | _dynamic_func_call_cls(_DPRINTK_CLASS_DFLT, fmt, func, ##__VA_ARGS__)
| ^~~~~~~~~~~
include/linux/dynamic_debug.h:248:65: note: expanded from macro '_dynamic_func_call_cls'
248 | __dynamic_func_call_cls(__UNIQUE_ID(ddebug), cls, fmt, func, ##__VA_ARGS__)
| ^~~~~~~~~~~
include/linux/dynamic_debug.h:224:15: note: expanded from macro '__dynamic_func_call_cls'
224 | func(&id, ##__VA_ARGS__); \
| ^~~~~~~~~~~
drivers/crypto/tegra/tegra-se-hash.c:701:6: warning: unused variable 'ret' [-Wunused-variable]
701 | int ret;
| ^~~
3 warnings generated.
vim +343 drivers/crypto/tegra/tegra-se-hash.c
265
266 static int tegra_sha_prep_cmd(struct tegra_sha_ctx *ctx, u32 *cpuvaddr,
267 struct tegra_sha_reqctx *rctx)
268 {
269 struct tegra_se *se = ctx->se;
270 u64 msg_len, msg_left;
271 int i = 0;
272
273 msg_len = rctx->total_len * 8;
274 msg_left = rctx->datbuf.size * 8;
275
276 /*
277 * If IN_ADDR_HI_0.SZ > SHA_MSG_LEFT_[0-3] to the HASH engine,
278 * HW treats it as the last buffer and process the data.
279 * Therefore, add an extra byte to msg_left if it is not the
280 * last buffer.
281 */
282 if (rctx->task & SHA_UPDATE) {
283 msg_left += 8;
284 msg_len += 8;
285 }
286
287 cpuvaddr[i++] = host1x_opcode_setpayload(8);
288 cpuvaddr[i++] = se_host1x_opcode_incr_w(SE_SHA_MSG_LENGTH);
289 cpuvaddr[i++] = lower_32_bits(msg_len);
290 cpuvaddr[i++] = upper_32_bits(msg_len);
291 cpuvaddr[i++] = 0;
292 cpuvaddr[i++] = 0;
293 cpuvaddr[i++] = lower_32_bits(msg_left);
294 cpuvaddr[i++] = upper_32_bits(msg_left);
295 cpuvaddr[i++] = 0;
296 cpuvaddr[i++] = 0;
297 cpuvaddr[i++] = host1x_opcode_setpayload(2);
298 cpuvaddr[i++] = se_host1x_opcode_incr_w(SE_SHA_CFG);
299 cpuvaddr[i++] = rctx->config;
300
301 if (rctx->task & SHA_FIRST) {
302 cpuvaddr[i++] = SE_SHA_TASK_HASH_INIT;
303 rctx->task &= ~SHA_FIRST;
304 } else {
305 /*
306 * If it isn't the first task, program the HASH_RESULT register
307 * with the intermediate result from the previous task
308 */
309 i += tegra_se_insert_hash_result(ctx, cpuvaddr + i, rctx);
310 }
311
312 cpuvaddr[i++] = host1x_opcode_setpayload(4);
313 cpuvaddr[i++] = se_host1x_opcode_incr_w(SE_SHA_IN_ADDR);
314 cpuvaddr[i++] = rctx->datbuf.addr;
315 cpuvaddr[i++] = (u32)(SE_ADDR_HI_MSB(upper_32_bits(rctx->datbuf.addr)) |
316 SE_ADDR_HI_SZ(rctx->datbuf.size));
317
318 if (rctx->task & SHA_UPDATE) {
319 cpuvaddr[i++] = rctx->intr_res.addr;
320 cpuvaddr[i++] = (u32)(SE_ADDR_HI_MSB(upper_32_bits(rctx->intr_res.addr)) |
321 SE_ADDR_HI_SZ(rctx->intr_res.size));
322 } else {
323 cpuvaddr[i++] = rctx->digest.addr;
324 cpuvaddr[i++] = (u32)(SE_ADDR_HI_MSB(upper_32_bits(rctx->digest.addr)) |
325 SE_ADDR_HI_SZ(rctx->digest.size));
326 }
327
328 if (rctx->key_id) {
329 cpuvaddr[i++] = host1x_opcode_setpayload(1);
330 cpuvaddr[i++] = se_host1x_opcode_nonincr_w(SE_SHA_CRYPTO_CFG);
331 cpuvaddr[i++] = SE_AES_KEY_INDEX(rctx->key_id);
332 }
333
334 cpuvaddr[i++] = host1x_opcode_setpayload(1);
335 cpuvaddr[i++] = se_host1x_opcode_nonincr_w(SE_SHA_OPERATION);
336 cpuvaddr[i++] = SE_SHA_OP_WRSTALL | SE_SHA_OP_START |
337 SE_SHA_OP_LASTBUF;
338 cpuvaddr[i++] = se_host1x_opcode_nonincr(host1x_uclass_incr_syncpt_r(), 1);
339 cpuvaddr[i++] = host1x_uclass_incr_syncpt_cond_f(1) |
340 host1x_uclass_incr_syncpt_indx_f(se->syncpt_id);
341
342 dev_dbg(se->dev, "msg len %llu msg left %llu sz %lu cfg %#x",
> 343 msg_len, msg_left, rctx->datbuf.size, rctx->config);
344
345 return i;
346 }
347
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2025-02-13 10:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-11 17:17 [PATCH v2 00/10] Tegra Security Engine driver improvements Akhil R
2025-02-11 17:17 ` [PATCH v2 01/10] crypto: tegra: Use separate buffer for setkey Akhil R
2025-02-11 17:17 ` [PATCH v2 02/10] crypto: tegra: Do not use fixed size buffers Akhil R
2025-02-11 17:17 ` [PATCH v2 03/10] crypto: tegra: finalize crypto req on error Akhil R
2025-02-11 17:17 ` [PATCH v2 04/10] crypto: tegra: check return value for hash do_one_req Akhil R
2025-02-11 17:17 ` [PATCH v2 05/10] crypto: tegra: Transfer HASH init function to crypto engine Akhil R
2025-02-13 7:46 ` kernel test robot
2025-02-11 17:17 ` [PATCH v2 06/10] crypto: tegra: Fix HASH intermediate result handling Akhil R
2025-02-13 4:49 ` kernel test robot
2025-02-13 6:26 ` kernel test robot
2025-02-13 10:04 ` kernel test robot [this message]
2025-02-11 17:17 ` [PATCH v2 07/10] crypto: tegra: Fix CMAC " Akhil R
2025-02-11 17:17 ` [PATCH v2 08/10] crypto: tegra: Set IV to NULL explicitly for AES ECB Akhil R
2025-02-11 17:17 ` [PATCH v2 09/10] crypto: tegra: Reserve keyslots to allocate dynamically Akhil R
2025-02-13 8:30 ` kernel test robot
2025-02-11 17:17 ` [PATCH v2 10/10] crypto: tegra: Use HMAC fallback when keyslots are full Akhil R
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